OPA2227-EP
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SBOS594A – MARCH 2012 – REVISED NOVEMBER 2012
HIGH PRECISION, LOW NOISE OPERATIONAL AMPLIFIER
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FEATURES
1
•
•
•
•
•
•
•
•
Low Noise: 3 nV/√Hz
Wide Bandwidth: 8 MHz, 2.3 V/μs
Settling Time: 5 μs
High CMRR: 138 dB (Typical)
High Open-Loop Gain: 160 dB (Typical)
Low Input Bias Current: 10 nA Maximum at
25°C
Low Offset Voltage: 100 μV Maximum at 25°C
Wide Supply Range: ±2.5 V to ±18 V
APPLICATIONS
•
•
•
•
•
•
•
•
Data Acquisition
Telecom Equipment
Geophysical Analysis
Vibration Analysis
Spectral Analysis
Professional Audio Equipment
Active Filters
Power Supply Control
SUPPORTS DEFENSE, AEROSPACE,
AND MEDICAL APPLICATIONS
•
•
•
•
•
•
•
Controlled Baseline
One Assembly and Test Site
One Fabrication Site
Available in Military (–55°C to 125°C)
Temperature Range (1)
Extended Product Life Cycle
Extended Product-Change Notification
Product Traceability
D PACKAGE
(TOP VIEW)
Out A
–In A
(1)
1
2
+In A
3
V–
4
A
B
8
V+
7
Out B
6
–In B
5
+In B
Additional temperature ranges available - contact factory
DESCRIPTION
The OPA2227 operational amplifier combines low noise and wide bandwidth with high precision to make it the
ideal choice for applications requiring both ac and precision dc performance.
The OPA2227 is unity-gain stable and features high slew rate (2.3 V/μs) and wide bandwidth (8 MHz).
The OPA2227 operational amplifier is ideal for professional audio equipment. In addition, low quiescent current
and low cost make them ideal for portable applications requiring high precision.
The OPA2227 operational amplifier is a pin-for-pin replacement for the industry standard OP-27 with substantial
improvements across the board. The dual and quad versions are available for space savings and perchannel
cost reduction.
The OPA2227 is available in an SOIC-8 package. Operation is specified from –55°C to 125°C.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2012, Texas Instruments Incorporated
OPA2227-EP
SBOS594A – MARCH 2012 – REVISED NOVEMBER 2012
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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION (1)
TA
PACKAGE
TOP-SIDE MARKING
–55°C to
125°C
SOIC-8 – D
2227EP
(1)
ORDERABLE PART
NUMBER
VID NUMBER
TRANSPORT MEDIA
OPA2227MDREP
V62/12610-01XE
Tape and Reel, large
OPA2227MDEP
V62/12610-01XE-T
Tube
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
ABSOLUTE MAXIMUM RATINGS (1)
over operating free-air temperature range (unless otherwise noted)
VALUE
UNIT
±18
V
Voltage
(V–) – 0.7 to (V+) + 0.7
V
Current
20
mA
Supply voltage
Signal input terminals
Output short-circuit (to ground) (2)
(1)
(2)
Continuous
Operating temperature
-55 to 125
°C
Storage temperature
-65 to 150
°C
Junction temperature
150
°C
Lead temperature (soldering, 10 s)
300
°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
One channel per package.
THERMAL INFORMATION
OPA2227
THERMAL METRIC (1)
D
UNITS
8 PINS
θJA
Junction-to-ambient thermal resistance (2)
91.9
θJCtop
Junction-to-case (top) thermal resistance (3)
39.9
(4)
θJB
Junction-to-board thermal resistance
ψJT
Junction-to-top characterization parameter (5)
ψJB
Junction-to-board characterization parameter (6)
39.6
(7)
N/A
θJCbot
(1)
(2)
(3)
(4)
(5)
(6)
(7)
2
Junction-to-case (bottom) thermal resistance
40.6
3.9
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDECstandard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
The junction-to-top characterization parameter, ψJT, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θJA, using a procedure described in JESD51-2a (sections 6 and 7).
The junction-to-board characterization parameter, ψJB, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θJA , using a procedure described in JESD51-2a (sections 6 and 7).
The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific
JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
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ELECTRICAL CHARACTERISTICS
At TA = 25°C, VS = ±5 V to ±15 V, RL = 10 kΩ (unless otherwise noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
µV
OFFSET VOLTAGE
Input offset voltage (VOS)
±5
±100
vs Temperature, TA = -55°C to 125°C
±10
±250
vs Temperature (dVOS/dT), TA = -55°C to 125°C
±0.1
vs Power supply (PSRR) TA = -55°C to 125°C
VS = ±2.5 V to ±18 V
±0.5
vs Time
Channel separation (dual)
µV
µV/°C
±2.1
µV/V
0.2
µV/mo
dc
0.2
µV/V
f = 1 kHz, RL = 5 kΩ
110
dB
INPUT BIAS CURRENT
Input bias current (IB)
±2.5
TA = -55°C to 125°C
±10
nA
±10
nA
See Typical Characteristics
Input offset current (IOS)
±2.5
TA = -55°C to 125°C
See Typical Characteristics
NOISE
Input voltage noise, f = 0.1 Hz to 10 Hz
Input voltage noise density (en)
f = 10 Hz
90
nVp-p
15
nVrms
3.5
nV/√Hz
f = 100 Hz
3
nV/√Hz
f = 1 kHz
3
nV/√Hz
0.4
pA/√Hz
Current noise density (in), f = 1 kHz
INPUT VOLTAGE RANGE
Common-mode voltage range (VCM)
TA = -55°C to 125°C
(V-) + 2
Common-mode rejection (CMRR)
VCM = (V–) + 2 V to (V+) – 2 V
TA = -55°C to 125°C
(V+) – 2
V
120
138
dB
108
138
dB
INPUT IMPEDANCE
Differential
Common-mode
Open-loop voltage gain (AOL)
107 || 12
Ω || pF
VCM = (V–) + 2 V to (V+) – 2 V
9
Ω || pF
10 || 3
OPEN-LOOP GAIN
Open-loop voltage gain (AOL)
VO = (V–) + 2 V to (V+) – 2 V, RL = 10 kΩ
TA = -55°C to 125°C
VO = (V–) + 3.5 V to (V+) – 3.5 V, RL = 600 Ω
TA = -55°C to 125°C
132
160
112
160
132
160
112
160
dB
FREQUENCY RESPONSE
Gain bandwidth product (GBW)
Slew rate (SR)
Settling time:
8
MHz
2.3
V/µs
0.1%
G = 1, 10-V Step, CL = 100 pF
5
µs
0.01%
G = 1, 10-V Step, CL = 100 pF
5.6
µs
VIN x G = VS
1.3
µs
0.00005
%
Overload recovery time
Total harmonic distortion + noise (THD+N)
f = 1 kHz, G = 1, VO = 3.5 Vrms
OUTPUT
Voltage output
TA = -55°C to 125°C
RL = 10 kΩ
(V-) + 2
(V+) – 2
TA = -55°C to 125°C
RL = 600 Ω
(V-) + 3.5
(V+) – 3.5
Short-circuit current (ISC)
±45
Capacitive load drive (CLOAD)
V
mA
See Typical Characteristics
POWER SUPPLY
Specified voltage range (VS)
Operating voltage range
Quiescent current (per amplifier) (IQ)
IO = 0 A
±5
±15
V
±2.5
±18
V
±3.7
±3.95
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ELECTRICAL CHARACTERISTICS (continued)
At TA = 25°C, VS = ±5 V to ±15 V, RL = 10 kΩ (unless otherwise noted).
PARAMETER
TEST CONDITIONS
TA = -55°C to 125°C
MIN
TYP
IO = 0 A
MAX
UNIT
±4.30
mA
TEMPERATURE RANGE
Specified temperature range
–55
125
°C
Operating temperature range
–55
125
°C
Storage temperature range
–65
150
°C
xxx
Estimated Life (Hours)
1000000
100000
10000
1000
125
130
135
140
145
150
Continuous T J ( °C)
A.
See datasheet for absolute maximum and minimum recommended operating conditions.
B.
Silicon operating life design goal is 10 years at 105°C junction temperature (does not include package interconnect
life).
Figure 1. OPA2227-EP Wirebond Life Derating Chart
4
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TYPICAL CHARACTERISTICS
At TA = 25°C, RL = 10 kΩ, VS = ±15 V (unless otherwise noted).
OPEN-LOOP GAIN/PHASE vs FREQUENCY
180
0
160
–20
140
+CMRR
–100
PSRR, CMRR (dB)
–80
φ
Phase (°)
AOL (dB)
120
–60
100
80
140
–40
G
120
POWER SUPPLY AND COMMON-MODE
REJECTION RATIO vs FREQUENCY
100
60
–120
40
–140
20
–160
0
–180
-20
–200
10k 100k 1M 10M 100M
–0
–20
0.01 0.10
1
10
100
1k
+PSRR
80
60
–PSRR
40
0.1
Frequency (Hz)
1
10
100
1k
10k
100k
1M
Frequency (Hz)
TOTAL HARMONIC DISTORTION + NOISE
vs FREQUENCY
INPUT VOLTAGE AND CURRENT NOISE
SPECTRAL DENSITY vs FREQUENCY
0.01
100k
10k
THD+Noise (%)
Voltage Noise (nV/√Hz)
Current Noise (fA/√Hz)
VOUT = 3.5Vrms
Current Noise
1k
100
10
0.001
0.0001
G = 1, RL = 10kΩ
Voltage Noise
0.00001
1
0.1
1
10
100
1k
20
10k
100
INPUT NOISE VOLTAGE vs TIME
10k
20k
CHANNEL SEPARATION vs FREQUENCY
Channel Separation (dB)
140
50nV/div
1k
Frequency (Hz)
Frequency (Hz)
120
100
80
Dual and quad devices. G = 1, all channels.
Quad measured Channel A to D, or B to C;
other combinations yield similiar or improved
rejection.
60
40
1s/div
10
100
1k
10k
100k
1M
Frequency (Hz)
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TYPICAL CHARACTERISTICS (continued)
At TA = 25°C, RL = 10 kΩ, VS = ±15 V (unless otherwise noted).
VOLTAGE NOISE DISTRIBUTION (10Hz)
WARM-UP OFFSET VOLTAGE DRIFT
24
10
Offset Voltage Change (µV)
Percent of Units (%)
8
16
8
6
4
2
0
–2
–4
–6
–8
0
–10
0
3.16 3.25 3.34 3.43
3.51 3.60
0
3.69 3.78
50
Noise (nV/√Hz)
AOL, CMRR, PSRR vs TEMPERATURE
160
Input Bias Current (nA)
AOL, CMRR, PSRR (dB)
PSRR
110
100
90
80
10
0
−10
−20
−30
−40
–50
–25
0
25
50
75
100
−50
−60 −40 −20
125
0
Temperature ( °C)
INPUT OFFSET CURRENT vs TEMPERATURE
100 120 140
SHORT-CIRCUIT CURRENT vs TEMPERATURE
Short-Circuit Current (mA)
5
4
3
2
1
0
−1
−2
−60 −40 −20
20
40
60
80
Temperature (°C)
60
6
Input Offset Current (nA)
300
20
70
6
250
30
CMRR
130
60
–75
200
INPUT BIAS CURRENT vs TEMPERATURE
150
120
150
40
AOL
140
100
Time from Power Supply Turn-On (s)
0
20
40
60
80
Temperature (°C)
100 120 140
50
40
–ISC
+ISC
30
20
10
0
–75
–50
–25
0
25
50
75
100
125
Temperature (°C)
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TYPICAL CHARACTERISTICS (continued)
At TA = 25°C, RL = 10 kΩ, VS = ±15 V (unless otherwise noted).
QUIESCENT CURRENT vs TEMPERATURE
QUIESCENT CURRENT vs SUPPLY VOLTAGE
3.8
±18V
±15V
±12V
±10V
4.5
4.0
Quiescent Current (mA)
Quiescent Current (mA)
5.0
±5V
±2.5V
3.5
3.0
2.5
3.6
3.4
3.2
3.0
2.8
–60 –40
–20
0
20
40
60
80
100 120 140
0
2
4
6
Temperature ( °C)
10
12
14
16
18
20
CHANGE IN INPUT BIAS CURRENT
vs POWER SUPPLY VOLTAGE
SLEW RATE vs TEMPERATURE
2.0
3.0
Curve shows normalized change in bias current
with respect to VS = ±10V. Typical I B may range
from –2nA to +2nA at V S = ±10V.
1.5
2.5
Positive Slew Rate
1.0
Negative Slew Rate
2.0
∆IB (nA)
Slew Rate (µV/V)
8
Supply Voltage (±V)
1.5
0.5
0
–0.5
1.0
–1.0
RLOAD = 2kΩ
CLOAD = 100pF
0.5
–1.5
–2.0
0
–75
–50
–25
0
25
50
75
100
0
125
5
10
CHANGE IN INPUT BIAS CURRENT
vs COMMON-MODE VOLTAGE
1.5
30
35
40
VS = ±15V, 10V Step
CL = 1500pF
RL = 2kΩ
Settling Time (µs)
∆IB (nA)
25
SETTLING TIME vs CLOSED-LOOP GAIN
0.5
0
20
100
Curve shows normalized change in bias current
with respect to VCM = 0V. Typical I B may range
from –2nA to +2nA at V CM = 0V.
1.0
15
Supply Voltage (V)
Temperature ( °C)
VS = ±15V
–0.5
0.01%
10
0.1%
VS = ±5V
–1.0
1
–1.5
–15
–10
–5
0
5
10
15
±1
Common-Mode Voltage (V)
±10
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±100
Gain (V/V)
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TYPICAL CHARACTERISTICS (continued)
At TA = 25°C, RL = 10 kΩ, VS = ±15 V (unless otherwise noted).
MAXIMUM OUTPUT VOLTAGE vs FREQUENCY
V+
14
(V+) –1V
13
(V+) –2V
12
–40°C
125°C
85°C
25°C
11
10
–10
–55°C
85°C
–11
(V+) –3V
–55°C
125°C
–12
(V–) +3V
–40°C
25°C
–13
30
VS = ±15V
25
Output Voltage (Vp-p)
Output Voltage Swing (V)
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
15
20
15
(V–) +2V
–14
VS = ±5V
10
5
(V–) +1V
–15
V–
0
10
20
30
40
50
0
60
1k
Output Current (mA)
10k
100k
1M
10M
Frequency (Hz)
SMALL-SIGNAL OVERSHOOT
vs LOAD CAPACITANCE
LARGE-SIGNAL STEP RESPONSE
G = –1, CL = 1500pF
70
Gain = +10
50
40
2V/div
Overshoot (%)
60
30
20
Gain = –10
Gain = –1
Gain = +1
10
0
1
10
100
1k
10k
100k
5µs/div
Load Capacitance (pF)
SMALL-SIGNAL STEP RESPONSE
G = +1, CL = 5pF
25mV/div
25mV/div
SMALL-SIGNAL STEP RESPONSE
G = +1, CL = 1000pF
400ns/div
8
400ns/div
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APPLICATION INFORMATION
Basic Connection
The OPA2227 is a precision operational amplifier with very low noise. It is unity-gain stable with a slew rate of
2.3 V/μs and 8-MHz bandwidth. Applications with noisy or high impedance power supplies may require
decoupling capacitors close to the device pins. In most cases, 0.1-μF capacitors are adequate.
Offset Voltage and Drift
The OPA2227 has very low offset voltage and drift. To achieve highest dc precision, circuit layout and
mechanical conditions should be optimized. Connections of dissimilar metals can generate thermal potentials at
the op amp inputs which can degrade the offset voltage and drift. These thermocouple effects can exceed the
inherent drift of the amplifier and ultimately degrade its performance. The thermal potentials can be made to
cancel by assuring that they are equal at both input terminals. In addition:
• Keep thermal mass of the connections made to the two input terminals similar.
• Locate heat sources as far as possible from the critical input circuitry.
• Shield operational amplifier and input circuitry from air currents such as those created by cooling fans.
Operating Voltage
OPA2227 operational amplifier operates from ±2.5-V to ±18-V supplies with excellent performance. Unlike most
operational amplifiers which are specified at only one supply voltage, the OPA2227 is specified for real-world
applications; a single set of specifications applies over the ±5-V to ±15-V supply range. Specifications are
assured for applications between ±5-V and ±15-V power supplies. Some applications do not require equal
positive and negative output voltage swing. Power supply voltages do not need to be equal. The OPA2227 can
operate with as little as 5 V between the supplies and with up to 36 V between the supplies. For example, the
positive supply could be set to 25 V with the negative supply at –5 V or vice-versa. In addition, key parameters
are assured over the specified temperature range, –55°C to 125°C. Parameters which vary significantly with
operating voltage or temperature are shown in the Typical Performance Curves.
Offset Voltage Adjustment
The OPA2227 is laser-trimmed for very low offset and drift so most applications will not require external
adjustment.
Input Protection
Back-to-back diodes (see Figure 2) are used for input protection on the OPA2227. Exceeding the turn-on
threshold of these diodes, as in a pulse condition, can cause current to flow through the input protection diodes
due to the amplifier’s finite slew rate. Without external current-limiting resistors, the input devices can be
destroyed. Sources of high input current can cause subtle damage to the amplifier. Although the unit may still be
functional, important parameters such as input offset voltage, drift, and noise may shift.
RF
500Ω
–
OPA2227
Input
Output
+
Figure 2. Pulsed Operation
When using the OPA2227 as a unity-gain buffer (follower), the input current should be limited to 20 mA. This can
be accomplished by inserting a feedback resistor or a resistor in series with the source. Sufficient resistor size
can be calculated:
RX = VS/20 mA - RSOURCE
(1)
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where RX is either in series with the source or inserted in the feedback path. For example, for a 10-V pulse
(VS = 10 V), total loop resistance must be 500 Ω. If the source impedance is large enough to sufficiently limit the
current on its own, no additional resistors are needed. The size of any external resistors must be carefully
chosen since they will increase noise. See the Noise Performance section of this data sheet for further
information on noise calculation. Figure 2 shows an example implementing a current limiting feedback resistor.
Input Bias Current Cancellation
The input bias current of the OPA2227 is internally compensated with an equal and opposite cancellation current.
The resulting input bias current is the difference between with input bias current and the cancellation current. The
residual input bias current can be positive or negative.
When the bias current is cancelled in this manner, the input bias current and input offset current are
approximately equal. A resistor added to cancel the effect of the input bias current (as shown in Figure 3) may
actually increase offset and noise and is therefore not recommended.
Conventional Op Amp Configuration
R2
R1
Op Amp
RB = R2 || R1
External Cancellation Resistor
Figure 3. Input Bias Current Cancellation
Noise Performance
Figure 4 shows total circuit noise for varying source impedances with the operational amplifier in a unity-gain
configuration (no feedback resistor network, therefore no additional noise contributions). Two different operational
amplifiers are shown with total circuit noise calculated. The OPA2227 has very low voltage noise, making it ideal
for low source impedances (less than 20 kΩ). A similar precision operational amplifier, the OPA277, has
somewhat higher voltage noise but lower current noise. It provides excellent noise performance at moderate
source impedance (10 kΩ to 100 kΩ). Above 100 kΩ, a FET-input op amp such as the OPA132 (very low current
noise) may provide improved performance. The equation is shown for the calculation of the total circuit noise.
Note that en = voltage noise, in = current noise, RS = source impedance, k = Boltzmann’s constant =
1.38 x 10–23 J/K and T is temperature in K. For more details on calculating noise, see “Basic Noise Calculations.”
VOLTAGE NOISE SPECTRAL DENSITY
vs SOURCE RESISTANCE
Votlage Noise Spectral Density, E 0
Typical at 1k (V/√Hz)
1.00+03
EO
OPA2227
RS
1.00E+02
Resistor Noise
OPA2227
1.00E+01
Resistor Noise
EO2 = en2 + (in RS)2 + 4kTRS
1.00E+00
100
1k
10k
100k
1M
Source Resistance, RS (Ω)
Figure 4. Noise Performance of the OPA2227 in Unity-Gain Buffer Configuration
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Basic Noise Calculations
Design of low noise operational amplifier circuits requires careful consideration of a variety of possible noise
contributors: noise from the signal source, noise generated in the operational amplifier, and noise from the
feedback network resistors. The total noise of the circuit is the root-sum-square combination of all noise
components.
The resistive portion of the source impedance produces thermal noise proportional to the square root of the
resistance. This function is shown plotted in Figure 4. Since the source impedance is usually fixed, select the
operational amplifier and the feedback resistors to minimize their contribution to the total noise.
Figure 4 shows total noise for varying source impedances with the operational amplifier in a unity-gain
configuration (no feedback resistor network and therefore no additional noise contributions). The operational
amplifier itself contributes both a voltage noise component and a current noise component. The voltage noise is
commonly modeled as a time-varying component of the offset voltage. The current noise is modeled as the timevarying component of the input bias current and reacts with the source resistance to create a voltage component
of noise. Consequently, the lowest noise operational amplifier for a given application depends on the source
impedance. For low source impedance, current noise is negligible and voltage noise generally dominates. For
high source impedance, current noise may dominate.
Figure 5 shows both inverting and noninverting operational amplifier circuit configurations with gain. In circuit
configurations with gain, the feedback network resistors also contribute noise. The current noise of the
operational amplifier reacts with the feedback resistors to create additional noise components. The feedback
resistor values can generally be chosen to make these noise sources negligible. The equations for total noise are
shown for both configurations.
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Noise in Noninverting Gain Configuration
R2
R1
EO
RS
VS
Noise in Inverting Gain Configuration
R2
R1
EO
RS
VS
For op amps at 1kHz, en = 3nV/√Hz and in = 0.4pA/√Hz.
Figure 5. Noise Calculation in Gain Configurations
12
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Figure 6 shows the 0.1-Hz to 10-Hz bandpass filter used to test the noise of the OPA2227. The filter circuit was
designed using Texas Instruments’ FilterPro software (available at www.ti.com). Figure 7 shows the configuration
of the OPA2227 for noise testing.
R1
2MΩ
R2
2MΩ
R8
402kΩ
R11
178kΩ
R3
1kΩ
R4
9.09kΩ
C4
22nF
C6
10nF
R6
40.2kΩ
C1
1µF
C2
1µF
U1
C3
0.47µF
(OPA2227)
Input from
Device
Under
Test
R7
97.6kΩ
R9
178kΩ
2
6
1
U2
3
R10
226kΩ
C5
0.47µF
(OPA2227)
5
U2
7
VOUT
(OPA2227)
R5
634kΩ
Figure 6. 0.1-Hz to 10-Hz Bandpass Filter Used to Test Wideband Noise of the OPA2227
22pF
100kΩ
10Ω
2
3
OPA2227
1
VOUT
Device
Under
Test
Figure 7. Noise Test Circuit
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1.1kΩ
1.43kΩ
2.2nF
dc Gain = 1
330pF
1.1kΩ
1.65kΩ
VIN
2
OPA2227
33nF
1.43kΩ
1
1.91kΩ
6
3
OPA2227
68nF
7
5
2.21kΩ
VOUT
10nF
fN = 13.86kHz
fN = 20.33kHz
Q = 1.186
Q = 4.519
f = 7.2kHz
Figure 8. Three-Pole, 20-kHz Low Pass, 0.5-dB Chebyshev Filter
0.1µF
100Ω
100kΩ
2
3
Dexter 1M
Thermopile
Detector
OPA2227
1
Output
NOTE: Use metal film resistors
and plastic film capacitor. Circuit
must be well shielded to achieve
low noise.
Responsivity ≈ 2.5 x 104V/W
Output Noise ≈ 30µVrms, 0.1Hz to 10Hz
Figure 9. Long-Wavelength Infrared Detector Amplifier
14
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OPA2227-EP
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SBOS594A – MARCH 2012 – REVISED NOVEMBER 2012
+15V
0.1µF
1kΩ
1kΩ
Audio
In
1/2
OPA2227
200Ω
200Ω
To
Headphone
1/2
OPA2227
This application uses two op amps
in parallel for higher output current drive.
0.1µF
–15V
Figure 10. Headphone Amplifier
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Bass Tone Control
R2
50kΩ
R1
7.5kΩ
3
1
CW
2
R3
7.5kΩ
R10
100kΩ
Midrange Tone Control
C1
940pF
R5
50kΩ
R4
2.7kΩ
3
VIN
CW
1
2
R6
2.7kΩ
C2
0.0047µF
Treble Tone Control
R7
7.5kΩ
R8
50kΩ
3
CW
1
2
R9
7.5kΩ
C3
680pF
R11
100kΩ
2
3
OPA2227
1
VOUT
Figure 11. Three-Band ActiveTone Control (Bass, Midrange and Treble)
16
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
OPA2227MDREP
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-3-260C-168 HR
-55 to 125
2227EP
V62/12610-01XE
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-3-260C-168 HR
-55 to 125
2227EP
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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