OPA2652

® OPA 265 2 OPA2652 For most current data sheet and other product information, visit www.burr-brown.com Dual, 700MHz, Voltage-Feedback OPERATIONAL AMPLIFIER TM FEATURES q WIDEBAND BUFFER: 700MHz, G = +1 q WIDEBAND LINE DRIVER: 200MHz, G = +2 q HIGH OUTPUT CURRENT: 140mA q LOW SUPPLY CURRENT: 5.5mA/Ch q ULTRA-SMALL PACKAGE: SOT23-8 q LOW dG/dφ : 0.05%/0.03° q HIGH SLEW RATE: 335V/µsec q SUPPLY VOLTAGE: ±3V to ±6V DESCRIPTION The OPA2652 is a dual, low-cost, wideband voltagefeedback amplifier intended for price sensitive applications. It features a high gain bandwidth product of 200MHz on only 5.5mA/chan quiescent current. Intended for operation on ±5V supplies, it will also support applications on a single supply from +6V to +12V with 140mA output current. Its classical differential input, voltage-feedback design allows wide application in active filters, integrators, transimpedance amplifiers, and differential receivers. The OPA2652 is internally compensated for unity gain stability. It has exceptional bandwidth (700MHz) as a unity gain buffer, with little peaking (0dB typically). Excellent DC accuracy is achieved with a low 1.5mV input offset voltage and 300nA input offset current. RELATED PRODUCTS SINGLES OPA650 OPA680 OPA631 OPA634 DUALS OPA2650 OPA2680 OPA2631 OPA2634 TRIPLES — OPA3680 — — QUADS OPA4650 — — — NOTES ±5V Spec +5V Capable +3V Capable +3V Capable APPLICATIONS q A/D DRIVERS q CONSUMER VIDEO q ACTIVE FILTERS q PULSE DELAY CIRCUITS q LOW COST UPGRADE TO THE AD8056 OR EL2210 200Ω – 402Ω +5V 1/2 OPA2652 24.9Ω 0.1µF 22pF 1.00kΩ 0.1µF CM +In +5V VIN 133Ω –In 1.00kΩ ADS807 12-Bit 53MHz 200Ω + 402Ω 24.9Ω 0.1µF 22pF 1/2 OPA2652 133Ω –5V Differential ADC Driver International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 © 2000 Burr-Brown Corporation PDS-1588B Printed in U.S.A. June, 2000 SPECIFICATIONS: VS = ±5V At TA = +25°C, G = +2, RF = 402Ω, and RL = 100Ω, unless otherwise noted. See Figures 1 and 2 for AC performance only. OPA2652U, E TYP +25°C 700 200 45 200 50 0 335 2.0 10 50 66 8 1.4 0.05 0.03 –100 63 ±1.5 4 ±0.3 56 ±7 15 ±1.0 55 5 20 ±1.4 54 7 25 ±2.0 GUARANTEED +25°C(2) 0°C to 70°C(3) –40°C to +85°C(3) MIN/ MAX typ typ typ typ typ typ typ typ typ typ typ typ typ typ typ typ min max max max max max max min min typ typ min min min min typ typ max max min min typ typ typ TEST LEVEL(1) C C C C C C C C C C C C C C C C A A B A B A B A A C C A A A A C C A A A A C C C PARAMETER AC PERFORMANCE Small-Signal Bandwidth CONDITIONS (Figures 1 and 2) G = +1, RF = 25Ω, VO = 200mVp-p G = +2, VO = 200mVp-p G = +5, VO = 200mVp-p G ≥ +10 VO = 200mVp-p G = +1, RF = 25Ω,VO = 200mVp-p 4V Step 200mV Step 4V Step VO = 4Vp-p VO = 2Vp-p, 5MHz f > 1MHz f > 1MHz NTSC, RL = 150Ω NTSC, RL = 150Ω f = 5MHz VCM = 0V UNITS MHz MHz MHz MHz MHz dB V/µs ns ns MHz dB nV/√Hz pA/√Hz % degrees dBc dB mV µV/°C µA µA/°C µA µA/°C V dB kΩ || pF MΩ || pF Gain Bandwidth Product Bandwidth for 0.1dB Flatness Peaking at a Gain of +1 Slew Rate Rise/Fall Time Large Signal Bandwidth SFDR Input Voltage Noise Input Current Noise Differential Gain Error Differential Phase Error Channel-to-Channel Crosstalk DC PERFORMANCE(4) Open-Loop Voltage Gain Input Offset Voltage Average Offset Drift Input Bias Current Input Bias Current Drift Input Offset Current Input Offset Current Drift INPUT(4) Common-Mode Input Range Common-Mode Rejection Ratio Input Impedance Differential Common Mode OUTPUT Voltage Output Swing Output Current, Sourcing Output Current, Sinking Closed-Loop Output Impedance POWER SUPPLY Specified Operating Voltage Maximum Operating Voltage Maximum Quiescent Current Minimum Quiescent Current Power Supply Rejection Ratio (–PSRR) THERMAL CHARACTERISTICS Specified Operating Temperature Range Thermal Resistance, θJA U SO-8 E SOT23-8 ±4.0 95 VCM = 0V 35 || 1 18 || 1 1kΩ Load 100Ω Load VO = 0V VO = 0V f < 100kHz ±3.0 ±2.5 140 140 0.06 ±5 Total Both Channels Total Both Channels Input Referred U, E Package Junction-to-Ambient 11 11 58 –40 to +85 125 150 ±3.0 75 ±2.8 ±2.7 ±2.4 ±2.2 100 100 85 85 75 75 V V mA mA Ω V V mA mA dB °C °C/W °C/W ±6 13.2 8.8 54 ±6 14 8 ±6 15.5 7.5 NOTES: (1) Test Levels: (A) 100% tested at 25°C. Over temperature limits by characterization and simulation. (B) Limits set by characterization and simulation. (C) Typical value only for information. (2) Junction temperature = ambient for 25°C guaranteed specifications. (3) Junction temperature = ambient at low temperature limit: junction temperature = ambient +23°C at high temperature limit for over temperature guaranteed specifications. (4) Current is considered positive-out-of node. VCM is the input common-mode voltage. ® OPA2652 2 PIN CONFIGURATION Top View SO-8 SOT23-8 ELECTROSTATIC DISCHARGE SENSITIVITY Electrostatic discharge can cause damage ranging from performance degradation to complete device failure. Burr-Brown Corporation recommends that all integrated circuits be handled and stored using appropriate ESD protection methods. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet published specifications. ABSOLUTE MAXIMUM RATINGS Supply Voltage ................................................................................. ±6.5V Internal Power Dissipation ........................... See Thermal Characteristics Differential Input Voltage .................................................................. ±1.2V Input Voltage Range ............................................................................ ±VS Storage Temperature Range ......................................... –40°C to +125°C Lead Temperature (SO-8) ............................................................. +260°C Junction Temperature (TJ ) ........................................................... +175°C ESD Rating (Human Body Model) .................................................. 2000V (Machine Model) ........................................................... 200V OPA2652 Out A –In A +In A –VS 1 2 3 4 8 7 6 5 +VS Out B –In B +In B SOT23-8 Marking / Pin Orientation C52 Pin 1 PACKAGE/ORDERING INFORMATION PACKAGE DRAWING NUMBER 182 SPECIFIED TEMPERATURE RANGE –40°C to +85°C PACKAGE MARKING OPA2652U ORDERING NUMBER(1) OPA2652U OPA2652U/2K5 OPA2652E/250 OPA2652E/3K TRANSPORT MEDIA Rails Tape and Reel Tape and Reel Tape and Reel PRODUCT OPA2652U PACKAGE SO-8 Surface Mount " OPA2652E " SOT23-8 Surface Mount " 348 " –40°C to +85°C " C52 " " " " " NOTE: (1) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /3K indicates 3000 devices per reel). Ordering 3000 pieces of “OPA2652U/3K” will get a single 3000-piece Tape and Reel. The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. ® 3 OPA2652 TYPICAL PERFORMANCE CURVES: VS = ±5V At TA = +25°C, G = +2, RF = 402Ω, and RL = 100Ω, unless otherwise noted. See Figures 1 and 2. NON-INVERTING SMALL-SIGNAL FREQUENCY RESPONSE 6 3 VO = 0.2Vp-p G = +1 RF = 25Ω 6 3 INVERTING SMALL-SIGNAL FREQUENCY RESPONSE VO = 0.2Vp-p G = –1 Normalized Gain (dB) –3 –6 –9 –12 –15 –18 –21 –24 1M 10M 100M Frequency (Hz) 1G G = +10 G = +5 G = +2 Normalized Gain (dB) 0 0 –3 –6 –9 –12 –15 –18 –21 –24 1M 10M 100M Frequency (Hz) G = –5 G = –2 G = –10 1G NON-INVERTING LARGE-SIGNAL FREQUENCY RESPONSE 6 3 G = +2 VO ≤ 1Vp-p INVERTING LARGE-SIGNAL FREQUENCY RESPONSE 6 3 Normalized Gain (dB) G = –1 VO = 0.5Vp-p Normalized Gain (dB) 0 –3 –6 –9 –12 –15 –18 –21 –24 1M 10M 100M Frequency (Hz) VO = 4Vp-p VO = 2Vp-p 0 –3 –6 –9 –12 –15 –18 –21 –24 VO = 1.0Vp-p VO = 2.0Vp-p 1G 1M 10M 100M Frequency (Hz) 1G NON-INVERTING PULSE RESPONSE G = +2 INVERTING PULSE RESPONSE G = –1 Output Voltage (800mV/div) Output Voltage (800mV/div) Output Voltage (50mV/div) 200mVp-p 200mVp-p Time (5ns/div) Time (5ns/div) ® OPA2652 4 Output Voltage (50mV/div) 4Vp-p 4Vp-p TYPICAL PERFORMANCE CURVES: VS = ±5V (Cont.) At TA = +25°C, G = +2, RF = 402Ω, and RL = 100Ω, unless otherwise noted. See Figures 1 and 2. HARMONIC DISTORTION vs NON-INVERTING GAIN –50 VO = 2Vp-p f = 5MHz 3rd Harmonic –50 HARMONIC DISTORTION vs INVERTING GAIN VO = 2Vp-p f = 5MHz 3rd Harmonic Harmonic Distortion (dBc) –60 2nd Harmonic –70 Harmonic Distortion (dBc) –60 2nd Harmonic –70 –80 –80 –90 1 Gain Magnitude (V/V) 10 –90 1 Gain Magnitude (V/V) 10 HARMONIC DISTORTION vs OUTPUT VOLTAGE –50 f = 5MHz Harmonic Distortion (dBc) HARMONIC DISTORTION vs FREQUENCY –50 VO = 2Vp-p Harmonic Distortion (dBc) –60 3rd Harmonic –70 2nd Harmonic –80 –60 3rd Harmonic –70 –80 2nd Harmonic –90 0.1 1 Output Voltage (Vp-p) 4 –90 0.1 1 Frequency (MHz) 10 20 HARMONIC DISTORTION vs LOAD RESISTANCE –50 VO = 2Vp-p f = 5MHz –60 3rd Harmonic –70 2nd Harmonic –80 HARMONIC DISTORTION vs SUPPLY VOLTAGE –50 VO = 2Vp-p f = 5MHz Harmonic Distortion (dBc) Harmonic Distortion (dBc) –60 3rd Harmonic –70 2nd Harmonic –80 –90 100 RL (Ω) 1000 –90 ±3 ±4 ±5 ±6 Supply Voltage (V) ® 5 OPA2652 TYPICAL PERFORMANCE CURVES: VS = ±5V (Cont.) At TA = +25°C, G = +2, RF = 402Ω, and RL = 100Ω, unless otherwise noted. See Figures 1 and 2. TWO-TONE, 3rd-ORDER SPURIOUS LEVEL –50 0.30 COMPOSITE VIDEO dG/dφ dφ, Positive Video 0.25 3rd-Order Spurious Level (dBc) –60 20MHz dG/dφ (%/°) 0.20 0.15 0.10 0.05 0.00 dG, Positive Video dG, Negative Video 1 2 3 4 Number of 150Ω Loads dφ, Negative Video 10MHz –70 5MHz 2MHz –80 1MHz –90 –8 –6 –4 Load Power at matched 50Ω load –2 0 2 4 Single-Tone Load Power (dBm) INPUT VOLTAGE AND CURRENT NOISE DENSITY 100 –30 CHANNEL-TO-CHANNEL CROSSTALK Crosstalk, Input-Referred (dB) 10M –40 –50 –60 –70 –80 –90 Voltage Noise (nV/√Hz) Current Noise (pA/√Hz) Voltage Noise = 8.0nV/√Hz 10 Current Noise = 1.4pA/√Hz 1 100 1k 10k 100k 1M Frequency (Hz) 10 100 Frequency (MHz) 1000 RECOMMENDED RS vs CAPACITIVE LOAD Normalized Gain to Capacitive Load (dB) 70 60 50 FREQUENCY RESPONSE vs CAPACITIVE LOAD 2 1 0 –1 –2 –3 –4 –5 –6 –7 –8 0 10M 100M Frequency (Hz) 1G 1/2 OPA2652 G = +2 CL = 10pF CL = 22pF CL = 100pF RS (Ω) 40 30 20 10 0 1 10 100 1000 Capacitive Load (pF) RS VO CL = 47pF CL 1kΩ ® OPA2652 6 TYPICAL PERFORMANCE CURVES: VS = ±5V (Cont.) At TA = +25°C, G = +2, RF = 402Ω, and RL = 100Ω, unless otherwise noted. See Figures 1 and 2. CMRR AND PSRR vs FREQUENCY 100 70 CMRR 60 OPEN-LOOP GAIN AND PHASE 0 –30 Open-Loop Phase Power Supply Rejection Ratio (dB) Common-Mode Rejection Ratio (dB) 90 80 Open-Loop Gain (dB) 70 60 50 40 30 20 10 0 1k +PSRR –PSRR 40 30 20 10 0 –10 Open-Loop Gain –90 –120 –150 –180 –210 –240 10k 100k 1M 10M 100M 1G Frequency (Hz) 10k 100k 1M 10M 100M Frequency (Hz) CLOSED-LOOP OUTPUT IMPEDANCE vs FREQUENCY 100 200Ω OUTPUT VOLTAGE AND CURRENT LIMITATIONS 5 4 Output Current Limited 1/2 OPA2652 Output Impedance (Ω) 10 402Ω 402Ω ZO 3 2 VO (V) 1W Internal Power Limit 1 0 –1 1 100Ω Load Line 50Ω Load Line 20Ω Load Line 10Ω Load Line Output Current Limit 1W Internal Power Limit 0 IO (mA) 50 100 150 200 0.1 –2 –3 –4 0.01 10k 100k 1M 10M 100M 400M Frequency (Hz) –5 –200 –150 –100 –50 NON-INVERTING OVERDRIVE RECOVERY 5 4 3 VIN VOUT 2.5 G = +2 2.0 1.5 5 4 INVERTING OVERDRIVE RECOVERY G = –1 VIN Input and Output Voltage (V) 3 2 1 0 –1 –2 –3 –4 –5 VOUT Output Voltage (V) 1 0 –1 –2 –3 –4 –5 Time (20ns/div) 0 0.50 –0.5 –1.0 –2.0 –2.5 Input Voltage (V) 2 1.0 Time (20ns/div) 7 OPA2652 Open-Loop Phase (°) ® 50 –60 TYPICAL PERFORMANCE CURVES: VS = ±5V (Cont.) At TA = +25°C, G = +2, RF = 402Ω, and RL = 100Ω, unless otherwise noted. See Figures 1 and 2. TYPICAL DC DRIFT OVER TEMPERATURE SUPPLY AND OUTPUT CURRENT vs TEMPERATURE 250 Sourcing Output Current 200 Output Current (mA) Input Offset Voltage (mV) Input Bias and Offset Current (µA) 6 5 4 3 2 1 0 –1 –2 –3 –4 –5 –6 –40 –20 0 20 40 60 80 100 Ambient Temperature (°C) 25 20 Sinking Output Current Supply Current (mA) IOS VOS IB 150 15 100 Quiescent Supply Current (Both Channels) 50 10 5 0 –40 –20 0 20 40 60 80 100 Ambient Temperature (°C) 0 COMMON-MODE INPUT VOLTAGE RANGE AND OUTPUT SWING vs SUPPLY VOLTAGE 6 Positive Common-Mode Input Range 5 Negative Common-Mode Input Range 4 3 2 Negative Output Voltage Range 1 Positive Output Voltage Range 0 ±3 ±4 ±5 ±6 Voltage Range (V) Supply Voltage (V) ® OPA2652 8 APPLICATIONS INFORMATION WIDEBAND VOLTAGE FEEDBACK OPERATION The OPA2652 is a dual low power, wideband voltage feedback operational amplifier. Each channel is internally compensated to provide unity gain stability. The OPA2652’s voltage feedback architecture features true differential and fully symmetrical inputs. This minimizes offset errors, making the OPA2652 well suited for implementing filter and instrumentation designs. As a dual operational amplifier, OPA2652 is an ideal choice for designs requiring multiple channels where reduction of board space, power dissipation and cost are critical. Its AC performance is optimized to provide a gain bandwidth product of 200MHz and a fast rise time of 2.0ns, which is an important consideration in high speed data conversion applications. The low DC input offset of ±1.5mV and drift of ±5µV/°C support high accuracy requirements. In applications requiring a higher slew rate and wider bandwidth, such as video and high bit rate digital communications, consider the dual current feedback OPA2658, or OPA2681. Figure 1 shows the DC-coupled, gain of +2, dual power supply circuit configuration used as the basis of the ±5V Specifications and Typical Performance Curves. This is for one channel. The other channel is connected similarly. For test purposes, the input impedance is set to 50Ω with a resistor to ground and the output impedance is set to 50Ω with a series output resistor. Voltage swings reported in the specifications are taken directly at the input and output pins, while output powers (dBm) are at the matched 50Ω load. For the circuit of Figure 1, the total effective load will be 100Ω || 804Ω. Two optional components are included in Figure 1. An additional resistor (174Ω) is included in series with the non-inverting input. Combined with the 25Ω DC source resistance looking back towards the signal generator, this gives an input bias current cancelling resistance that matches the 201Ω source resistance seen at the inverting input (see the DC Accuracy and Offset Control section). In addition to the usual power supply decoupling capacitors to ground, a 0.1µF capacitor is included between the two power supply pins. In practical PC board layouts, this optional-added capacitor will typically improve the 2nd harmonic distortion performance by 3dB to 6dB. Figure 2 shows the DC-coupled gain of –1, bipolar supply circuit configuration which is the basis of the Specifications and Typical Performance Curves at G = –1. The input impedance matching resistor (57.6Ω) used for testing gives a 50Ω input load. A resistor (205Ω) connects the non-inverting input to ground. This provides the DC source resistance matching to cancel outputs errors due to input bias current. +5V 0.1µF 0.1µF + 6.8µF RB 205Ω 1/2 OPA2652 RO VO 49.9Ω 50Ω Load 50Ω +5V 0.1µF 6.8µF + Source VI RG 402Ω RF 402Ω VO = –1 VI RM 57.6Ω 0.1µF 50Ω Source + 6.8µF 174Ω 49.9Ω VI 1/2 OPA2652 VO 49.9Ω 50Ω Load –5V 0.1µF RF 402Ω FIGURE 2. DC-Coupled, G = –1, Bipolar Supply, Specification and Test Circuit. DIFFERENTIAL ADC DRIVER RG 402Ω + –5V 6.8µF 0.1µF FIGURE 1. DC-Coupled, G = +2, Bipolar Supply, Specification and Test Circuit. The circuit on the front page shows an OPA2652 driving the ADS807 A/D converter differentially, at a gain of +2V/V. The outputs are AC-coupled to the converter to adjust for the difference in supply voltages. The 133Ω resistors at the noninverting inputs minimize DC offset errors. The differential topology minimizes even-order distortion products, such as second-harmonic distortion. ® 9 OPA2652 BANDPASS FILTER Figure 3 shows a single OPA2652 implementing a sixthorder bandpass filter. This filter cascades two second-order Sallen-Key sections with transmission zeros, and a double real pole section. It has 0.3dB of ripple, –3dB frequencies of 450kHz and 11MHz, and –23dB frequencies of 315kHz and 16MHz. The 20.0Ω resistor isolates the first OPA2652 output from capacitive loading. This improves stability with minimal impact on the filter response. Figure 4 shows the nominal response simulated by SPICE. VIDEO LINE DRIVER Figure 5 shows the OPA2652 used as a video line driver. Its outstanding differential gain and phase allow it to be used in studio equipment, while its low cost and SOT23-8 package option will support consumer applications. +5V Video Input 75.0Ω 1/2 OPA2652 75.0Ω Video Output 0 –5 –10 402Ω –5V 402Ω Gain (dB) –15 –20 –25 –30 –35 –40 10k FIGURE 5. Video Line Driver. PULSE DELAY CIRCUIT Figure 6 shows the OPA2652 used in a pulse delay circuit. This circuit cascades the two op amps in the OPA2652, each forming a single pole, active allpass filter. The overall gain is +1, and the overall delay through the filter is: tGD = n (2RC), overall group delay n= 2, the number of cascaded stages 100k 1M Frequency (Hz) 10M 100M FIGURE 4. Nominal Filter Response. 2.2nF +5V 140Ω 2.10kΩ 1/2 OPA2652 1% Resistors 5% Capacitors VIN 1.30kΩ 1.0nF 1.0nF –5V 143Ω 24.9Ω 180pF +5V 225Ω 200Ω VOUT 100pF 100Ω –5V 24.9Ω 107Ω 2.7nF 1/2 OPA2652 18pF 20.0Ω 12pF 150pF 158Ω FIGURE 3. Bandpass Filter. ® OPA2652 10 +5V C VIN R 1/2 OPA2652 C +5V R 1/2 OPA2652 VO –5V RG 402Ω RF 402Ω 402Ω –5V 402Ω FIGURE 6. Pulse Delay Circuit. RF and RG need to be equal to maintain a constant gain magnitude. The rise and fall times of the input pulses (tr(IN) ) should be slow enough to prevent pre-shoot artifacts in the response. tr (IN) ≥ 5RC, minimal pre-shoot SIMPLE BANDPASS FILTER Figure 7 shows the OPA2652 used as simple bandpass filter. The OPA2652 is well suited for this type of circuit because it is very stable at a noise gain of +1. MACROMODELS AND APPLICATIONS SUPPORT Computer simulation of circuit performance using SPICE is often useful when analyzing the performance of analog circuits and systems. This is particularly true for Video and RF amplifier circuits where parasitic capacitance and inductance can have a major effect on circuit performance. Check the Burr-Brown web site (www.burr-brown.com) for available SPICE products (not all parts have models). These models do a good job of predicting small-signal AC and transient performance under a wide variety of operating conditions. They do not do as well in predicting the harmonic distortion or dG/dφ characteristics. These models do not attempt to distinguish between the package types in their small-signal AC performance. C2 C1 VIN 402Ω 402Ω VOUT +5V OPERATING SUGGESTIONS OPTIMIZING RESISTOR VALUES Since the OPA2652 is a unity gain stable voltage feedback op amp, a wide range of resistor values may be used for the feedback and gain setting resistors. The primary limits on these values are set by dynamic range (noise and distortion) and parasitic capacitance considerations. For a non-inverting unity gain follower application, the feedback connection should be made with a 25Ω resistor, not a direct short. This will isolate the inverting input capacitance from the output pin and improve the frequency response flatness. Usually, the feedback resistor value should be between 200Ω and 1.5kΩ. Below 200Ω, the feedback network will present additional output loading which can degrade the harmonic distortion performance of the OPA2652. Above 1.5kΩ, the typical parasitic capacitance (approximately 0.2pF) across the feedback resistor may cause unintentional band-limiting in the amplifier response. A good rule of thumb is to target the parallel combination of RF and RG (Figure 1) to be less than approximately 300Ω. The combined impedance RF || RG interacts with the inverting input capacitance, placing an additional pole in the feedback network, and thus a zero in the forward response. Assuming a 2pF total parasitic on the inverting node, holding RF || RG < 300Ω will keep this pole above 250MHz. By itself, this constraint implies that the feedback resistor RF can increase to several kΩ at high gains. This is acceptable as long as the pole formed by RF and any parasitic capacitance appearing in parallel is kept out of the frequency range of interest. ® 1/2 OPA2652 402Ω –5V FIGURE 7. Inverting Bandpass Filter. DESIGN-IN TOOLS DEMONSTRATION BOARDS PC boards are available to assist in the initial evaluation of circuit performance using the OPA2652. They are available free as unpopulated PC boards delivered with descriptive documentation. The summary information for these boards is shown below: BOARD PART NUMBER DEM-OPA26xU DEM-OPA2652E PRODUCT OPA2652U OPA2652E PACKAGE 8-Lead SO-8 SOT23-8 ORDERING NUMBER MKT-352 MKT-365 Contact the Burr-Brown Applications support line to request this board. 11 OPA2652 BANDWIDTH VS GAIN: NON-INVERTING OPERATION Voltage feedback op amps exhibit decreasing closed-loop bandwidth as the signal gain is increased. In theory, this relationship is described by the Gain Bandwidth Product (GBP) shown in the specifications. Ideally, dividing GBP by the non-inverting signal gain (also called the Noise Gain, or NG) will predict the closed-loop bandwidth. In practice, this only holds true when the phase margin approaches 90°, as it does in high gain configurations. At low gains (increased feedback factor), most amplifiers will exhibit a wider bandwidth and lower phase margin. The OPA2652 is compensated to give a flat response in a non-inverting gain of 1 (Figure 1). This results in a typical gain of +1 bandwidth of 700MHz, far exceeding that predicted by dividing the 200MHz GBP by NG = 1. Increasing the gain will cause the phase margin to approach 90° and the bandwidth to more closely approach the predicted value of (GBP/NG). At a gain of +5, the 45MHz bandwidth shown in the Typical Specifications is close to that predicted using this simple formula. INVERTING AMPLIFIER OPERATION Since the OPA2652 is a general purpose, wideband voltage feedback op amp, all of the familiar op amp application circuits are available to the designer. Inverting operation is one of the more common requirements and offers several performance benefits. Figure 2 shows a typical inverting configuration. In the inverting configuration, three key design consideration must be noted. The first is that the gain resistor (RG) becomes part of the signal channel input impedance. If input impedance matching is desired (which is beneficial whenever the signal is coupled through a cable, twisted pair, long PC board trace or other transmission line conductor), RG may be set equal to the required termination value and RF adjusted to give the desired gain. This is the simplest approach and results in optimum bandwidth and noise performance. However, at low inverting gains, the resultant feedback resistor value can present a significant load to the amplifier output. For an inverting gain of –1, setting RG to 50Ω for input matching eliminates the need for RM but requires a 50Ω feedback resistor. This has the interesting advantage that the noise gain becomes equal to 2 for a 50Ω source impedance—the same as the non-inverting circuits considered above. However, the amplifier output will now see the 50Ω feedback resistor in parallel with the external load. In general, the feedback resistor should be limited to the 200Ω to 1.5kΩ range. In this case, it is preferable to increase both the RF and RG values as shown in Figure 2, and then achieve the input matching impedance with a third resistor (RM) to ground. The total input impedance becomes the parallel combination of RG and RM. The second major consideration, touched on in the previous paragraph, is that the signal source impedance becomes part of the noise gain equation and influences the bandwidth. For the example in Figure 2, the RM value combines in parallel with the external 50Ω source impedance, yielding an effec- tive driving impedance of 50Ω || 57.6Ω = 26.8Ω. This impedance is added in series with RG for calculating the noise gain (NG). The resultant NG is 1.94 for Figure 2, (an ideal 0Ω source would cause NG = 2.00). The third important consideration in inverting amplifier design is setting the bias current cancellation resistor on the non-inverting input (RB). If this resistor is set equal to the total DC resistance looking out of the inverting node, the output DC error, due to the input bias currents, will be reduced to (Input Offset Current) • RF. If the 50Ω source impedance is DC-coupled in Figure 2, the total resistance to ground on the inverting input will be 429Ω. Combining this in parallel with the feedback resistor gives 208Ω, which is close to the RB = 205Ω used in Figure 2. To reduce the additional high frequency noise introduced by this resistor, it is sometimes bypassed with a capacitor. As long as RB