OPA2727AIDR

          OPA 4727 OPA 2727 OP A7 27 OP A7 28 OP A2 727 OP A7 27 OP A7 28 OPA727, OPA2727 OPA4727, OPA728 SBOS314H – SEPTEMBER 2004 – REVISED APRIL 2007 e-trim™ 20MHz, High Precision CMOS Operational Amplifier FEATURES • • • • • • • • • • DESCRIPTION OFFSET: 15µV (typ), 150µV (max) DRIFT: 0.3µV/°C (typ), 1.5µV/°C (max) BANDWIDTH: 20MHz SLEW RATE: 30V/µs BIAS CURRENT: 500pA (max) LOW NOISE: 6nV/√Hz at 100kHz THD+N: 0.0003% at 1kHz QUIESCENT CURRENT: 4.3mA/ch SUPPLY VOLTAGE: 4V to 12V SHUTDOWN MODE (OPA728): 6µA APPLICATIONS • • • • • • • • • OPTICAL NETWORKING TRANSIMPEDANCE AMPLIFIERS INTEGRATORS ACTIVE FILTERS A/D CONVERTER DRIVERS I/V CONVERTER FOR DACs HIGH PERFORMANCE AUDIO PROCESS CONTROL TEST EQUIPMENT OPAx727 AND OPAx728 RELATED PRODUCTS FEATURES PRODUCT 20MHz, 3mV, 4µV/°C (non-e-trim version of OPA727) OPA725 20MHz, 3mV, 4µV/°C, Shutdown (non-e-trim version of OPA728) OPA726 +12V OPA727 l VOUT The OPA727 and OPA728 series op amps use a state-of-the-art 12V analog CMOS process and e-trim, a package-level trim, offering outstanding dc precision and ac performance. The extremely low offset (150µV max) and drift (1.5µV/°C) are achieved by trimming the IC digitally after packaging to avoid the shift in parameters as a result of stresses during package assembly. To correct for offset drift, the OPA727 and OPA728 family is trimmed over temperature. The devices feature very high CMRR and open-loop gain to minimize errors. Excellent ac characteristics, such as 20MHz GBW, 30V/µs slew rate and 0.0003% THD+N make the OPA727 and OPA728 well-suited for communication, high-end audio, and active filter applications. With a bias current of less than 500pA, they are well suited for use as transimpedance (I/V-conversion) amplifiers for monitoring optical power in ONET applications. Optimized for single-supply operation up to 12V, the input common-mode range extends to GND for true single-supply functionality. The output swings to within 150mV of the rails, maximizing dynamic range. The low quiescent current of 4.3mA makes it well-suited for use in battery-operated equipment. The OPA728 shutdown version reduces the quiescent current to typically 6µA and features a reference pin for easy shutdown operation with standard CMOS logic in dual-supply applications. For ease of use, the OPA727 and OPA728 op amp families are fully specified and tested over the supply range of 4V to 12V. The OPA727 (single) and OPA728 (single with shutdown) are available in MSOP-8 and DFN-8; the OPA2727 (dual) is available in DFN-8 and SO-8; and the quad version OPA4727 in TSSOP-14. All versions are specified for operation from –40°C to +125°C. -VB Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. e-trim is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2004–2007, Texas Instruments Incorporated OPA727,, OPA2727 OPA4727, OPA728 www.ti.com SBOS314H – SEPTEMBER 2004 – REVISED APRIL 2007 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGE/ORDERING INFORMATION (1) PRODUCT PACKAGE-LEAD PACKAGE DESIGNATOR PACKAGE MARKING MSOP-8 DGK AUE DFN-8 DRB NSF DFN-8 DRB NSD SO-8 D O2727A TSSOP-14 PW OPA4727 MSOP-8 DGK AUF DFN-8 DRB NSG Non-Shutdown OPA727 OPA2727 OPA4727 Shutdown OPA728 (1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. ABSOLUTE MAXIMUM RATINGS (1) Supply Voltage Signal Input Terminals UNIT +13.2 V Voltage (2) –0.5 to (V+) + 0.5 V Current (2) ±10 mA Output Short-Circuit (3) Continuous Operating Temperature –55 to +125 °C Storage Temperature –55 to +150 °C Junction Temperature +150 °C Human Body Model 2000 V Charged Device Model 1000 V ESD Rating (1) (2) (3) 2 OPA727, OPA2727 OPA4727, OPA728 Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not supported. Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5V beyond the supply rails should be current limited to 10mA or less. Short-circuit to ground, one amplifier per package. Submit Documentation Feedback OPA727,, OPA2727 OPA4727, OPA728 www.ti.com SBOS314H – SEPTEMBER 2004 – REVISED APRIL 2007 PIN CONFIGURATIONS OPA727 MSOP-8 (TOP VIEW) (1) OPA2727 SO-8 (TOP VIEW) (1) 1 8 NC -IN 2 7 V+ +IN 3 6 OUT NC V- 4 NC 5 OUT A 1 -IN A 2 +IN A 3 V- 4 (1) -IN 2 +IN 3 Exposed Thermal Die Pad on (2) Underside (3) 1 2 -IN -IN A 2 6 OUT +IN A 3 (1) 8 Enable 7 V+ 3 6 V- 4 5 NC OUT A V- 4 +IN B 7 OUT B 6 -IN B 5 +IN B 14 OUT D 1 A D 13 -IN D -IN A 2 +IN A 3 12 +IN D V+ 4 11 V- +IN B 5 10 +IN C -IN B 6 OUT B 7 B C 9 -IN C 8 OUT C 8 Enable 1 +IN 3 5 (1) OPA728 DFN-8 (TOP VIEW) -IN 2 -IN B OPA4727 TSSOP-14 (TOP VIEW) +IN (3) Exposed Thermal Die Pad on (2) Underside V- 4 OUT REF 6 8 V+ OUT A 1 OPA728 MSOP-8 (TOP VIEW) REF OUT B (1) 7 V+ 5 NC V- 4 7 OPA2727 DFN-8 (TOP VIEW) 8 NC 1 B V+ (1) OPA727 DFN-8 (TOP VIEW) NC A 8 Exposed Thermal Die Pad on Underside(2) 7 V+ 6 OUT 5 NC (1) Notes: 1. NC denotes no internal connection. 2. Connect thermal die pad to V–. 3. REF is the reference voltage for ENABLE pin. Submit Documentation Feedback 3 OPA727,, OPA2727 OPA4727, OPA728 www.ti.com SBOS314H – SEPTEMBER 2004 – REVISED APRIL 2007 ELECTRICAL CHARACTERISTICS: VS = +4V to +12V or VS = ±2V to ±6V Boldface limits apply over the specified temperature range, TA = –40°C to +125°C. At TA = +25°C, RL = 10kΩ connected to VS/2, and VOUT = VS/2, unless otherwise noted. OPA727, OPA728, OPA2727, OPA4727 PARAMETER CONDITIONS MIN TYP MAX UNIT OPA727 DFN, OPA728 DFN Packages 15 150 µV OPA727 MSOP, OPA728 MSOP Packages 15 300 µV OPA2727 15 150 µV OPA4727 15 175 µV 0°C to +85°C 0.3 1.5 µV/°C –40°C to +125°C 0.6 3 µV/°C VS = ±2V to ±6V, VCM = V– 30 150 µV/V 150 µV/V OFFSET VOLTAGE Input Offset Voltage Drift VOS dVOS/dT vs Power Supply PSRR VS = ±5V, VCM = 0V VS = ±2V to ±6V, VCM = V– Over Temperature Channel Separation, dc µV/V 1 INPUT BIAS CURRENT ±85 Input Bias Current Over Temperature Input Ofset Current ±500 pA See Typical Characteristics ±10 IOS ±100 pA NOISE Input Voltage Noise, f = 0.1Hz to 10Hz en VS = ±6V, VCM = 0V 10 µVPP Input Voltage Noise Density, f = 10kHz en VS = ±6V, VCM = 0V 10 nV/√Hz Input Voltage Noise Density, f = 100kHz en VS = ±6V, VCM = 0V 6 nV/√Hz in VS = ±6V, VCM = 0V 2.5 fA/√Hz Input Current Noise Density, f = 1kHz INPUT VOLTAGE RANGE Common-Mode Voltage Range VCM Common-Mode Rejection Ratio CMRR Over Temperature Over Temperature (V–) (V–) ≤ VCM ≤ (V+) – 2.5V 86 (V–) ≤ VCM ≤ (V+) – 2.5V 84 (V–) ≤ VCM ≤ (V+) – 3V 94 (V–) ≤ VCM ≤ (V+) – 3V 84 (V+)–2.5 94 V dB dB 100 dB dB INPUT IMPEDANCE Differential 1011 || 5 Ω || pF Common-Mode 1011 || 4 Ω || pF 120 dB OPEN-LOOP GAIN Open-Loop Voltage Gain AOL Over Temperature RL = 100kΩ, 0.15V < VO < (V+) –0.15V 110 RL = 100kΩ, 0.15V < VO < (V+) –0.15V 100 RL = 1kΩ, 0.25V < VO < (V+) –0.25V 106 Over Temperature, OPA727, OPA728 RL = 1kΩ, 0.25V < VO < (V+) –0.25V 96 dB Over Temperature, OPA2727, OPA4727 RL = 1kΩ, 0.35V < VO < (V+) –0.35V 96 dB FREQUENCY RESPONSE Gain-Bandwidth Product Slew Rate Settling Time, GBW ts 0.01% Overload Recovery Time Total Harmonic Distortion + Noise 116 dB CL = 20 pF SR Settling Time, 0.1% THD+N 20 MHz G = +1 30 V/µs VS = ±6V, 5V Step, G = +1 350 ns VS = ±6V, 5V Step, G = +1 450 ns VIN × Gain > VS 50 ns VS = ±6V, VOUT = 2VRMS, RL = 600Ω, 0.003 % G = +1, f = 1kHz 4 dB Submit Documentation Feedback OPA727,, OPA2727 OPA4727, OPA728 www.ti.com SBOS314H – SEPTEMBER 2004 – REVISED APRIL 2007 ELECTRICAL CHARACTERISTICS: VS = +4V to +12V or VS = ±2V to ±6V (continued) Boldface limits apply over the specified temperature range, TA = –40°C to +125°C. At TA = +25°C, RL = 10kΩ connected to VS/2, and VOUT = VS/2, unless otherwise noted. OPA727, OPA728, OPA2727, OPA4727 PARAMETER CONDITIONS MIN TYP MAX UNIT 100 150 mV 150 mV OUTPUT Voltage Output Swing from Rail RL = 100kΩ, AOL > 110dB Over Temperature RL = 100kΩ, AOL > 100dB RL = 1kΩ, AOL > 106dB Over Temperature, OPA727, OPA728 Over Temperature, OPA2727, OPA4727 Output Current Short-Circuit Current Capacitive Load Drive 200 RL = 1kΩ, AOL > 96dB RL = 1kΩ, AOL > 96dB IOUT |VS – VOUT| < 1V ISC CLOAD 250 mV 250 mV 350 mV 40 mA ±55 mA See Typical Characteristics 40 Ω tOFF 5 µs tON 80 µs Open-Loop Output Impedance f = 1MHz, IO = 0 ENABLE/SHUTDOWN (OPA728) Enable Reference (Ref Pin) Voltage Range V– VL (amplifier is disabled) VH (amplifier is enabled) (V+) –2 V < VDGND+0.8V V > VDGND+2V Input Bias Current of Enable Pin V 5 IQSD Amplifier Disabled 6 pA 15 µA 12 V POWER SUPPLY Specified Voltage Range Operating Voltage Range Quiescent Current (per amplifier) VS 4 VS 3.5 to 13.2 IQ 4.3 Over Temperature V 6.5 mA 6.5 mA TEMPERATURE RANGE Specified Range –40 +125 °C Operating Range –55 +125 °C Storage Range –55 +150 °C Thermal Resistance θJA MSOP-8, SO-8 150 °C/W TSSOP-14 100 °C/W DFN-8 46 °C/W Submit Documentation Feedback 5 OPA727,, OPA2727 OPA4727, OPA728 www.ti.com SBOS314H – SEPTEMBER 2004 – REVISED APRIL 2007 TYPICAL CHARACTERISTICS At TA = +25°C, VS = ±6V, RL = 10kΩ connected to VS/2, and VOUT = VS/2, unless otherwise noted. GAIN AND PHASE vs FREQUENCY COMMON-MODE REJECTION RATIO vs FREQUENCY 180 180 160 160 140 140 100 100 80 80 60 60 40 40 Gain 20 20 0 0 –20 10 100 1k 10k 100k 1M 10M CMRR (dB) Phase 100 Phase (°) 120 120 Gain (dB) 120 80 60 40 20 –20 100M (V–) £ VCM £ (V+) – 2V 0 10 Frequency (Hz) 100 1k 10k 100k 1M 10M Frequency (Hz) Figure 1. Figure 2. POWER-SUPPLY REJECTION RATIO vs FREQUENCY MAXIMUM OUTPUT VOLTAGE vs FREQUENCY 7 100 VS = ±6V 90 6 80 5 Amplitude (V) PSRR (dB) 70 60 50 40 30 4 3 Indicates maximum output for no visible distortion. 2 20 1 10 0 10k 0 100 1k 10k 100k 1M 10M 100M 100k Frequency (Hz) Figure 3. Figure 4. CHANNEL SEPARATION vs FREQUENCY INPUT VOLTAGE NOISE SPECTRAL DENSITY vs FREQUENCY 140 1000 120 Voltage Noise (nV/ÖHz) Channel Separation (dB) 10M 1M Frequency (Hz) 100 80 60 100 10 40 20 1 1k 10k 100k 1M 10M 100M 10 Frequency (Hz) 1k 10k Frequency (Hz) Figure 5. 6 100 Figure 6. Submit Documentation Feedback 100k 1M 10M OPA727,, OPA2727 OPA4727, OPA728 www.ti.com SBOS314H – SEPTEMBER 2004 – REVISED APRIL 2007 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = ±6V, RL = 10kΩ connected to VS/2, and VOUT = VS/2, unless otherwise noted. INPUT BIAS CURRENT vs COMMON-MODE VOLTAGE 100k OFFSET CURRENT vs TEMPERATURE +125°C 10k +85 ° C 1k 1k +25°C 100 100 IOS(pA) Input Bias Current (pA) 10k 10 IB < ± 10pA –10 10 +25°C 1 +85°C 0.1 –100 –1k –10k +125°C 0.01 –50 –100k –6 –4 –2 0 4 2 6 –25 0 25 75 50 100 125 150 Temperature (°C) Common-- Mode Voltage (V) Figure 7. Figure 8. OPEN-LOOP GAIN vs TEMPERATURE POWER-SUPPLY REJECTION RATIO vs TEMPERATURE 140 120 130 RL = 100kW PSRR (dB) AOL(dB) 120 110 RL = 1kW 100 100 80 90 80 60 –50 –25 0 25 50 75 100 125 150 –50 25 50 75 Figure 9. Figure 10. COMMON-MODE REJECTION RATIO vs TEMPERATURE 100 4 90 3 80 100 125 150 QUIESCENT CURRENT vs TEMPERATURE 5 IQ(mA) CMRR (dB) 0 Temperature (°C) 110 2 1 70 60 –25 Temperature (°C) (V–) £ VCM £ (V+) – 2V –50 –25 0 25 0 50 75 100 125 150 –50 –25 0 25 50 75 100 125 150 Temperature (°C) Temperature (°C) Figure 11. Figure 12. Submit Documentation Feedback 7 OPA727,, OPA2727 OPA4727, OPA728 www.ti.com SBOS314H – SEPTEMBER 2004 – REVISED APRIL 2007 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = ±6V, RL = 10kΩ connected to VS/2, and VOUT = VS/2, unless otherwise noted. SHORT-CIRCUIT CURRENT vs TEMPERATURE 5.0 90 4.8 80 4.6 70 Short--Circuit (mA) IQ per Amplifier (mA) QUIESCENT CURRENT vs SUPPLY VOLTAGE 4.4 4.2 4.0 3.8 3.6 Sourcing 60 50 Sinking 40 30 3.4 20 3.2 10 3.0 0 3 4 5 6 7 8 9 10 11 12 13 –50 14 –25 0 Supply Voltage (V) 25 75 50 100 125 150 Temperature (°C) Figure 13. Figure 14. SHORT-CIRCUIT CURRENT vs SUPPLY VOLTAGE OUTPUT VOLTAGE SWING vs OUTPUT CURRENT 6 90 –40°C Sourcing 4 70 Output Voltage (V) Short--Circuit Current (mA) 80 60 Sinking 50 40 30 2 25°C 125°C 0 –2 20 –4 10 –40°C 0 0 13.5 12.5 11.5 10.5 9.5 8.5 7.5 6.5 5.5 4.5 3.5 –6 10 20 30 40 50 60 70 80 Output Current (mA) Supply Voltage (V) Figure 15. Figure 16. TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY SETTLING TIME vs GAIN 5000 RL = 600W VOUT = 2Vrms BW = 80kHz 4500 4000 Settling Time (ns) THD + Noise (%) 0.01 0.001 3500 3000 2500 2000 1500 0.01% 1000 0.1% 500 0.0001 0 10 100 1k 10k 100k 1 Frequency (Hz) Figure 17. 8 10 Noninverting Gain (V/V) Figure 18. Submit Documentation Feedback 100 OPA727,, OPA2727 OPA4727, OPA728 www.ti.com SBOS314H – SEPTEMBER 2004 – REVISED APRIL 2007 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = ±6V, RL = 10kΩ connected to VS/2, and VOUT = VS/2, unless otherwise noted. SMALL-SIGNAL OVERSHOOT vs CAPACITIVE LOAD OFFSET VOLTAGE PRODUCTION DISTRIBUTION 90 VS = ±5V 80 60 G = +1 Population Overshoot (%) 70 50 40 G = –1 CF = 3pF 30 20 100 1000 –12 0 – 11 0 –10 0 –90 –80 –70 –60 –50 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 100 11 0 120 130 140 150 10 –13 0 0 –15 0 –14 0 G = +5 CF = 1pF 10 Capacitive Load (pF) Offset Voltage (mV) Figure 19. Figure 20. OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION (0°C TO +85°C) OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION (–40°C TO +125°C) VS = ±5V 0 0 0 .1 0 .2 0 .3 0 .4 0 .5 0 .6 0 .7 0 .8 0 .9 1 .0 1 .1 1 .2 1 .3 1 .4 1 .5 1 .6 1 .7 1 .8 1 .9 2 .0 2 .1 2 .2 2 .3 2 .4 2 .5 2 .6 2 .7 2 .8 2 .9 3 .0 Population Population VS = ±5V 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 Offset Voltage Drift (mV/°C) Offset Voltage Drift (mV/°C) Figure 21. Figure 22. OFFSET VOLTAGE vs TEMPERATURE SMALL-SIGNAL STEP RESPONSE 300 G = +1 RL = 10kW CL = 20pF VS = ± 5V 4s 100 10mV/div Offset Voltage (m V) 200 0 –100 4s –200 7 Representative Units Shown –300 –50 –25 0 25 50 75 100 125 100ns/div Temperature (° C) Figure 23. Figure 24. Submit Documentation Feedback 9 OPA727,, OPA2727 OPA4727, OPA728 www.ti.com SBOS314H – SEPTEMBER 2004 – REVISED APRIL 2007 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = ±6V, RL = 10kΩ connected to VS/2, and VOUT = VS/2, unless otherwise noted. LARGE-SIGNAL STEP RESPONSE SMALL-SIGNAL STEP RESPONSE CF = 2pF G = +1 RL = 10kW CL = 20pF CF = 3pF 1V/div 10mV/div CF = 4pF CF G = –1 RF 10kW 10kW O PA 7 2 7 CL 20pF 400ns/div 200ns/div Figure 25. Figure 26. LARGE-SIGNAL STEP RESPONSE 1V/div CF 4pF G = –1 RF 10kW " 10kW O PA 7 2 7 CL 20pF 400ns/div Figure 27. 10 Submit Documentation Feedback OPA727,, OPA2727 OPA4727, OPA728 www.ti.com SBOS314H – SEPTEMBER 2004 – REVISED APRIL 2007 APPLICATIONS INFORMATION The OPA727 and OPA728 family of op amps use e-trim, an adjustment to offset voltage and temperature drift made during the final steps of manufacturing after the plastic molding is completed. This compensates for performance shifts that can occur during the molding process. Through e-trim, the OPA727 and OPA728 deliver excellent offset voltage (150µV max) and extremely low offset voltage drift (1.5µV/°C). Additionally, these 20MHz CMOS op amps have a fast slew rate, low noise, and excellent PSRR, CMRR, and AOL. They can operate on typically 4.3mA quiescent current from a single (or split) supply in the range of 4V to 12V (±2V to ±6V), making them highly versatile and easy to use. They are stable in a unity-gain configuration. Common-mode rejection is excellent throughout the input voltage range from V– to (V+) – 3V. CMRR decreases somewhat as the common-mode voltage extends to (V+) – 2.5V, but remains very good and is tested throughout this range. See the Electrical Characteristics table for details. a) Single-Supply Configuration Enable +12V Digital Logic REF VREF = DGND Power-supply pins should be bypassed with 1nF ceramic capacitors in parallel with 1µF tantalum capacitors. b) Dual-Supply Configuration OPERATING VOLTAGE Enable OPA727 series op amps require approximately 4.3mA quiescent current. The enable/shutdown feature of the OPA728 allows the op amp to be shut off to reduce this current to approximately 6µA. The enable/shutdown input is referenced to the Enable Reference Pin, REF (see Pin Configurations). This pin can be connected to logic ground in dual-supply op amp configurations to avoid level-shifting the enable logic signal, as shown in Figure 28. The Enable Reference Pin voltage, VREF, must not exceed (V+) – 2V. It may be set as low as V–. The amplifier is enabled when the Enable Pin voltage is greater than VREF + 2V. The amplifier is disabled (shutdown) if the Enable Pin voltage is less than VREF + 0.8V. The Enable Pin is connected to internal pull-up circuitry and will enable the device if left unconnected. OPA728 VOUT REF VREF = DGND -5V Figure 28. Enable Reference Pin Connection for Single- and Dual-Supply Configurations INPUT OVER-VOLTAGE PROTECTION Device inputs are protected by ESD diodes that will conduct if the input voltages exceed the power supplies by more than approximately 300mV. Momentary voltages greater than 300mV beyond the power supply can be tolerated if the current is limited to 10mA. This is easily accomplished with an input resistor in series with the op amp, as shown in Figure 29. The OPA727 series features no phase inversion when the inputs extend beyond supplies, if the input is current limited. V+ IOVERLOAD 10mA max R COMMON-MODE VOLTAGE RANGE +5V Digital Logic OPA727 series op amps are specified from 4V to 12V supplies over a temperature range of –40°C to +125°C. They will operate well in ±5V or +5V to +12V power-supply systems. Parameters that vary significantly with operating voltage or temperature are shown in the Typical Characteristics. ENABLE/SHUTDOWN VOUT OPA728 VOUT OPA727 VIN The input common-mode voltage range of the OPA727 and OPA728 series extends from V– to (V+) – 2.5V. V- Figure 29. Input Current Protection for Voltages Exceeding the Supply Voltage Submit Documentation Feedback 11 OPA727,, OPA2727 OPA4727, OPA728 www.ti.com SBOS314H – SEPTEMBER 2004 – REVISED APRIL 2007 RAIL-TO-RAIL OUTPUT +5V A class AB output stage with common-source transistors is used to achieve rail-to-rail output. This output stage is capable of driving heavy loads connected to any point between V+ and V–. For light resistive loads (>100kΩ), the output voltage can swing to 150mV from the supply rail, while still maintaining excellent linearity (AOL > 110dB). With 1kΩ resistive loads, the output is specified to swing to within 250mV from the supply rails with excellent linearity (see the Typical Characteristics curve, Output Voltage Swing vs Output Current). +5V 75W OPA727 VIN ±2.5V 330pF AIN ADS8342 16-Bit ADC Common -5V -5V Figure 31. OPA727 Driving an ADC TRANSIMPEDANCE AMPLIFIER CAPACITIVE LOAD AND STABILITY Capacitive load drive is dependent upon gain and the overshoot requirements of the application. Increasing the gain enhances the ability of the amplifier to drive greater capacitive loads (see the Typical Characteristics curve, Small-Signal Overshoot vs Capacitive Load). One method of improving capacitive load drive in the unity-gain configuration is to insert a 10Ω to 20Ω resistor inside the feedback loop, as shown in Figure 30. This reduces ringing with large capacitive loads while maintaining DC accuracy. V+ RS 20W OPA727 VOUT Wide bandwidth, low input bias current, and low input voltage and current noise make the OPA727 an ideal wideband photodiode transimpedance amplifier. Low-voltage noise is important because photodiode capacitance causes the effective noise gain of the circuit to increase at high frequency. The key elements to a transimpedance design, as shown in Figure 32, are the expected diode capacitance (CD), which should include the parasitic input common-mode and differential-mode input capacitance (4pF + 5pF for the OPA727); the desired transimpedance gain (RF); and the GBW for the OPA727 (20MHz). With these three variables set, the feedback capacitor value (CF) can be set to control the frequency response. CF includes the stray capacitance of RF, which is 0.2pF for a typical surface-mount resistor. VIN CL RL (1) CF < 1pF Figure 30. Series Resistor in Unity-Gain Buffer Configuration Improves Capacitive Load Drive RF 10MW DRIVING FAST 16-BIT ADCs The OPA727 series is optimized for driving fast 16-bit ADCs such as the ADS8342. The OPA727 op amps buffer the converter input capacitance and resulting charge injection, while providing signal gain. Figure 31 shows the OPA727 in a single-ended method of interfacing to the ADS8342 16-bit, 250kSPS, 4-channel ADC with an input range of ±2.5V. The OPA727 has demonstrated excellent settling time to the 16-bit level within the 600ns acquisition time of the ADS8342. The RC filter, shown in Figure 31, has been carefully tuned for best noise and settling performance. It may need to be adjusted for different op amp configurations. Refer to the ADS8342 data sheet (available for download at www.ti.com) for additional information on this product. 12 +5V l CD OPA727 VOUT -5V NOTE: (1) CF is optional to prevent gain peaking. It includes the stray capacitance of RF. Figure 32. Dual-Supply Transimpedance Amplifier Submit Documentation Feedback OPA727,, OPA2727 OPA4727, OPA728 www.ti.com SBOS314H – SEPTEMBER 2004 – REVISED APRIL 2007 To achieve a maximally-flat, 2nd-order Butterworth frequency response, the feedback pole should be set to: 1 + 2pR FCF GBW Ǹ4pR C F D (1) Bandwidth is calculated by: f *3dB + GBW Hz Ǹ2pR C F D (2) For even higher transimpedance bandwidth, the high-speed CMOS OPA380 (90MHz GBW), OPA354 (100MHz GBW), OPA300 (180MHz GBW), OPA355 (200MHz GBW), or OPA656, OPA657 (400MHz GBW) may be used. For single-supply applications, the +IN input can be biased with a positive dc voltage to allow the output to reach true zero when the photodiode is not exposed to any light, and respond without the added delay that results from coming out of the negative rail; this is shown in Figure 33. This bias voltage also appears across the photodiode, providing a reverse bias for faster operation. (1) CF < 1pF RF 10MW V+ l OPA727 VOUT +VBias NOTE: (1) CF is optional to prevent gain peaking. It includes the stray capacitance of RF. Figure 33. Single-Supply Transimpedance Amplifier For additional information, refer to Application Bulletin (SBOA055), Compensate Transimpedance Amplifiers Intuitively, available for download at www.ti.com. OPTIMIZING THE TRANSIMPEDANCE CIRCUIT To achieve the best performance, components should be selected according to the following guidelines: 1. For lowest noise, select RF to create the total required gain. Using a lower value for RF and adding gain after the transimpedance amplifier generally produces poorer noise performance. The noise produced by RF increases with the square-root of RF, whereas the signal increases linearly. Therefore, signal-to-noise ratio is improved when all the required gain is placed in the transimpedance stage. 2. Minimize photodiode capacitance and stray capacitance at the summing junction (inverting input). This capacitance causes the voltage noise of the op amp to be amplified (increasing amplification at high frequency). Using a low-noise voltage source to reverse-bias a photodiode can significantly reduce its capacitance. Smaller photodiodes have lower capacitance. Use optics to concentrate light on a small photodiode. 3. Noise increases with increased bandwidth. Limit the circuit bandwidth to only that required. Use a capacitor across the RF to limit bandwidth, even if not required for stability. 4. Circuit board leakage can degrade the performance of an otherwise well-designed amplifier. Clean the circuit board carefully. A circuit board guard trace that encircles the summing junction and is driven at the same voltage can help control leakage. For additional information, refer to the Application Bulletins Noise Analysis of FET Transimpedance Amplifiers (SBOA060), and Noise Analysis for High-Speed Op Amps (SBOA066), available for download at the TI web site. Submit Documentation Feedback 13 OPA727,, OPA2727 OPA4727, OPA728 www.ti.com SBOS314H – SEPTEMBER 2004 – REVISED APRIL 2007 C3 2.2nF C1 1nF R1 1.93kW R2 15.9kW R3 2.07kW 1/2 OPA2727 R4 22.3kW 1/2 OPA2727 VO C4 100pF C2 330pF DC Gain = 1 Cutoff Frequency = 50kHz Note: FilterPro is a low-pass filter design program available for download at no cost from TI’s web site (www.ti.com). The program can be used to determine component values for other cutoff frequencies or filter types. Figure 34. Four-Pole Butterworth Sallen-Key Low-Pass Filter DFN PACKAGE LAYOUT GUIDELINES The OPA727 series uses the DFN-8 (also known as SON), which is a QFN package with lead contacts on only two sides of the bottom of the package. This leadless, near-chip-scale package maximizes board space and enhances thermal and electrical characteristics through an exposed pad. The leadframe die pad should be soldered to a thermal pad on the PCB. A mechanical data sheet showing an example layout is attached at the end of this data sheet. Refinements to this layout may be required based on assembly process requirements. Mechanical drawings located at the end of this data sheet list the physical dimensions for the package and pad. The five holes in the landing pattern are optional, and are intended for use with thermal vias that connect the leadframe die pad to the heatsink area on the PCB. DFN packages are physically small, have a smaller routing area, improved thermal performance, and improved electrical parasitics, with a pinout scheme that is consistent with other commonly-used packages, such as SO and MSOP. Additionally, the absence of external leads eliminates bent-lead issues. The DFN package can be easily mounted using standard printed circuit board (PCB) assembly techniques. See Application Note, QFN/SON PCB Attachment (SLUA271) and Application Report, Quad Flatpack No-Lead Logic Packages (SCBA017), both available for download at www.ti.com. Soldering the exposed pad significantly improves board-level reliability during temperature cycling, key push, package shear, and similar board-level tests. Even with applications that have low-power dissipation, the exposed pad must be soldered to the PCB to provide structural integrity and long-term reliability. The exposed leadframe die pad on the bottom of the package should be connected to V–. 14 Submit Documentation Feedback PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) OPA2727AID ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 85 O2727A 2727A Samples OPA2727AIDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 85 O2727A 2727A Samples OPA2727AIDRBR ACTIVE SON DRB 8 2500 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 85 NSD Samples OPA2727AIDRBT ACTIVE SON DRB 8 250 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 85 NSD Samples OPA4727AIPW ACTIVE TSSOP PW 14 90 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA4727 Samples OPA4727AIPWR ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA4727 Samples OPA727AIDGKR ACTIVE VSSOP DGK 8 2500 RoHS & Green Call TI | NIPDAU Level-2-260C-1 YEAR -40 to 85 AUE Samples OPA727AIDGKT ACTIVE VSSOP DGK 8 250 RoHS & Green Call TI | NIPDAU Level-2-260C-1 YEAR -40 to 85 AUE Samples OPA727AIDRBT ACTIVE SON DRB 8 250 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 NSF Samples OPA728AIDGKT ACTIVE VSSOP DGK 8 250 RoHS & Green Call TI | NIPDAUAG Level-2-260C-1 YEAR -40 to 125 AUF Samples OPA728AIDRBT ACTIVE SON DRB 8 250 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 NSG Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of