OPA300 OPA301
SBOS271A − MAY 2003 − REVISED DECEMBER 2003
Low-Noise, High-Speed, 16-Bit Accurate, CMOS OPERATIONAL AMPLIFIER
FEATURES
D D D D D D D D D D
High Bandwidth: 150MHz 16-Bit Settling in 150ns Low Noise: 3nV/√Hz Low Distortion: 0.003% Low Power: 9.5mA (typ) on 5.5V Shutdown to 5µA Unity Gain Stable Excellent Output Swing: (V+) − 100mV to (V−) + 100mV Single Supply: +2.7V to +5.5V Tiny Packages: SO-8 and SOT23
DESCRIPTION
The OPA300 and OPA301 high-speed, voltage-feedback, CMOS operational amplifiers are designed for 16-bit resolution systems. The OPA300 and OPA301 are unity-gain stable and feature excellent settling and harmonic distortion specifications. Low power applications benefit from low quiescent current. The OPA300 features digital shutdown (Enable) function to provide additional power savings during idle periods. Optimized for single-supply operation, the OPA300 and OPA301 offer superior output swing and excellent commonmode range. The OPA300 and OPA301 have 150MHz of unity-gain bandwidth, low 3nV/√Hz voltage noise, and 0.1% settling within 30ns. Single-supply operation from 2.7V (±1.35V) to 5.5V (±2.75V) and an available shutdown function that reduces supply current to 5µA are useful for portable low-power applications. The OPA300 and OPA301 are available in SO-8 and SOT-23 packages, and are specified over the industrial temperature range of −40°C to +125°C.
APPLICATIONS
D D D D
16-Bit ADC Input Drivers Low-Noise Preamplifiers IF/RF Amplifiers Active Filtering
OPA300
NC − In +In V−
OPA301 OPA300 OPA301 6 5 4 SOT23− 6
V+ Enable − In Out V− +In
1 2 3 4 SO− 8 NC = Not Connected
8 7 6 5
Enable V+ VO U T NC
NC − In +In V−
1 2 3 4 SO− 8 NC = Not Connected
8 7 6 5
NC V+ VO UT NC Out V− +In
1 2 3
1 2 3 SOT23− 5
5
V+
4
− In
OPA300 VIN
16-Bit ADC
Typical Application of the OPA300
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 2003, Texas Instruments Incorporated
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OPA300 OPA301
SBOS271A − MAY 2003 − REVISED DECEMBER 2003
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PACKAGE/ORDERING INFORMATION
PRODUCT PACKAGE-LEAD PACKAGE DESIGNATOR(1) D DBV D DBV SPECIFIED TEMPERATURE RANGE −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C PACKAGE MARKING 300A A52 301A AUP ORDERING NUMBER OPA300AID OPA300AIDR OPA300AIDBVT OPA300AIDBVR OPA301AID OPA301AIDR OPA301AIDBVT OPA301AIDBVR TRANSPORT MEDIA, QUANTITY Tube, 100 Tape and Reel, 2500 Tape and Reel, 250 Tape and Reel, 2500 Tube, 100 Tape and Reel, 2500 Tape and Reel, 250 Tape and Reel, 2500
OPA300D OPA300DBV OPA301D OPA301DBV
SO-8 SOT23-6 SO-8 SOT23-5
(1) For the most current specification and package information, refer to our web site at www.ti.com.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted(1) Power Supply V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V Signal Input Terminals(2), Voltage . . . . . . . . . . . 0.5V to (V+) + 0.5V Current . . . . . . . . . . . . . . . . . . . . . ±10mA Open Short-Circuit Current(3) . . . . . . . . . . . . . . . . . . . . Continuous Operating Temperature Range . . . . . . . . . . . . . . . −55°C to +125°C Storage Temperature Range . . . . . . . . . . . . . . . . . −60°C to +150°C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C Lead Temperature (soldering, 10s) . . . . . . . . . . . . . . . . . . . . . +300°C (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. (2) Input terminals are diode clamped to the power-supply rails. Input signals that can swing more than 0.5V beyond the supply rails should be current limited to 10mA or less. (3) Short-circuit to ground; one amplifier per package.
ELECTROSTATIC DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PIN ASSIGNMENTS
Top View
NC − In +In V−
OPA300 1 2 3 4 SO− 8 NC = Not Connected OPA301 8 7 6 5
Enable V+ V O UT NC
SO
Top View OPA300
SOT23
A52
SOT23− (1) 6 OPA301
Out V− +In
1 2 3
6 5 4
V+ Enable − In
NC − In +In V−
1 2 3 4 SO− 8 NC = Not Connected
8 7 6 5
NC V+ VO UT NC Out V− +In
1 2 3 SOT23− 5
5
V+
4
− In
(1) SOT23-6 pin 1 oriented as shown with reference to package marking.
2
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OPA300 OPA301
SBOS271A − MAY 2003 − REVISED DECEMBER 2003
ELECTRICAL CHARACTERISTICS: VS = 2.7V to 5.5V
Boldface limits apply over the temperature range, TA = −40°C to +125°C.
All specifications at TA = +25°C, RL = 2kΩ connected to VS/2, VOUT = VS/2, and VCM = VS/2, unless otherwise noted.
OPA300, OPA301 PARAMETER OFFSET VOLTAGE Input Offset Voltage Over Temperature Drift vs. Power Supply INPUT VOLTAGE RANGE Common-Mode Voltage Range Common-Mode Rejection Ratio INPUT BIAS CURRENT Input Bias Current Input Offset Current INPUT IMPEDANCE Differential Common-Mode NOISE Input Voltage Noise, f = 0.1Hz to 1MHz Input Voltage Noise Density, f > 1MHz Input Current Noise Density, f < 1kHz Differential Gain Error Differential Phase Error OPEN-LOOP GAIN Open−Loop Voltage Gain Over Temperature Over Temperature VOS TEST CONDITIONS VS = 5V MIN TYP 1 2.5 50 (V−) − 0.2 66 MAX 5 7 200 (V+) − 0.9 80 ±0.1 ±0.5 1013 || 3 1013 || 6 40 3 1.5 0.01 0.1 95 90 95 90 106 106 ±5 ±5 UNITS mV mV µV/°C µV/V V dB pA pA Ω || pF Ω || pF µVpp nV/√Hz fA/√Hz % ° dB dB dB dB mV mV mA
dVOS/dT
PSRR VCM CMRR IB IOS VS = 2.7V to 5.5V, VCM < (V+) –0.9V
(V−) − 0.2V < VCM < (V+) – 0.9V
en in
NTSC, RL = 150Ω NTSC, RL = 150Ω VS = 5V, RL = 2kΩ, 0.1V < VO < 4.9V VS = 5V, RL = 2kΩ, 0.1V < VO < 4.9V VS = 5V, RL = 100Ω, 0.5V < VO < 4.5V VS = 5V, RL = 100Ω, 0.5V < VO < 4.5V RL = 2kΩ, AOL > 95dB RL = 100Ω, AOL > 95dB
AOL
OUTPUT
Voltage Output Swing from Rail Short-Circuit Current Capacitive Load Drive FREQUENCY RESPONSE Gain-Bandwidth Product Slew Rate Settling Time, 0.01% 0.1% Overload Recovery Time Total Harmonic Distortion + Noise POWER SUPPLY Specified Voltage Range Operating Voltage Range Quiescent Current (per amplifier) Over Temperature SHUTDOWN tOFF tON VL (shutdown) VH (amplifier is active) IQSD TEMPERATURE RANGE Specified Range Operating Range Storage Range Thermal Resistance SO-8 SOT23-5 SOT23-6 ISC CLOAD GBW SR tS 75 100 300 500 70 See Typical Characteristics 150 80 90 30 30 0.003 2.7 IO = 0 2.7 to 5.5 9.5 5.5 12 13
G = +1 VS = 5V, 2V Step, G = +1 Gain = −1 VS = 5V, VO = 3Vpp, G = +1, f = 1kHz
THD+N VS IQ
MHz V/µs ns ns ns % V V mA mA ns µs V V µA °C °C °C °C/W °C/W °C/W °C/W
40 5 (V−) − 0.2 (V−) + 2.5 3 −40 −55 −65 (V−) + 0.8 (V+) + 0.2 10 125 150 150 200 200 200
θJA
3
OPA300 OPA301
SBOS271A − MAY 2003 − REVISED DECEMBER 2003
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TYPICAL CHARACTERISTICS
All specifications at TA = 25°C, V+ = 5V, and RL = 150Ω connected to VS/2 unless otherwise noted.
NONINVERTING GAIN SMALL− SIGNAL FREQUENCY RESPONSE 3 G=1 0 Normalized Gain (dB) Normalized Gain (dB) −3 G=5 G=2 −9 G = 10 VO = 0.1VPP RF = 310Ω for G > 1 1M 10M 100M Frequency (Hz) 1G −3 −6 −9 − 12 − 15 1M 3
INVERTING GAIN SMALL− SIGNAL FREQUENCY RESPONSE VO = 0.1VPPV RF = 310Ω for G > 1 G = −1 G = −5 G = − 10 G = −2
− 15
10M
100M Frequency (Hz)
1G
LARGE− SIGNAL STEP RESPONSE
SMALL− SIGNAL STEP RESPONSE
Output Voltage (500mV/div)
Output Voltage (10mV/div)
VOUT
Time (50ns/div)
Time (5ns/div)
LARGE− SIGNAL ENABLE/DISABLE RESPONSE
Output Voltage (500mV/div)
Normalized Gain (dB)
Enable Pin
Amplifier Output
1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 − 0.1 − 0.2 − 0.3
0.1dB GAIN FLATNESS FOR VARIOUS RF Gain = 2 VO = 0.1VPP
RF = 825Ω
RF = 450Ω
RF = 205Ω 1M 10M Frequency (MHz) 100M
Time (100µ s/div)
4
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OPA300 OPA301
SBOS271A − MAY 2003 − REVISED DECEMBER 2003
TYPICAL CHARACTERISTICS (continued)
All specifications at TA = 25°C, V+ = 5V, and RL = 150Ω connected to VS/2 unless otherwise noted.
HARMONIC DISTORTION vs OUTPUT VOLTAGE − 50 − 60 − 70 − 80 − 90 − 100 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 Output Voltage (VPP) RL = 200Ω f = 1MHz RF = 310Ω G=2 THD − 50 − 60 − 70 − 80 − 90 − 100 − 110 1
HARMONIC DISTORTION vs NONINVERTING GAIN VO = 2VPP RL = 200Ω f = 1MHz RF = 310Ω
Harmonic Distortion (dBc)
Harmonic Distortion (dBc)
THD 2nd− Harmonic
2nd− Harmonic 3rd− Harmonic
3rd− Harmonic
10 Gain (V/V)
− 50 − 60 − 70 − 80 − 90 − 100 − 110 1
HARMONIC DISTORTION vs INVERTING GAIN VO = 2VPP RL = 200Ω f = 1MHz RF = 310Ω 3rd− Harmonic
− 50 − 60 − 70 − 80 − 90 − 100 − 110 − 120 100k
HARMONIC DISTORTION vs FREQUENCY VO = 2VPP RL = 200Ω Gain = 2 RF = 310Ω
Harmonic Distortion (dBc)
THD 2nd− Harmonic
Harmonic Distortion (dBc)
THD 2nd− Harmonic 3rd− Harmonic
10 Gain (V/V)
1M Frequency (Hz)
10M
− 60 − 65 Harmonic Distortion (dBc) − 70 − 75 − 80 − 85 − 90 − 95 − 100 100
HARMONIC DISTORTION vs LOAD RESISTANCE 10k VO = 2VPP f = 1MHz Gain = 2 RF = 310Ω
INPUT VOLTAGE AND CURRENT NOISE SPECTRAL DENSITY vs FREQUENCY
Voltage Noise (nV/√ Hz) Current Noise (fA/√ Hz)
THD 2nd− Harmonic
1k
Current Noise
Voltage Noise 100
3rd− Harmonic
10
1k Load Resistance (Ω)
1 10 100 1k 10k 100k 1M 10M Frequency (Hz)
5
OPA300 OPA301
SBOS271A − MAY 2003 − REVISED DECEMBER 2003
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TYPICAL CHARACTERISTICS (continued)
All specifications at TA = 25°C, V+ = 5V, and RL = 150Ω connected to VS/2 unless otherwise noted.
9
FREQUENCY RESPONSE FOR VARIOUS RL Gain = 1 VO = 0.1VPP RLOAD = 1kΩ
15 9
FREQUENCY RESPONSE FOR VARIOUS CL Gain = 1 CLOAD = 100pF CLOAD = 47pF CLOAD = 4.7pF
3 −3 RLOAD = 150Ω −9 RLOAD = 50Ω − 15 − 21 10M
3 Gain (dB) Gain (dB) −3 −9 − 15 − 21 10M
CL
100M Frequency (Hz)
1G
100M Frequency (Hz)
1G
FREQUENCY RESPONSE vs CAPACITIVE LOAD 3 −3 −9 − 15
RS
COMMON− MODE REJECTION RATIO AND POWER− SUPPLY REJECTION RATIO vs FREQUENCY 100 90 80 70 PSRR (dB) CMRR (dB) 60 50 40 30 20 10 1G 0 10k 100k 1M 10M 100M 1G Frequency (Hz) CMRR PSRR V+ PSRR V−
CLOAD = 1pF RS = 75Ω CLOAD = 5pF RS = 55Ω CLOAD = 10pF RS = 40Ω CLOAD = 47pF RS = 30Ω
CL
Normalized Gain (dB)
− 21 − 27 10M
C LOAD = 100pF RS = 20Ω 100M Frequency (Hz)
OPEN− LOOP GAIN AND PHASE vs FREQUENCY 110 100 90 80 70 60 50 40 30 20 10 0 −10 100 0 − 30 − 60 − 90 − 120 − 150 − 180 1k 10k 100k 1M 10M 100M 1G Frequency (Hz) 1.0
COMPOSITE VIDEO DIFFERENTIAL GAIN AND PHASE
Gain
Phase
0.8 Phase (_ )
Gain (dB)
dP (_ ) dG (%)
0.6 dP 0.4
0.2 dG 0 1 2 3 4 Number of 150Ω Loads
6
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OPA300 OPA301
SBOS271A − MAY 2003 − REVISED DECEMBER 2003
TYPICAL CHARACTERISTICS (continued)
All specifications at TA = 25°C, V+ = 5V, and RL = 150Ω connected to VS/2 unless otherwise noted.
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT 5.0 VS = 5V 4.0 Output Voltage (V) 25_ C − 40_ C 3.0 150_ C 125_ C 85_ C 2.0 25_ C 1.0 − 55_ C Output Voltage (V) 2.7 2.4 2.1 1.8 1.5 1.2 0.9 0.6 0.3 0 0 10 20 30 40 50 60 70 80 Output Current (mA) 0 0
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT VS = 2.7V
150_ C 125_ C 85_ C 25_ C − 40_ C − 55_ C
10
20
30
40
50
60
70
80
Output Current (mA)
INPUT BIAS CURRENT vs TEMPERATURE 1 12 11 Quiescent Current (mA) Input Bias Current (pA) 10 9 8 7 0.01 − 40 − 20 0 20 40 60 80 100 120 140 Temperature (_ C) 6 − 40
QUIESCENT CURRENT vs TEMPERATURE
0.1
− 20
0
20
40
60
80
100
120
140
Temperature (_ C)
INPUT BIAS CURRENT vs COMMON− MODE VOLTAGE 2 100 95 Input Bias Current (pA) 1 PSRR (dB) CMRR (dB) 90
POWER− SUPPLY REJECTION RATIO AND COMMON− MODE REJECTION RATIO vs TEMPERATURE
PSRR 85 80 CMRR 75 70 65 −2 −3 −2 −1 0 1 2 3 Common− Mode Voltage (V) 60 − 40 − 20 0
−1
0
20
40
60
80
100
120
140
Temperature (_ C)
7
OPA300 OPA301
SBOS271A − MAY 2003 − REVISED DECEMBER 2003
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TYPICAL CHARACTERISTICS (continued)
All specifications at TA = 25°C, V+ = 5V, and RL = 150Ω connected to VS/2 unless otherwise noted.
SHORT− CIRCUIT CURRENT vs TEMPERATURE 80 VS = 5.5V 60 Short− Circuit Current (mA) Quiescent Current (mA) 40 20 0 − 20 − 40 − 60 − 80 − 40 VS = 5.5V − 20 0 20 40 60 80 100 120 VS = 3.5V VS = 2.7V VS = 5V 9 8 7 6 5 4 3 2 1 0 0
QUIESCENT CURRENT vs SUPPLY VOLTAGE
1
2
3
4
5
6
Temperature (_ C)
Supply Voltage (V)
OUTPUT IMPEDANCE vs FREQUENCY 1000 5
MAXIMUM OUTPUT VOLTAGE vs FREQUENCY VS = 5V RLOAD = 2kΩ
Output Impedance, ZO (Ω)
100 G=2 10 G=1 Output Voltage (VPP)
4
3 VS = 2.7V 2
1
0.1
1
0.01 10k 100k 1M Frequency (Hz) 10M 100M
0 1 10 Frequency (MHz) 100
OPEN− LOOP GAIN vs TEMPERATURE 120 110 Open− Loop Gain (dB) Output Error (%) R LOAD = 2kΩ 100 90 RLOAD = 100Ω 80 70 60 − 40 0.2 0.1 0 − 0.1 − 0.2 − 0.3 − 0.4 − 0.5 − 0.6 − 0.7 − 0.8 − 0.9 − 1.0 − 20 0 20 40 60 80 100 120 140 0
OUTPUT SETTLING TIME TO 0.1%
20
40
60 Time (ns)
80
100
Temperature (_ C)
8
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OPA300 OPA301
SBOS271A − MAY 2003 − REVISED DECEMBER 2003
TYPICAL CHARACTERISTICS (continued)
All specifications at TA = 25°C, V+ = 5V, and RL = 150Ω connected to VS/2 unless otherwise noted.
OFFSET VOLTAGE PRODUCTION DISTRIBUTION 20 18 16 Percent of Amplifiers 14 12 10 8 6 4 2 0 −5 −4 −3 −2 −1 0 1 2 3 4 5 Offset Voltage (mV) 0 − 10 −8 Percent of Amplifiers 15 20
OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION
10
5
−6
−4
−2
0
2
4
6
8
10
Offset Voltage Drift (µ V/_ C)
9
OPA300 OPA301
SBOS271A − MAY 2003 − REVISED DECEMBER 2003
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APPLICATIONS INFORMATION
Built on HPA07, the latest TI high-precision analog process, the OPA300 single-supply CMOS op amp is designed to interface with high-speed 16-bit analog-to-digital converters (ADCs). Featuring wide 150MHz bandwidth, fast 150nS settling time to 16 bits, and high open loop gain, the OPA300 series offer excellent performance in a small SO-8 and tiny SOT23 packages.
PCB LAYOUT
As with most high-speed operational amplifiers, board layout requires special attention to maximize AC and DC performance. Extensive use of ground planes, short lead lengths, and high-quality bypass capacitors will minimize leakage that can compromise signal quality. Guard rings applied with potential as near to the input pins as possible help minimize board leakage.
INPUT AND ESD PROTECTION
THEORY OF OPERATION
The OPA30x uses a classic two-stage topology, shown in Figure 1. The differential input pair is biased to maximize slew rate without compromising stability or bandwidth. The folded cascode adds the signal from the input pair and presents a differential signal to the class AB output stage. The class AB output stage allows rail to rail output swing, with high−impedance loads (> 2kΩ), typically 100mV from the supply rails. With 10Ω loads, a useful output swing can be achieved and still maintain high open-loop gain. See the typical characteristic Output Voltage Swing vs Output Current.
All OPA30x pins are static protected with internal ESD protection diodes tied to the supplies, as shown in Figure 2. These diodes will provide overdrive protection if the current is externally limited to 10mA, as stated in the Absolute Maximum Ratings. Any input current beyond the Absolute Maximum Ratings, or long-term operation at maximum ratings, will shorten the lifespan of the amplifier.
+V
External Pin +VS −V
Internal Circuitry
Figure 2. ESD Protection Diodes
VOUT + VIN − VBIAS
ENABLE FUNCTION
The shutdown function of the OPA300 is referenced to the negative supply voltage of the operational amplifier. A logic level HIGH enables the op amp. A valid logic HIGH is defined as 2.5V above the negative supply applied to the enable pin. A valid logic LOW is defined as < 0.8V above the negative supply pin. If dual or split power supplies are used, care should be taken to ensure logic input signals are properly referred to the negative supply voltage. If this pin is not connected to a valid high to low voltage, the internal circuitry will pull the node high and enable the part to function. The logic input is a high-impedance CMOS input. For battery-operated applications, this feature may be used to greatly reduce the average current and extend battery life. The enable time is 10µs; disable time is 1µs. When disabled, the output assumes a high-impedance state. This allows the OPA300 to be operated as a gated amplifier, or to have its output multiplexed onto a common analog output bus.
Figure 1. OPA30x Classic Two-Stage Topology
OPERATING VOLTAGE
OPA30x op amp parameters are fully specified from +2.7V to +5.5V. Supply voltages higher than 5.5V (absolute maximum) can cause permanent damage to the amplifier. Many specifications apply from –40°C to +125°C. Parameters that vary significantly with operating voltages or temperature are shown in the Typical Characteristics.
10
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OPA300 OPA301
SBOS271A − MAY 2003 − REVISED DECEMBER 2003
DRIVING CAPACITIVE LOADS
When using high−speed operational amplifiers, it is extremely important to consider the effects of capacitive loading on amplifier stability. Capacitive loading will interact with the output impedance of the operational amplifier, and depending on the capacitor value, may significantly decrease the gain bandwidth, as well as introduce peaking. To reduce the effects of capacitive loading and allow for additional capacitive load drive, place a series resistor between the output and the load. This will reduce available bandwidth, but permit stable operation with capacitive loading. Figure 3 illustrates the recommended relationship between the resistor and capacitor values.
DRIVING A 16-BIT ADC
The OPA30x features excellent THD+noise, even at frequencies greater than 1MHz, with a 16-bit settling time of 150ns. Figure 4 shows a total single supply solution for high-speed data acquisition. The OPA30x directly drives the ADS8401, a 1.25 mega sample per second (MSPS) 16-bit data converter. The OPA30x is configured in an inverting gain of 1, with a 5V single supply. Results of the OPA30x performance are summarized in Table 1.
130pF (mica) 1820Ω
100 5V 1820Ω Series Resistance (Ω) 75 VIN 130pF (mica) 50 OPA30x 10Ω
fS = 1.25MSPS f = 10kHz
ADS8401 1.5nF
25
Figure 4. The OPA30x Drives the 16-Bit ADS8401
0 1 10 Capacitive Load (pF) 100
PARAMETER THD
RESULTS (f = 10kHz) −99.3dB 101.2dB 84.2dB 84.3dB
Figure 3. Recommended RS and CL Combinations Amplifiers configured in unity gain are most susceptible to stability issues. The typical characteristic, Frequency Response vs Capacitive Load, describes the relationship between capacitive load and stability for the OPA30x. In unity gain, the OPA300 is capable of driving a few picofarads of capacitive load without compromising stability. Board level parasitic capacitance can often fall into the range of a picofarad or more, and should be minimized through good circuit-board layout practices to avoid compromising the stability of the OPA30x. For more information on detecting parasitics during testing, see the Application Note Measuring Board Parasitics in High-Speed Analog Design (SBOA094), available at the TI web site www.ti.com.
SFDR THD+N SNR
Table 1. OPA30x Performance Results Driving a 1.25MSPS ADS8401
11
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