OPA340NA/3K

Product Folder Sample & Buy Support & Community Tools & Software Technical Documents Reference Design OPA340, OPA2340, OPA4340 SBOS073C – SEPTEMBER 1997 – REVISED AUGUST 2016 OPAx340 Single-Supply, Rail-to-Rail Operational Amplifiers MicroAmplifier™ Series 1 Features • • • • • • • • 1 The OPA340 series operate on a single supply as low as 2.5 V with an input common-mode voltage range that extends 500 mV below ground and 500 mV above the positive supply. Output voltage swing is to within 1 mV of the supply rails with a 100-kΩ load. These devices offer excellent dynamic response (BW = 5.5 MHz, SR = 6 V/µs), yet quiescent current is only 750 A. Dual and quad designs feature completely independent circuitry for lowest crosstalk and freedom from interaction. Rail-to-Rail Input Rail-to-Rail Output (Within 1 mV) MicroSize Packages Wide Bandwidth: 5.5 MHz High Slew Rate: 6 V/µs Low THD + Noise: 0.0007% (f = 1 kHz) Low Quiescent Current: 750 µA/Channel Single, Dual, and Quad Versions The single (OPA340) packages are the tiny 5-pin SOT-23 surface mount, 8-pin SOIC surface mount, and 8-pin DIP. The dual (OPA2340) comes in the miniature 8-pin VSSOP surface mount, 8-pin SOIC surface mount, and 8-pin PDIP packages. The quad (OPA4340) packages are the space-saving 16-pin SSOP surface mount and 14-pin SOIC surface mount. All are specified from –40°C to 85°C and operate from –55°C to 125°C. A SPICE macromodel is available for design analysis. 2 Applications • • • • • • • • Driving A/D Converters PCMCIA Cards Data Acquisition Process Control Audio Processing Communications Active Filters Test Equipment Device Information(1) PART NUMBER PACKAGE OPA340 3 Description OPA340, OPA2340 The OPA340 series rail-to-rail CMOS operational amplifiers are optimized for low-voltage, single-supply operation. Rail-to-rail input and output and highspeed operation make them ideal for driving sampling analog-to-digital (A/D) converters. They are also wellsuited for general purpose and audio applications as well as providing I/V conversion at the output of digital-to-analog (D/A) converters. Single, dual, and quad versions have identical specifications for design flexibility. OPA2340 OPA4340 BODY SIZE (NOM) SOT-23 (5) 3.00 mm × 3.00 mm PDIP (8) 9.81 mm × 6.35 mm SOIC (8) 4.90 mm × 3.91 mm VSSOP (8) 3.00 mm × 3.00 mm SOIC (14) 8.65 mm × 3.91 mm SSOP (16) 4.90 mm × 3.90 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. OPA340 in Noninverting Configuration Driving ADS7816 +5V 0.1mF 1 VREF 8 V+ 500W 0.1mF DCLOCK +In ADS7816 12-Bit A/D OPA340 2 VIN -In 3300pF DOUT CS/SHDN 3 7 6 5 Serial Interface GND 4 VIN = 0V to 5V for 0V to 5V output. NOTE: A/D Input = 0 to VREF RC network filters high-frequency noise. Copyright © 2016, Texas Instruments Incorporated 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. OPA340, OPA2340, OPA4340 SBOS073C – SEPTEMBER 1997 – REVISED AUGUST 2016 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 5 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 5 5 5 5 6 6 6 8 Absolute Maximum Ratings ...................................... ESD Ratings ............................................................ Recommended Operating Conditions....................... Thermal Information – OPA340 ................................ Thermal Information – OPA2340 .............................. Thermal Information – OPA4340 .............................. Electrical Characteristics........................................... Typical Characteristics .............................................. Detailed Description ............................................ 12 7.1 Overview ................................................................. 12 7.2 Functional Block Diagram ....................................... 12 7.3 Feature Description................................................. 13 7.4 Device Functional Modes........................................ 15 8 Application and Implementation ........................ 16 8.1 Application Information............................................ 16 8.2 Typical Applications ................................................ 16 9 Power Supply Recommendations...................... 19 10 Layout................................................................... 20 10.1 Layout Guidelines ................................................. 20 10.2 Layout Example .................................................... 20 11 Device and Documentation Support ................. 21 11.1 11.2 11.3 11.4 11.5 11.6 11.7 11.8 Device Support...................................................... Documentation Support ........................................ Related Links ........................................................ Receiving Notification of Documentation Updates Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 21 22 22 22 22 22 22 23 12 Mechanical, Packaging, and Orderable Information ........................................................... 23 4 Revision History Changes from Revision B (November 2007) to Revision C Page • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section. ................................................................................................. 1 • Deleted Package/Ordering Information table, see POA at the end of the data sheet............................................................ 1 2 Submit Documentation Feedback Copyright © 1997–2016, Texas Instruments Incorporated Product Folder Links: OPA340 OPA2340 OPA4340 OPA340, OPA2340, OPA4340 www.ti.com SBOS073C – SEPTEMBER 1997 – REVISED AUGUST 2016 5 Pin Configuration and Functions OPA340: DBV Package 5-Pin SOT-23 Top View OPA340: P and D Packages 8-Pin PDIP and SOIC Top View Pin Functions: OPA340 PIN NAME SOT-23 SOIC, PDIP 4 2 –IN I/O DESCRIPTION I Negative (inverting) input Positive (noninverting) input +IN 3 3 I NC — 1, 5, 8 — No internal connection (can be left floating) OUT 1 6 O Output V– 2 4 — Negative (lowest) power supply V+ 5 7 — Positive (highest) power supply OPA2340: P, D, and DGK Packages 8-Pin PDIP, SOIC, and VSSOP Top View Pin Functions: OPA2340 PIN NAME VSSOP, SOIC, PDIP I/O DESCRIPTION –IN A 2 I Negative (inverting) input channel A +IN A 3 I Positive (noninverting) input channel A –IN B 6 I Negative (inverting) input channel B +IN B 5 I Positive (noninverting) input channel B OUT A 1 O Output channel A OUT B 7 O Output channel B V– 4 — Negative (lowest) power supply V+ 8 — Positive (highest) power supply Copyright © 1997–2016, Texas Instruments Incorporated Product Folder Links: OPA340 OPA2340 OPA4340 Submit Documentation Feedback 3 OPA340, OPA2340, OPA4340 SBOS073C – SEPTEMBER 1997 – REVISED AUGUST 2016 www.ti.com OPA4340: D Package 14-Pin SOIC Top View OPA4340: DBQ Package 16-Pin SSOP Top View Pin Functions: OPA4340 PIN I/O DESCRIPTION NAME SOIC SSOP –IN A 2 2 I Negative (inverting) input channel A –IN B 6 6 I Negative (inverting) input channel B –IN C 9 11 I Negative (inverting) input channel C –IN D 13 15 I Negative (inverting) input channel D +IN A 3 3 I Positive (noninverting) input channel A +IN B 5 5 I Positive (noninverting) input channel B +IN C 10 12 I Positive (noninverting) input channel C +IN D 12 14 I Positive (noninverting) input channel D NC — 8, 9 — No internal connection (can be left floating) OUT A 1 1 O Output, channel A OUT B 7 7 O Output, channel B OUT C 8 10 O Output, channel C OUT D 14 16 O Output, channel D V– 11 13 — Negative (lowest) power supply V+ 4 4 — Positive (highest) power supply 4 Submit Documentation Feedback Copyright © 1997–2016, Texas Instruments Incorporated Product Folder Links: OPA340 OPA2340 OPA4340 OPA340, OPA2340, OPA4340 www.ti.com SBOS073C – SEPTEMBER 1997 – REVISED AUGUST 2016 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN Voltage –0.5 10 Output short circuit (3) –55 125 Junction, TJ 150 Storage, Tstg (3) mA Continuous Operating, TA (2) V 0.5 Signal input terminals (2) Temperature UNIT 5.5 Signal input terminals (2) Current (1) MAX Supply voltage –55 °C 125 Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5 V beyond the supply rails should be current limited to 10 mA or less. Short-circuit to ground, one amplifier per package. 6.2 ESD Ratings VALUE V(ESD) (1) (2) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) ±600 Charged-device model (CDM), per JEDEC specification JESD22-C101 (2) ±250 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT Supply voltage 2.7 5.5 V Specified temperature –40 125 °C 6.4 Thermal Information – OPA340 OPA340 THERMAL METRIC (1) DBV (SOT-23) P (PDIP) D (SOIC) D (SOIC) UNIT 5 PINS 8 PINS 8 PINS 14 PINS RθJA Junction-to-ambient thermal resistance 207.9 53.1 142 83.8 °C/W RθJC(top) Junction-to-case (top) thermal resistance 71.2 42.5 90.2 70.7 °C/W RθJB Junction-to-board thermal resistance 36.0 30.3 82.5 59.5 °C/W ψJT Junction-to-top characterization parameter 2.0 19.7 39.4 11.6 °C/W ψJB Junction-to-board characterization parameter 35.2 30.2 82 37.7 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance — — — — °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. Copyright © 1997–2016, Texas Instruments Incorporated Product Folder Links: OPA340 OPA2340 OPA4340 Submit Documentation Feedback 5 OPA340, OPA2340, OPA4340 SBOS073C – SEPTEMBER 1997 – REVISED AUGUST 2016 www.ti.com 6.5 Thermal Information – OPA2340 OPA2340 THERMAL METRIC (1) D (SOIC) DGK (VSSOP) UNIT 8 PINS 8 PINS RθJA Junction-to-ambient thermal resistance 138.4 169.2 °C/W RθJC(top) Junction-to-case (top) thermal resistance 89.5 62.8 °C/W RθJB Junction-to-board thermal resistance 78.6 89.8 °C/W ψJT Junction-to-top characterization parameter 29.9 7.5 °C/W ψJB Junction-to-board characterization parameter 78.1 88.2 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance — — °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. 6.6 Thermal Information – OPA4340 OPA4340 THERMAL METRIC DBQ (SSOP) (1) UNIT 16 PINS RθJA Junction-to-ambient thermal resistance RθJC(top) Junction-to-case (top) thermal resistance 115.8 °C/W 67 RθJB °C/W Junction-to-board thermal resistance 58.3 °C/W ψJT Junction-to-top characterization parameter 19.9 °C/W ψJB Junction-to-board characterization parameter 57.9 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance — °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. 6.7 Electrical Characteristics At TA = 25°C, RL = 10 kΩ connected to VS/2, and VOUT = VS/2, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP (1) MAX ±500 UNIT OFFSET VOLTAGE VOS Input offset voltage VS = 5 V ±150 dVOS/dt Input offset voltage vs temperature TA = –40°C to 85°C, VS = 5 V ±2.5 PSRR Input offset voltage vs power supply VS = 2.7 V to 5.5 V, VCM = 0 V Over temperature 30 VS = 2.7 V to 5.5 V, VCM = 0 V, TA = –40°C to 85°C, VS = 5 V Channel separation, DC µV µV/°C 120 µV/V 120 µV/°C 0.2 µV/V INPUT BIAS CURRENT IS Input bias current IOS Input offset current ±0.2 Over temperature TA = –40°C to 85°C, VS = 5 V ±10 ±60 ±0.2 ±10 pA pA NOISE Input voltage noise f = 0.1 kHz to 50 kHz 8 µVRMS en Input voltage noise density f = 1 kHz 25 nV/√Hz in Current noise density f = 1 kHz 3 fA/√Hz INPUT VOLTAGE RANGE VCM Common-mode voltage range CMRR (1) 6 Common-mode rejection ratio –0.3 (V+) + 0.3 –0.3 V < VCM < (V+) – 1.8 V 80 92 VS = 5 V, –0.3 V < VCM < 5.3 V 70 84 VS = 2.7 V, –0.3 V < VCM < 3 V 66 80 V dB VS = 5 V. Submit Documentation Feedback Copyright © 1997–2016, Texas Instruments Incorporated Product Folder Links: OPA340 OPA2340 OPA4340 OPA340, OPA2340, OPA4340 www.ti.com SBOS073C – SEPTEMBER 1997 – REVISED AUGUST 2016 Electrical Characteristics (continued) At TA = 25°C, RL = 10 kΩ connected to VS/2, and VOUT = VS/2, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP (1) MAX UNIT INPUT IMPEDANCE 1013 || 3 Differential 13 Common-mode 10 Ω || pF Ω || pF || 6 OPEN-LOOP GAIN AOL Open-loop voltage gain Over temperature RL = 100 kΩ, 5 mV < VO < (V+) – 5 mV 106 124 RL = 10 kΩ, 5 mV < VO < (V+) – 50 mV 100 120 RL = 2 kΩ, 200 mV < VO < (V+) – 200 mV 94 114 RL = 100 kΩ, 5 mV < VO < (V+) – 5 mV, TA = –40°C to 85°C, VS = 5 V 106 RL = 10 kΩ, 5 mV < VO < (V+) – 50 mV, TA = –40°C to 85°C, VS = 5 V 100 RL = 2 kΩ, 200 mV < VO < (V+) – 200 mV, TA = –40°C to 85°C, VS = 5 V dB 94 FREQUENCY RESPONSE GBW Gain-bandwidth product G=1 5.5 MHz SR Slew rate VS = 5 V, G = 1, CL = 100 pF 6 V/µs Settling time, 0.1% VS = 5 V, 2-V step, CL = 100 pF 1 µs Settling time, 0.01% VS = 5 V, 2-V step, CL = 100 pF 1.6 µs Overload recovery time VIN × G = VS 0.2 µs Total harmonic distortion + noise VS = 5 V, VO = 3VPP (2), G = 1, f = 1 kHz THD+N 0.0007% OUTPUT Voltage output swing from rail (2) Over temperature ISC Short-circuit current CLOAD Capacitive load drive RL = 100 kΩ, AOL ≥ 106 dB 1 RL = 10 kΩ, AOL ≥ 106 dB 10 RL = 2 kΩ, AOL ≥ 106 dB 40 5 RL = 100 kΩ, AOL ≥ 106 dB, TA = –40°C to 85°C, VS = 5 V 5 RL = 10 kΩ, AOL ≥ 106 dB, TA = –40°C to 85°C, VS = 5 V 50 RL = 2 kΩ, AOL ≥ 106 dB, TA = –40°C to 85°C, VS = 5 V 200 ±50 mV mA See Typical Characteristics POWER SUPPLY VS Specified voltage range 2.7 Operating voltage range IQ Quiescent current (per amplifier) Over temperature 5 Lower end 2.5 Higher end 5.5 IO = 0, VS = 5 V 750 IO = 0, VS = 5 V, TA = –40°C to 85°C V V 950 100 µA TEMPERATURE RANGE (2) Specified range –40 85 °C Operating range –55 125 °C Storage range –55 125 °C Output voltage swings are measured between the output and power-supply rails. Copyright © 1997–2016, Texas Instruments Incorporated Product Folder Links: OPA340 OPA2340 OPA4340 Submit Documentation Feedback 7 OPA340, OPA2340, OPA4340 SBOS073C – SEPTEMBER 1997 – REVISED AUGUST 2016 www.ti.com 6.8 Typical Characteristics At TA = 25°C, VS = 5 V, and RL = 10 kΩ connected to VS/2, unless otherwise noted. 160 0 100 PSRR 140 100 80 -90 60 40 -135 PSRR, CMRR (dB) -45 Phase (°) Voltage Gain (dB) 120 80 20 60 40 CMRR 20 0 -180 -20 0 0.1 1 10 100 1k 10k 100k 1M 10M 1 10 100 Frequency (Hz) 1k 10k 100k 1M Frequency (Hz) Figure 1. Open-Loop Gain/Phase vs Frequency Figure 2. Power-Supply and Common-Mode Rejection vs Frequency 1k 10k 140 Voltage Noise 100 10 10 1 Channel Separation (dB) 100 1k Current Noise (fA/ÖHz) Voltage Noise (nV/ÖHz) Current Noise 130 120 110 G = 1, All Channels 0.1 1 1 10 100 1k 10k 100k 100 10 1M 100 1k 0.1 5k G = 100 RL = 2kW 0.01 G = 10 RL = 10kW RL = 600 0.001 RL = 2kW G=1 RL = 10kW Output Resistance (W) RL = 600 THD+N (%) 100k Figure 4. Channel Separation vs Frequency Figure 3. Input Voltage and Current Noise Spectral Density vs Frequency 4k G = 10 3k 2k G=1 1k 0 0.0001 20 100 1k 10k 20k 10 100 Figure 5. Total Harmonic Distortion + Noise vs Frequency Submit Documentation Feedback 1k 10k 100k 1M 10M Frequency (Hz) Frequency (Hz) 8 10k Frequency (Hz) Frequency (Hz) Figure 6. Closed-Loop Output Impedance vs Frequency Copyright © 1997–2016, Texas Instruments Incorporated Product Folder Links: OPA340 OPA2340 OPA4340 OPA340, OPA2340, OPA4340 www.ti.com SBOS073C – SEPTEMBER 1997 – REVISED AUGUST 2016 Typical Characteristics (continued) At TA = 25°C, VS = 5 V, and RL = 10 kΩ connected to VS/2, unless otherwise noted. 130 AOL 120 90 RL = 10kW 110 CMRR (dB) AOL, PSRR (dB) 100 RL = 100kW RL = 2kW 100 80 70 60 PSRR 90 VS = 2.7V to 5V, VCM = -0.3V to (V+) -1.8V VS = 5V, VCM = -0.3V to 5.3V VS = 2.7V, VCM = -0.3V to 3V 50 80 40 -75 -50 0 -25 25 50 75 100 125 -75 -25 25 50 75 100 125 Figure 7. Open-Loop Gain and Power-Supply Rejection vs Temperature Figure 8. Common-Mode Rejection vs Temperature 800 Per Amplifier Per Amplifier Quiescent Current (mA) 900 800 700 600 750 700 650 600 500 -75 -50 0 -25 25 50 75 100 2.0 125 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 Supply Voltage (V) Temperature (°C) Figure 10. Quiescent Current vs Supply Voltage Figure 9. Quiescent Current vs Temperature 60 100 Short-Circuit Current (mA) -ISC 90 Short-Circuit Current (mA) 0 Temperature (°C) 1000 Quiescent Current (mA) -50 Temperature (°C) 80 70 60 50 +ISC 40 30 20 -ISC 50 +ISC 40 10 30 0 -75 -50 -25 0 25 50 75 100 125 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 Temperature (°C) Supply Voltage (V) Figure 11. Short-Circuit Current vs Temperature Figure 12. Short-Circuit Current vs Supply Voltage Copyright © 1997–2016, Texas Instruments Incorporated Product Folder Links: OPA340 OPA2340 OPA4340 Submit Documentation Feedback 9 OPA340, OPA2340, OPA4340 SBOS073C – SEPTEMBER 1997 – REVISED AUGUST 2016 www.ti.com Typical Characteristics (continued) At TA = 25°C, VS = 5 V, and RL = 10 kΩ connected to VS/2, unless otherwise noted. 1.0 1k 0.6 Input Bias Current (pA) Input Bias Current (pA) 0.8 100 10 1 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 0.1 -1.0 -75 -50 0 -25 25 50 75 100 125 0 -1 1 Temperature (°C) Figure 13. Input Bias Current vs Temperature 6 -55°C 3 2 1 +125°C ±10 ±20 ±30 ±40 ±50 ±60 ±70 ±80 VS = 2.7V 3 2 ±90 ±100 1M Figure 16. Maximum Output Voltage vs Frequency 18 25 Typical production distribution of packaged units. Percent of Amplifiers (%) Percent of Amplifiers (%) 10M Frequency (Hz) Figure 15. Output Voltage Swing vs Output Current 14 6 4 Output Current (mA) 16 5 Maximum output voltage without slew rate-induced distortion. 0 100k 0 0 4 1 -55°C +25°C VS = 5.5V 5 Output Voltage (VPP) Output Voltage (V) 4 +25°C 3 Figure 14. Input Bias Current vs Input Common-Mode Voltage 5 +125°C 2 Common-Mode Voltage (V) 12 10 8 6 4 2 Typical production distribution of packaged units. 20 15 10 5 500 400 300 200 100 0 -100 -200 -300 -400 -500 0 Offset Voltage (mV) Figure 17. Offset Voltage Production Distribution 10 Submit Documentation Feedback 0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 15 Offset Voltage Drift (mV/°C) Figure 18. Offset Voltage Drift Magnitude Production Distribution Copyright © 1997–2016, Texas Instruments Incorporated Product Folder Links: OPA340 OPA2340 OPA4340 OPA340, OPA2340, OPA4340 www.ti.com SBOS073C – SEPTEMBER 1997 – REVISED AUGUST 2016 Typical Characteristics (continued) 1V/div 50mV/div At TA = 25°C, VS = 5 V, and RL = 10 kΩ connected to VS/2, unless otherwise noted. 1ms/div 1ms/div CL = 100 pF CL = 100 pF Figure 19. Small-Signal Step Response Figure 20. Large-Signal Step Response 60 100 G = -1 0.01% Settling Time (ms) Overshoot (%) 50 G = +1 40 30 G = -5 20 10 10 0.1% 1 See text for reducing overshoot. G = +5 0 0.1 100 1000 10k 1 10 100 1000 Load Capacitance (pF) Closed-Loop Gain (V/V) Figure 21. Small-Signal Overshoot vs Load Capacitance Figure 22. Settling Time vs Closed-Loop Gain Copyright © 1997–2016, Texas Instruments Incorporated Product Folder Links: OPA340 OPA2340 OPA4340 Submit Documentation Feedback 11 OPA340, OPA2340, OPA4340 SBOS073C – SEPTEMBER 1997 – REVISED AUGUST 2016 www.ti.com 7 Detailed Description 7.1 Overview The OPA340 series operational amplifiers are fabricated on a state-of-the-art, 0.6-micron CMOS process. These devices are unity-gain stable and suitable for a wide range of general-purpose applications. Rail-to-rail input and output make them ideal for driving sampling A/D converters. In addition, excellent AC performance makes them well-suited for audio applications. The class AB output stage is capable of driving 600-Ω loads series and extends 500 mV beyond the supply. Rail-to-rail input and output swing significantly increases dynamic range, especially in low-supply applications. Figure 23 shows the input and output waveforms for the OPA340 in unitygain configuration. Operation is from a single 5-V supply with a 10-kΩ load connected to V/2. The input is a 5VPP sinusoid. Output voltage is approximately 4.98 VPP. Power-supply pins must be bypassed with 0.01-µF ceramic capacitors. VS = +5, G = +1, RL = 10kW 5 2V/div VIN 5 VOUT 0 Figure 23. Rail-to-Rail Input and Output 7.2 Functional Block Diagram V+ Reference Current VIN+ VINVBIAS1 Class AB Control Circuitry VO VBIAS2 V(Ground) Copyright © 2016, Texas Instruments Incorporated 12 Submit Documentation Feedback Copyright © 1997–2016, Texas Instruments Incorporated Product Folder Links: OPA340 OPA2340 OPA4340 OPA340, OPA2340, OPA4340 www.ti.com SBOS073C – SEPTEMBER 1997 – REVISED AUGUST 2016 7.3 Feature Description 7.3.1 Operating Voltage The OPA340 series operational amplifiers are fully specified from 2.7 V to 5 V. However, supply voltage may range from 2.5 V to 5.5 V. Parameters are ensured over the specified supply range—a unique feature of the OPA340 series. In addition, many specifications apply from –40°C to 85°C. Most behavior remains virtually unchanged throughout the full operating voltage range. Parameters which vary significantly with operating voltages or temperature are shown in the Typical Characteristics. 7.3.2 Rail-to-Rail Input The input common-mode voltage range of the OPA340 series extends 500 mV beyond the supply rails. This extended range is achieved with a complementary input stage—an N-channel input differential pair in parallel with a P-channel differential pair. The N-channel pair is active for input voltages close to the positive rail, typically (V+) – 1.3 V to 500 mV above the positive supply, while the P-channel pair is on for inputs from 500 mV below the negative supply to approximately (V+) – 1.3 V. There is a small transition region, typically (V+) – 1.5 V to (V+) – 1.1 V, in which both pairs are on. This 400-mV transition region can vary ±300 mV with process variation. Thus, the transition region (both stages on) can range from (V+) – 1.8 V to (V+) – 1.4 V on the low end, up to (V+) – 1.2 V to (V+) – 0.8 V on the high end. OPA340 series operational amplifiers are laser-trimmed to the reduce offset voltage difference between the Nchannel and P-channel input stages, resulting in improved common-mode rejection and a smooth transition between the N-channel pair and the P-channel pair. However, within the 400-mV transition region PSRR, CMRR, offset voltage, offset drift, and THD may be degraded compared to operation outside this region. A double-folded cascode adds the signal from the two input pairs and presents a differential signal to the class AB output stage. Normally, input bias current is approximately 200 fA; however, input voltages exceeding the power supplies by more than 500 mV can cause excessive current to flow in or out of the input pins. Momentary voltages greater than 500 mV beyond the power supply can be tolerated if the current on the input pins is limited to 10 mA. This current limiting is easily accomplished with an input resistor, as shown in Figure 24. Many input signals are inherently current-limited to less than 10 mA; therefore, a limiting resistor is not required. V+ IOVERLOAD 10mA max OPAx340 VOUT VIN 5kW Copyright © 2016, Texas Instruments Incorporated Figure 24. Input Current Protection for Voltages Exceeding the Supply Voltage 7.3.3 Rail-to-Rail Output A class AB output stage with common-source transistors is used to achieve rail-to-rail output. For light resistive loads (> 50 kΩ), the output voltage is typically a few millivolts from the supply rails. With moderate resistive loads (2 kΩ to 50 kΩ), the output can swing to within a few tens of millivolts from the supply rails and maintain high open-loop gain (see Figure 15). 7.3.4 Capacitive Load and Stability OPA340 series operational amplifiers can drive a wide range of capacitive loads. However, all operational amplifiers under certain conditions can become unstable. operational amplifier configuration, gain, and load value are some of the factors to consider when determining stability. An operational amplifier in unity-gain configuration is most susceptible to the effects of capacitive load. The capacitive load reacts with the output resistance of the operational amplifier, along with any additional load resistance, to create a pole in the small-signal response that degrades the phase margin. In unity-gain configuration, the OPA340 series operational amplifiers perform well, with a pure capacitive load up to approximately 1000 pF. Increasing gain enhances the amplifier ability to drive more capacitance (see Figure 21). Copyright © 1997–2016, Texas Instruments Incorporated Product Folder Links: OPA340 OPA2340 OPA4340 Submit Documentation Feedback 13 OPA340, OPA2340, OPA4340 SBOS073C – SEPTEMBER 1997 – REVISED AUGUST 2016 www.ti.com Feature Description (continued) One method of improving capacitive load drive in the unity-gain configuration is to insert a 10-Ω to 20-Ω resistor in series with the output, as shown in Figure 25. This resistor significantly reduces ringing with large capacitive loads. However, if there is a resistive load in parallel with the capacitive load, it creates a voltage divider introducing a DC error at the output and slightly reduces output swing. This error can be insignificant. For instance, with RL = 10 kΩ and RS = 20 Ω, there is only an approximate 0.2% error at the output. When used with the miniature package options of the OPA340 series, the combination is ideal for space-limited and low-power applications. For further information, consult the ADS7816 data sheet, 12-Bit High Speed Micro Power Sampling Analog-To-Digital Converter (SBAS061). With the OPA340 in a noninverting configuration, an RC network at the output of the amplifier can be used to filter high-frequency noise in the signal (see Figure 26). In the inverting configuration, filtering may be accomplished with a capacitor across the feedback resistor (see Figure 27). V+ RS VOUT OPAx340 10W to 20W VIN CL RL Copyright © 2016, Texas Instruments Incorporated Figure 25. Series Resistor in Unity-Gain Configuration Improves Capacitive Load Drive 7.3.5 Driving A/D Converters The OPA340 series operational amplifiers are optimized for driving medium-speed (up to 100 kHz) sampling A/D converters. However, they also offer excellent performance for higher speed converters. The OPA340 series provides an effective means of buffering the converter input capacitance and resulting charge injection while providing signal gain. Figure 26 and Figure 27 show the OPA340 driving an ADS7816. The ADS7816 is a 12-bit, micro-power sampling converter in the tiny 8-pin VSSOP package. +5V 0.1mF 1 VREF 8 V+ 500W 0.1mF DCLOCK +In ADS7816 12-Bit A/D OPA340 2 VIN -In 3300pF DOUT CS/SHDN 3 7 6 5 Serial Interface GND 4 VIN = 0V to 5V for 0V to 5V output. NOTE: A/D Input = 0 to VREF RC network filters high-frequency noise. Copyright © 2016, Texas Instruments Incorporated Figure 26. OPA340 in Noninverting Configuration Driving ADS7816 14 Submit Documentation Feedback Copyright © 1997–2016, Texas Instruments Incorporated Product Folder Links: OPA340 OPA2340 OPA4340 OPA340, OPA2340, OPA4340 www.ti.com SBOS073C – SEPTEMBER 1997 – REVISED AUGUST 2016 Feature Description (continued) +5V 330pF 0.1mF 5kW 0.1mF 5kW VIN 1 VREF 8 V+ DCLOCK +In ADS7816 12-Bit A/D OPA340 2 -In DOUT CS/SHDN 3 7 6 5 Serial Interface GND 4 VIN = 0V to -5V for 0V to 5V output. NOTE: A/D Input = 0 to VREF Copyright © 2016, Texas Instruments Incorporated Figure 27. OPA340 in Inverting Configuration Driving ADS7816 Filters 160Hz to 2.4kHz +5V 10MW VIN 200pF 1/2 OPA2340 10MW 243kW 1.74MW 47pF 1/2 OPA2340 RL 220pF Copyright © 2016, Texas Instruments Incorporated Figure 28. Speech Bandpass Filter 7.4 Device Functional Modes The OPAx340 has a single functional mode and is operational when the power-supply voltage is greater than 2.7 V (±1.35 V). The maximum power supply voltage for the OPAx340 is 5.5 V (±2.75 V). Copyright © 1997–2016, Texas Instruments Incorporated Product Folder Links: OPA340 OPA2340 OPA4340 Submit Documentation Feedback 15 OPA340, OPA2340, OPA4340 SBOS073C – SEPTEMBER 1997 – REVISED AUGUST 2016 www.ti.com 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Application Information The OPAx340 amplifier is a single-supply, CMOS operational amplifier with 5.5-MHz unity-gain bandwidth and supply current of 950 µA. Its performance is optimized for low-voltage (2.7 V to 5.5 V), single-supply applications, with its input common-mode voltage linear range extending 300 mV beyond the rails and the output voltage swing within 5 mV of either rail. The OPAx340 series features wide bandwidth and unity-gain stability with rail-torail input and output for increased dynamic range. Power-supply pins must be bypassed with 0.01-µF ceramic capacitors. 8.2 Typical Applications 8.2.1 Single-Pole, Low-Pass Filter Figure 29 shows the OPA340 in a typical noninverting application with the input signal bandwidth limited by the input lowpass filter. Figure 29. Single-Pole, Low-Pass Filter Equation 1 through Equation 2 show calculations for corner frequency and gain: (1) (2) 16 Submit Documentation Feedback Copyright © 1997–2016, Texas Instruments Incorporated Product Folder Links: OPA340 OPA2340 OPA4340 OPA340, OPA2340, OPA4340 www.ti.com SBOS073C – SEPTEMBER 1997 – REVISED AUGUST 2016 Typical Applications (continued) 8.2.1.1 Design Requirements When receiving low-level signals, limiting the bandwidth of the incoming signals into the system is often required. The simplest way to establish this limited bandwidth is to place an RC filter at the noninverting terminal of the amplifier, as shown in Figure 29. If a steeper attenuation level is required, a two-pole or higher-order filter may be used. 8.2.1.2 Detailed Design Procedure The design goals for this circuit include these parameters: • A noninverting gain of 10 V/V (20 dB) • Design a single-pole response circuit with –3-dB rolloff at 15.9 kHz and 159 Hz • Modify the design to increase attenuation level to –40 dB/decade (Sallen-Key Filter) Use these design values: • C1 = 0 nF, 10 nF, 1 µF • R1 = 1 kΩ • RG = 10 kΩ • RF = 90 kΩ Figure 30 shows how the output voltage of OPA340 changes over frequency depending on the value of C1 with a constant R1 of 1 kΩ. Without any filtering of the input signal (C1 = 0), the –3-dB effective bandwidth is a function of the OPA340 unity-gain bandwidth and closed-loop gain, f(–3dB) = UGBW/ACL, where ACL is closed-loop gain and UGBW denotes unity-gain bandwidth. Thus, for a closed-loop gain = 10, f(–3dB) = 1 MHz/10 =100 kHz; see Figure 30. To further limit the output bandwidth, an appropriate choice of C1 must be made: for C1 = 10 nF, = 15.9 kHz. To further limit the bandwidth, a larger C1 must be used: choosing C1 = 1 µF, = 159 Hz (see Figure 30). 8.2.1.3 Application Curve Gain = VOUT/VIN (dB) 40 C1 = 0 20 C1 = 10 nF 0 C1 = 1 m F -20 -40 1 10 100 1k 10 k 100 k 1M Frequency (Hz) Figure 30. OPA340 Single-Pole AC Gain vs Frequency Response Copyright © 1997–2016, Texas Instruments Incorporated Product Folder Links: OPA340 OPA2340 OPA4340 Submit Documentation Feedback 17 OPA340, OPA2340, OPA4340 SBOS073C – SEPTEMBER 1997 – REVISED AUGUST 2016 www.ti.com Typical Applications (continued) 8.2.2 Two-Pole, Low-Pass Filter If even more attenuation is required, a multiple pole filter is required. The Sallen-Key filter may be used for this task, as shown in Figure 31. For best results, the amplifier must have effective bandwidth that is at least 10 times higher than the filter cutoff frequency. Failure to follow this guideline results in a phase shift of the amplifier, which in turn leads to lower precision of the filter bandwidth. Additionally, to minimize the loading effect between multiple RC pairs on overall the filter cutoff frequency, choose R = 10 × R1 and C2 = C1/10; see Figure 32. Figure 31. Two-Pole, Lowpass Filter Equation 3 through Equation 5 show calculations for corner frequency and gain: (3) (4) (5) 8.2.2.1 Detailed Design Procedure Use these design values: • C1 = 10 nF and C2 = 1 nF • R1 = 1 kΩ and R2= 10 kΩ • RG = 10 kΩ • RF = 90 kΩ Figure 32 shows the Sallen-Key filter second-order response for different RC values: for R and C values above, = 15.9 kHz. To further limit the bandwidth, a larger RC value must be used: increasing C values 100 times, such as C1 = 1 µF and C2 = 0.1 µF, with unchanged resistors, results in the second-order rolloff at = 159 Hz. See Figure 32. 18 Submit Documentation Feedback Copyright © 1997–2016, Texas Instruments Incorporated Product Folder Links: OPA340 OPA2340 OPA4340 OPA340, OPA2340, OPA4340 www.ti.com SBOS073C – SEPTEMBER 1997 – REVISED AUGUST 2016 Typical Applications (continued) 8.2.2.2 Application Curve Figure 32. OPA340 Two-Pole, Lowpass Sallen-Key AC Gain vs Frequency Response 9 Power Supply Recommendations The OPAx340 is specified for operation from 2.7 V to 5.5 V (±1.35 V to ±2.75 V). CAUTION Supply voltages larger than 7 V can permanently damage the device (see the Absolute Maximum Ratings). TI recommends placing 0.1-μF bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or high-impedance power supplies. Copyright © 1997–2016, Texas Instruments Incorporated Product Folder Links: OPA340 OPA2340 OPA4340 Submit Documentation Feedback 19 OPA340, OPA2340, OPA4340 SBOS073C – SEPTEMBER 1997 – REVISED AUGUST 2016 www.ti.com 10 Layout 10.1 Layout Guidelines Pay attention to good layout practices. Keep traces short and when possible, use a printed-circuit board (PCB) ground plane with surface-mount components placed as close to the device pins as possible. Place a 0.1-μF capacitor closely across the supply pins. Apply these guidelines throughout the analog circuit to improve performance and provide benefits, such as reducing the electromagnetic interference (EMI) susceptibility. Operational amplifiers vary in susceptibility to radio frequency interference (RFI). RFI can generally be identified as a variation in offset voltage or DC signal levels with changes in the interfering RF signal. The OPA340 is specifically designed to minimize susceptibility to RFI and demonstrates remarkably low sensitivity compared to previous generation devices. Strong RF fields can still cause varying offset levels. 10.2 Layout Example Place components close to device and to eachother to reduce parasitic errors Run the input traces as far away from the supply lines as possible VS+ RF N/C N/C GND –IN V+ VIN +IN OUTPUT V– N/C RG GND GND Use low-ESR, ceramic bypass capacitor VS– Use low-ESR, ceramic bypass capacitor VOUT Copyright © 2016, Texas Instruments Incorporated Figure 33. Layout Recommendation VIN + VOUT ± RG RF Copyright © 2016, Texas Instruments Incorporated Figure 34. Schematic Representation 20 Submit Documentation Feedback Copyright © 1997–2016, Texas Instruments Incorporated Product Folder Links: OPA340 OPA2340 OPA4340 OPA340, OPA2340, OPA4340 www.ti.com SBOS073C – SEPTEMBER 1997 – REVISED AUGUST 2016 11 Device and Documentation Support 11.1 Device Support 11.1.1 Development Support 11.1.1.1 TINA-TI™ (Free Software Download) TINA™ is a simple, powerful, and easy-to-use circuit simulation program based on a SPICE engine. TINA-TI™ is a free, fully-functional version of the TINA software, preloaded with a library of macro models in addition to a range of both passive and active models. TINA-TI provides all the conventional DC, transient, and frequency domain analysis of SPICE, as well as additional design capabilities. Available as a free download from the Analog eLab Design Center, TINA-TI offers extensive post-processing capability that allows users to format results in a variety of ways. Virtual instruments offer the ability to select input waveforms and probe circuit nodes, voltages, and waveforms, creating a dynamic quick-start tool. NOTE These files require that either the TINA software (from DesignSoft™) or TINA-TI software be installed. Download the free TINA-TI software from the TINA-TI folder. 11.1.1.2 DIP Adapter EVM The DIP Adapter EVM tool provides an easy, low-cost way to prototype small surface mount ICs. The evaluation tool these TI packages: D or U (SOIC-8), PW (TSSOP-8), DGK (MSOP-8), DBV (SOT23-6, SOT23-5 and SOT23-3), DCK (SC70-6 and SC70-5), and DRL (SOT563-6). The DIP Adapter EVM may also be used with terminal strips or may be wired directly to existing circuits. 11.1.1.3 Universal Operational Amplifier EVM The Universal Op Amp EVM is a series of general-purpose, blank circuit boards that simplify prototyping circuits for a variety of IC package types. The evaluation module board design allows many different circuits to be constructed easily and quickly. Five models are offered, with each model intended for a specific package type. PDIP, SOIC, MSOP, TSSOP and SOT23 packages are all supported. NOTE These boards are unpopulated, so users must provide their own ICs. TI recommends requesting several operational amplifier device samples when ordering the Universal Op Amp EVM. 11.1.1.4 TI Precision Designs TI Precision Designs are analog solutions created by TI’s precision analog applications experts and offer the theory of operation, component selection, simulation, complete PCB schematic and layout, bill of materials, and measured performance of many useful circuits. TI Precision Designs are available online at http://www.ti.com/ww/en/analog/precision-designs/. 11.1.1.5 WEBENCH® Filter Designer WEBENCH® Filter Designer is a simple, powerful, and easy-to-use active filter design program. The WEBENCH Filter Designer lets you create optimized filter designs using a selection of TI operational amplifiers and passive components from TI's vendor partners. Available as a web-based tool from the WEBENCH® Design Center, WEBENCH® Filter Designer allows you to design, optimize, and simulate complete multistage active filter solutions within minutes. Copyright © 1997–2016, Texas Instruments Incorporated Product Folder Links: OPA340 OPA2340 OPA4340 Submit Documentation Feedback 21 OPA340, OPA2340, OPA4340 SBOS073C – SEPTEMBER 1997 – REVISED AUGUST 2016 www.ti.com 11.2 Documentation Support 11.2.1 Related Documentation For related documentation, see the following application reports and publications (available for download from www.ti.com): • 12-Bit High Speed Micro Power Sampling Analog-To-Digital Converter (SBAS061) • A Dual-Polarity, Bidirectional Current-Shunt Monitor (SLYT311) • OPA340, OPA2340, OPA4340 EMI Immunity Performance (SBOZ010) • Getting the Full Potential from your ADC (SBAA069) • Feedback Plots Define Op Amp AC Performance (SBOA015) • Capacitive Load Drive Solution Using an Isolation Resistor (TIPD128) • Circuit Board Layout Techniques (SLOA089) 11.3 Related Links Table 1 lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 1. Related Links PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY OPA340 Click here Click here Click here Click here Click here OPA2340 Click here Click here Click here Click here Click here OPA4340 Click here Click here Click here Click here Click here 11.4 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 11.5 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 11.6 Trademarks MicroAmplifier, TINA-TI, E2E are trademarks of Texas Instruments. WEBENCH is a registered trademark of Texas Instruments. TINA, DesignSoft are trademarks of DesignSoft, Inc. All other trademarks are the property of their respective owners. 11.7 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 22 Submit Documentation Feedback Copyright © 1997–2016, Texas Instruments Incorporated Product Folder Links: OPA340 OPA2340 OPA4340 OPA340, OPA2340, OPA4340 www.ti.com SBOS073C – SEPTEMBER 1997 – REVISED AUGUST 2016 11.8 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Copyright © 1997–2016, Texas Instruments Incorporated Product Folder Links: OPA340 OPA2340 OPA4340 Submit Documentation Feedback 23 PACKAGE OPTION ADDENDUM www.ti.com 27-Sep-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) OPA2340EA/250 ACTIVE VSSOP DGK 8 250 RoHS & Green NIPDAUAG Level-2-260C-1 YEAR A40A Samples OPA2340EA/250G4 ACTIVE VSSOP DGK 8 250 RoHS & Green NIPDAUAG Level-2-260C-1 YEAR A40A Samples OPA2340EA/2K5 ACTIVE VSSOP DGK 8 2500 RoHS & Green NIPDAUAG Level-2-260C-1 YEAR A40A Samples OPA2340EA/2K5G4 ACTIVE VSSOP DGK 8 2500 RoHS & Green NIPDAUAG Level-2-260C-1 YEAR A40A Samples OPA2340UA ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-2-260C-1 YEAR OPA 2340UA Samples OPA2340UA/2K5 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-2-260C-1 YEAR OPA 2340UA Samples OPA2340UA/2K5G4 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-2-260C-1 YEAR OPA 2340UA Samples OPA340NA/250 ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 A40 Samples OPA340NA/250G4 ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 A40 Samples OPA340NA/3K ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 A40 Samples OPA340NA/3KG4 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 A40 Samples OPA340PA ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type -40 to 85 OPA340PA Samples OPA340UA ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA 340UA Samples OPA340UA/2K5 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA 340UA Samples OPA340UA/2K5G4 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA 340UA Samples OPA4340EA/250 ACTIVE SSOP DBQ 16 250 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA 4340EA Samples OPA4340EA/250G4 ACTIVE SSOP DBQ 16 250 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA 4340EA Samples OPA4340EA/2K5 ACTIVE SSOP DBQ 16 2500 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA 4340EA Samples Addendum-Page 1 -40 to 85 PACKAGE OPTION ADDENDUM www.ti.com 27-Sep-2022 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) (3) Device Marking Samples (4/5) (6) OPA4340UA ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 85 OPA4340UA Samples OPA4340UA/2K5 ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 85 OPA4340UA Samples OPA4340UA/2K5G4 ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 85 OPA4340UA Samples OPA4340UAG4 ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 85 OPA4340UA Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of