OPA350UA

OPA350 OPA2350 OPA4350 SBOS099C − SEPTEMBER 2000 − REVISED JANUARY 2005 High-Speed, Single-Supply, Rail-to-Rail OPERATIONAL AMPLIFIERS MicroAmplifiertSeries FEATURES D D D D D D D D D D D D D D D D D D RAIL-TO-RAIL INPUT RAIL-TO-RAIL OUTPUT (within 10mV) WIDE BANDWIDTH: 38MHz HIGH SLEW RATE: 22V/µs LOW NOISE: 5nV/√Hz LOW THD+NOISE: 0.0006% UNITY-GAIN STABLE MicroSIZE PACKAGES SINGLE, DUAL, AND QUAD DESCRIPTION The OPA350 series rail-to-rail CMOS operational amplifiers are optimized for low voltage, single-supply operation. Rail-to-rail input/output, low noise (5nV/√Hz), and high speed operation (38MHz, 22V/µs) make them ideal for driving sampling Analog-to-Digital (A/D) converters. They are also well suited for cell phone PA control loops and video processing (75Ω drive capability) as well as audio and general purpose applications. Single, dual, and quad versions have identical specifications for maximum design flexibility. The OPA350 series operates on a single supply as low as 2.5V with an input common-mode voltage range that extends 300mV below ground and 300mV above the positive supply. Output voltage swing is to within 10mV of the supply rails with a 10kΩ load. Dual and quad designs feature completely independent circuitry for lowest crosstalk and freedom from interaction. The single (OPA350) and dual (OPA2350) come in the miniature MSOP-8 surface mount, SO-8 surface mount, and DIP-8 packages. The quad (OPA4350) packages are the space-saving SSOP-16 surface mount and SO-14 surface mount. All are specified from −40°C to +85°C and operate from −55°C to +150°C. SPICE model available at www.ti.com APPLICATIONS CELL PHONE PA CONTROL LOOPS DRIVING A/D CONVERTERS VIDEO PROCESSING DATA ACQUISITION PROCESS CONTROL AUDIO PROCESSING COMMUNICATIONS ACTIVE FILTERS TEST EQUIPMENT OPA350 NC − In +In V− 1 2 3 4 8 7 6 5 NC V+ Output NC OPA4350 Out A Out A −In A OPA4350 1 2 A 3 4 5 B − In B 16 15 D 14 13 12 C 11 10 9 SSOP−16 Out D −In D 1 2 A 3 4 5 B C 6 7 SO−14 D 14 13 12 11 10 9 8 Out D − In D − In A +In A +V +In D −V +In A DIP−8, SO−8, MSOP−8 +In D V− +In C − In C OPA2350 Out A 1 A B 8 7 6 5 V+ V+ +In B +In B +In C −In C 6 7 8 − In A 2 +In A − 3 4 −In B Out B − In B +In B Out B NC Out C NC Out B Out C DIP−8, SO−8, MSOP−8 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright  2000−2005, Texas Instruments Incorporated www.ti.com OPA350 OPA2350 OPA4350 SBOS099C − SEPTEMBER 2000 − REVISED JANUARY 2005 www.ti.com ABSOLUTE MAXIMUM RATINGS(1) Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.0V Signal Input Terminals(2), Voltage . . . . . (V−) − 0.3V to (V+) + 0.3V Current . . . . . . . . . . . . . . . . . . . . . . 10mA Open Short-Circuit Current(3) . . . . . . . . . . . . . . . . . . . . Continuous Operating Temperature Range . . . . . . . . . . . . . . . −55°C to +150°C Storage Temperature Range . . . . . . . . . . . . . . . . . −55°C to +150°C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C Lead Temperature (soldering, 10s) . . . . . . . . . . . . . . . . . . . . . +300°C (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. (2) Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.3V beyond the supply rails should be current limited to 10mA or less. (3) Short-circuit to ground, one amplifier per package. ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGE/ORDERING INFORMATION(1) PRODUCT SINGLE OPA350EA OPA350UA OPA350PA DUAL OPA2350EA OPA2350UA OPA2350PA QUAD OPA4350EA OPA4350UA SSOP-16 SO-14 DBQ D −40°C to +85°C −40°C to +85°C OPA4350EA OPA4350UA OPA4350EA/250 OPA4350EA/2K5 OPA4350UA OPA4350UA/2K5 Tape and Reel, 250 Tape and Reel, 2500 Rails Tape and Reel, 2500 MSOP-8 SO-8 DIP-8 DGK D P −40°C to +85°C −40°C to +85°C −40°C to +85°C D50 OPA2350UA OPA2350PA OPA2350EA/250 OPA2350EA/2K5 OPA2350UA OPA2350UA/2K5 OPA2350PA Tape and Reel, 250 Tape and Reel, 2500 Rails Tape and Reel, 2500 Rails MSOP-8 SO-8 DIP-8 DGK D P −40°C to +85°C −40°C to +85°C −40°C to +85°C C50 OPA350UA OPA350PA OPA350EA/250 OPA350EA/2K5 OPA350UA OPA350UA/2K5 OPA350PA Tape and Reel, 250 Tape and Reel, 2500 Rails Tape and Reel, 2500 Rails PACKAGE-LEAD PACKAGE DESIGNATOR SPECIFIED TEMPERATURE RANGE PACKAGE MARKING ORDERING NUMBER TRANSPORT MEDIA, QUANTITY (1) For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet. 2 www.ti.com OPA350 OPA2350 OPA4350 SBOS099C − SEPTEMBER 2000 − REVISED JANUARY 2005 ELECTRICAL CHARACTERISTICS: VS = 2.7V to 5.5V Boldface limits apply over the temperature range, TA = −40°C to +85°C. VS = 5V. All specifications at TA = +25°C, RL = 1kΩ connected to VS/2 and VOUT = VS/2, unless otherwise noted. PARAMETER OFFSET VOLTAGE Input Offset Voltage TA = −40°C to +85°C vs Temperature vs Power-Supply Rejection Ratio TA = −40°C to +85°C Channel Separation (dual, quad) INPUT BIAS CURRENT Input Bias Current vs Temperature Input Offset Current NOISE Input Voltage Noise, f = 100Hz to 400kHz Input Voltage Noise Density, f = 10kHz Input Current Noise Density, f = 100kHz Current Noise Density, f = 10kHz INPUT VOLTAGE RANGE Common-Mode Voltage Range Common-Mode Rejection Ratio TA = −40°C to +85°C INPUT IMPEDANCE Differential Common-Mode OPEN-LOOP GAIN Open-Loop Voltage Gain TA = −40°C to +85°C TA = −40°C to +85°C FREQUENCY RESPONSE Gain-Bandwidth Product Slew Rate Settling Time: 0.1% 0.01% Overload Recovery Time Total Harmonic Distortion + Noise Differential Gain Error Differential Phase Error THD+N GBW SR AOL RL = 10kΩ, 50mV < VO < (V+) −50mV RL = 10kW, 50mV < VO < (V+) −50mV RL = 1kΩ, 200mV < VO < (V+) −200mV RL = 1kW, 200mV < VO < (V+) −200mV CL = 100pF G=1 G=1 G = ±1, 2V Step G = ±1, 2V Step VIN • G = VS RL = 600Ω, VO = 2.5VPP(2), G = 1, f = 1kHz G = 2, RL = 600Ω, VO = 1.4V(3) G = 2, RL = 600Ω, VO = 1.4V(3) 100 100 100 100 38 22 0.22 0.5 0.1 0.0006 0.17 0.17 120 122 dB dB dB dB MHz V/µs µs µs µs % % deg VCM CMRR TA = −40°C to +85°C VS = 2.7V, −0.1V < VCM < 2.8V VS = 5.5V, −0.1V < VCM < 5.6V VS = 5.5V, −0.1V < VCM < 5.6V −0.1 66 74 74 1013 || 2.5 1013 || 6.5 84 90 (V+) + 0.1 V dB dB dB Ω || pF Ω || pF in en 4 7 5 4 µVrms nV/√Hz nV/√Hz fA/√Hz IOS IB ±0.5 ±0.5 ±10 ±10 pA pA See Typical Characteristics PSRR VOS VS = 5V TA = −40°C to +85°C VS = 2.7V to 5.5V, VCM = 0V VS = 2.7V to 5.5V, VCM = 0V dc ±150 ±4 40 0.15 150 175 ±500 ±1 µV mV µV/°C µV/V µV/V µV/V TEST CONDITIONS OPA350, OPA2350, OPA4350 MIN TYP(1) MAX UNIT (1) VS = +5V. (2) VOUT = 0.25V to 2.75V. (3) NTSC signal generator used. See Figure 6 for test circuit. (4) Output voltage swings are measured between the output and power supply rails. (5) See typical characteristic curve, Output Voltage Swing vs Output Current. 3 OPA350 OPA2350 OPA4350 SBOS099C − SEPTEMBER 2000 − REVISED JANUARY 2005 www.ti.com ELECTRICAL CHARACTERISTICS: VS = 2.7V to 5.5V (continued) Boldface limits apply over the temperature range, TA = −40°C to +85°C. VS = 5V. All specifications at TA = +25°C, RL = 1kΩ connected to VS/2 and VOUT = VS/2, unless otherwise noted. PARAMETER OUTPUT Voltage Output Swing from Rail(4) TA = −40°C to +85°C TA = −40°C to +85°C Output Current Short-Circuit Current Capacitive Load Drive POWER SUPPLY Operating Voltage Range Minimum Operating Voltage Quiescent Current (per amplifier) TA = −40°C to +85°C TEMPERATURE RANGE Specified Range Operating Range Storage Range Thermal Resistance MSOP-8 Surface Mount SO-8 Surface Mount DIP-8 SO-14 Surface Mount SSOP-16 Surface Mount (1) VS = +5V. (2) VOUT = 0.25V to 2.75V. (3) NTSC signal generator used. See Figure 6 for test circuit. (4) Output voltage swings are measured between the output and power supply rails. (5) See typical characteristic curve, Output Voltage Swing vs Output Current. qJA 150 150 100 100 100 °C/W °C/W °C/W °C/W °C/W IQ IO = 0 IO = 0 −40 −55 −55 VS TA = −40°C to +85°C 2.7 2.5 5.2 7.5 8.5 +85 +150 +150 5.5 V V mA mA °C °C °C VOUT RL = 10kΩ, AOL ≥ 100dB RL = 10kW, AOL . 100dB RL = 1kΩ, AOL ≥ 100dB RL = 1kW, AOL . 100dB IOUT ISC CLOAD ±40(5) ±80 See Typical Characteristics 10 25 50 50 200 200 mV mV mV mV mA mA TEST CONDITIONS OPA350, OPA2350, OPA4350 MIN TYP(1) MAX UNIT 4 www.ti.com OPA350 OPA2350 OPA4350 SBOS099C − SEPTEMBER 2000 − REVISED JANUARY 2005 TYPICAL CHARACTERISTICS All specifications at TA = +25°C, VS = +5V, and RL = 1kΩ connected to VS/2, unless otherwise noted. OPEN-LOOP GAIN/PHASE vs FREQUENCY 160 140 Voltage Gain (dB) 120 100 80 60 G 40 20 0 0.1 1 10 100 1k 10k 100k Frequency (Hz) 1M −180 10M 100M −135 φ −90 PSRR, CMRR (dB) −45 Phase (_) 0 100 90 80 70 60 50 40 30 20 10 0 10 POWER SUPPLY AND COMMON− MODE REJECTION RATIO vs FREQUENCY PSRR CMRR (VS = +5V VCM = − 0.1V to 5.1V) 100 1k 10k 100k 1M 10M Frequency (Hz) INPUT VOLTAGE AND CURRENT NOISE SPECTRAL DENSITY vs FREQUENCY 100k 10k CHANNEL SEPARATION vs FREQUENCY 140 130 10k Voltage Noise (nV√ Hz) Current Noise 1k Current Noise (fA√Hz) Channel Separation (dB) 120 110 100 90 80 70 Dual and quad devices. 10 100 1k 10k 100k 1M 10M 1k Voltage Noise 100 100 10 10 1 0.1 10M 1 10 100 1k 10k 100k 1M Frequency (Hz) 60 Frequency (Hz) TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 1 RL = 600Ω Harmonic Distortion (%) 0.1 THD+N (%) G = 100, 3VPP (VO = 1V to 4V) HARMONIC DISTORTION + NOISE vs FREQUENCY 1 (−40dBc) 0.1 (−60dBc) 0.01 (−80dBc) 0.001 (−100dBc) 0.0001 (−120dBc) 1k G=1 VO = 2.5VPP RL = 600Ω 0.01 G = 10, 3VPP (VO = 1V to 4V) G = 1, 3VPP (VO = 1V to 4V) Input goes through transition region G = 1, 2.5VPP (VO = 0.25V to 2.75V) Input does NOT go through transition region 0.001 3rd−Harmonic 2nd−Harmonic 10k 100k Frequency (Hz) 1M 0.0001 10 100 1k Frequency (Hz) 10k 100k 5 OPA350 OPA2350 OPA4350 SBOS099C − SEPTEMBER 2000 − REVISED JANUARY 2005 www.ti.com TYPICAL CHARACTERISTICS (continued) All specifications at TA = +25°C, VS = +5V, and RL = 1kΩ connected to VS/2, unless otherwise noted. DIFFERENTIAL GAIN/PHASE vs RESISTIVE LOAD 0.5 Phase G=2 VO = 1.4V NTSC Signal Generator See Figure 6 for test circuit. 130 OPEN−LOOP GAIN vs TEMPERATURE 0.3 Open−Loop Gain (dB) 0.4 Differential Gain (%) Differential Phase (_ ) 125 RL = 10kΩ RL = 1kΩ 120 RL = 600Ω 115 0.2 Gain 0.1 110 0 100 200 300 400 500 600 700 800 900 1000 − 75 − 50 − 25 0 25 50 75 100 125 Resistive Load ( Ω ) Temperature (_ C) 0 COMMON−MODE AND POWER− SUPPLY REJECTION RATIO vs TEMPERATURE 100 110 CMRR, VS = 5.5V (VCM = −0.1V to +5.6V) Slew Rate (V/µ s) 90 CMRR (dB) 100 PSRR (dB) SLEW RATE vs TEMPERATURE 40 35 30 Negative Slew Rate 25 Positive Slew Rate 20 15 10 5 80 PSRR 70 CMRR, VS = 2.7V (VCM = −0.1V to +2.8V) 90 80 60 −75 − 50 −25 0 25 50 75 100 70 125 0 − 75 − 50 − 25 0 25 50 75 100 125 Temperature (_ C) Temperature (_ C) QUIESCENT CURRENT AND SHORT−CIRCUIT CURRENT vs TEMPERATURE 7.0 +ISC − ISC Short−Circuit Current (mA) Quiescent Current (mA) Quiescent Current (mA) 6.5 6.0 5.5 5.0 4.5 4.0 3.5 −75 IQ 90 80 70 60 50 40 30 −50 −25 0 25 50 Temperature (_ C) 75 100 125 100 QUIESCENT CURRENT vs SUPPLY VOLTAGE 6.0 Per Amplifier 5.5 5.0 4.5 4.0 3.5 3.0 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Supply Voltage (V) 6 www.ti.com OPA350 OPA2350 OPA4350 SBOS099C − SEPTEMBER 2000 − REVISED JANUARY 2005 TYPICAL CHARACTERISTICS (continued) All specifications at TA = +25°C, VS = +5V, and RL = 1kΩ connected to VS/2, unless otherwise noted. INPUT BIAS CURRENT vs TEMPERATURE 1k 1.5 INPUT BIAS CURRENT vs INPUT COMMON−MODE VOLTAGE Input Bias Current (pA) 10 Input Bias Current (pA) − 75 − 50 − 25 0 25 50 Temperature (_ C) 75 100 125 100 1.0 0.5 1 0.0 0.1 −0.5 − 0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Common−Mode Voltage (V) CLOSED−LOOP OUTPUT IMPEDANCE vs FREQUENCY 100 10 Output Impedance (Ω ) Output Voltage (VPP) 1 0.1 0.01 0.001 0.0001 1 10 100 1k 10k 100k 1M 10M 100M Frequency (Hz) G = 100 G = 10 G=1 6 5 4 3 2 1 0 100k MAXIMUM OUTPUT VOLTAGE vs FREQUENCY VS = 5.5V Maximum output voltage without slew rate−induced distortion. VS = 2.7V 1M Frequency (Hz) 10M 100M OUTPUT VOLTAGE SWING vs OUTPUT CURRENT V+ (V+)− 1 Output Voltage (V) +125_ C (V+)− 2 (V− )+2 (V− )+1 (V− ) 0 140 130 − 55_ C Open−Loop Gain (dB) +25_ C 120 110 100 90 80 70 60 ± 10 ± 20 Output Current (mA) ± 30 ± 40 0 OPEN−LOOP GAIN vs OUTPUT VOLTAGE SWING IOUT = 250µA I OUT = 2.5mA Depending on circuit configuration (including closed−loop gain) performance may be degraded in shaded region. +125_ C +25_ C − 55_ C IOUT = 4.2mA 20 40 60 80 100 120 140 160 180 200 Output Voltage Swing from Rails (mV) 7 OPA350 OPA2350 OPA4350 SBOS099C − SEPTEMBER 2000 − REVISED JANUARY 2005 www.ti.com TYPICAL CHARACTERISTICS (continued) All specifications at TA = +25°C, VS = +5V, and RL = 1kΩ connected to VS/2, unless otherwise noted. OFFSET VOLTAGE PRODUCTION DISTRIBUTION 18 16 Percent of Amplifiers (%) 14 12 10 8 6 4 2 0 −500 −450 −400 −350 −300 −250 −200 −150 −100 −50 0 50 100 150 200 250 300 350 400 450 500 Typical distribution of packaged units. Percent of Amplifiers (%) 20 18 16 14 12 10 8 6 4 2 0 0 1 2 3 OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION Typical production distribution of packaged units. 4 5 6 7 8 9 10 11 12 13 14 15 Offset Voltage (µV) Offset Voltage Drift (µV/_ C) SMALL−SIGNAL OVERSHOOT vs LOAD CAPACITANCE 80 70 G=1 50 40 30 20 10 0 10 100 1k 10k 100k 1M Load Capacitance (pF) 0.1 −1 G = ± 10 Settling Time (µs) 60 Overshoot (%) G = −1 10 SETTLING TIME vs CLOSED−LOOP GAIN 0.01% 1 0.1% − 10 Closed−Loop Gain (V/V) − 100 SMALL−SIGNAL STEP RESPONSE CL = 100pF LARGE−SIGNAL STEP RESPONSE CL = 100pF 50mV/div 100ns/div 1V/div 200ns/div 8 www.ti.com OPA350 OPA2350 OPA4350 SBOS099C − SEPTEMBER 2000 − REVISED JANUARY 2005 APPLICATIONS INFORMATION OPA350 series op amps are fabricated on a state-of-the-art 0.6 micron CMOS process. They are unity-gain stable and suitable for a wide range of general-purpose applications. Rail-to-rail input/output make them ideal for driving sampling A/D converters. They are also well-suited for controlling the output power in cell phones. These applications often require high speed and low noise. In addition, the OPA350 series offers a low-cost solution for general-purpose and consumer video applications (75Ω drive capability). Excellent ac performance makes the OPA350 series well-suited for audio applications. Their bandwidth, slew rate, low noise (5nV/√Hz), low THD (0.0006%), and small package options are ideal for these applications. The class AB output stage is capable of driving 600Ω loads connected to any point between V+ and ground. Rail-to-rail input and output swing significantly increases dynamic range, especially in low voltage supply applications. Figure 1 shows the input and output waveforms for the OPA350 in unity-gain configuration. Operation is from a single +5V supply with a 1kΩ load connected to VS/2. The input is a 5VPP sinusoid. Output voltage swing is approximately 4.95VPP. Power supply pins should be bypassed with 0.01µF ceramic capacitors. OPERATING VOLTAGE OPA350 series op amps are fully specified from +2.7V to +5.5V. However, supply voltage may range from +2.5V to +5.5V. Parameters are tested over the specified supply range—a unique feature of the OPA350 series. In addition, many specifications apply from −40°C to +85°C. Most behavior remains virtually unchanged throughout the full operating voltage range. Parameters that vary significantly with operating voltage or temperature are shown in the typical characteristics. RAIL-TO-RAIL INPUT The tested input common-mode voltage range of the OPA350 series extends 100mV beyond the supply rails. This is achieved with a complementary input stage—an N-channel input differential pair in parallel with a P-channel differential pair, as shown in Figure 2. The N-channel pair is active for input voltages close to the positive rail, typically (V+) – 1.8V to 100mV above the positive supply, while the P-channel pair is on for inputs from 100mV below the negative supply to approximately (V+) – 1.8V. There is a small transition region, typically (V+) – 2V to (V+) – 1.6V, in which both pairs are on. This 400mV transition region can vary ±400mV with process variation. Thus, the transition region (both input stages on) can range from (V+) – 2.4V to (V+) – 2.0V on the low end, up to (V+) – 1.6V to (V+) – 1.2V on the high end. OPA350 series op amps are laser-trimmed to reduce offset voltage difference between the N-channel and P-channel input stages, resulting in improved common-mode rejection and a smooth transition between the N-channel pair and the P-channel pair. However, within the 400mV transition region PSRR, CMRR, offset voltage, offset drift, and THD may be degraded compared to operation outside this region. A double-folded cascode adds the signal from the two input pairs and presents a differential signal to the class AB output stage. Normally, input bias current is approximately 500fA. However, large inputs (greater than 300mV beyond the supply rails) can turn on the OPA350’s input protection diodes, causing excessive current to flow in or out of the input pins. Momentary voltages greater than 300mV beyond the power supply can be tolerated if the current on the input pins is limited to 10mA. This is easily accomplished with an input resistor, as shown in Figure 3. Many input signals are inherently current-limited to less than 10mA; therefore, a limiting resistor is not required. VS = +5, G = +1, RL = 1kΩ 5V VIN 0 5V 1.25V/div VOUT 0 Figure 1. Rail-to-Rail Input and Output 9 OPA350 OPA2350 OPA4350 SBOS099C − SEPTEMBER 2000 − REVISED JANUARY 2005 V+ Reference Current www.ti.com VIN+ VIN− VBIAS1 Class AB Control Circuitry VO VBIAS2 V− (Ground) Figure 2. Simplified Schematic within a few tens of millivolts from the supply rails and maintain high open-loop gain. See the typical characteristics Output Voltage Swing vs Output Current and Open-Loop Gain vs Output Voltage. V+ IOVERLOAD 10mA max OPAx350 CAPACITIVE LOAD AND STABILITY VOUT VIN 5kΩ OPA350 series op amps can drive a wide range of capacitive loads. However, all op amps under certain conditions may become unstable. Op amp configuration, gain, and load value are just a few of the factors to consider when determining stability. An op amp in unity-gain configuration is the most susceptible to the effects of capacitive load. The capacitive load reacts with the op amp’s output impedance, along with any additional load resistance, to create a pole in the small-signal response that degrades the phase margin. In unity gain, OPA350 series op amps perform well with very large capacitive loads. Increasing gain enhances the amplifier’s ability to drive more capacitance. The typical characteristic Small-Signal Overshoot vs Capacitive Load shows performance with a 1kΩ resistive load. Increasing load resistance improves capacitive load drive capability. Figure 3. Input Current Protection for Voltages Exceeding the Supply Voltage RAIL-TO-RAIL OUTPUT A class AB output stage with common-source transistors is used to achieve rail-to-rail output. For light resistive loads (>10kΩ), the output voltage swing is typically ten millivolts from the supply rails. With heavier resistive loads (600Ω to 10kΩ), the output can swing to 10 www.ti.com OPA350 OPA2350 OPA4350 SBOS099C − SEPTEMBER 2000 − REVISED JANUARY 2005 FEEDBACK CAPACITOR IMPROVES RESPONSE For optimum settling time and stability with high-impedance feedback networks, it may be necessary to add a feedback capacitor across the feedback resistor, RF, as shown in Figure 4. This capacitor compensates for the zero created by the feedback network impedance and the OPA350’s input capacitance (and any parasitic layout capacitance). The effect becomes more significant with higher impedance networks. series provides an effective means of buffering the A/D’s input capacitance and resulting charge injection while providing signal gain. Figure 5 shows the OPA350 driving an ADS7861. The ADS7861 is a dual, 500kHz, 12-bit sampling converter in the tiny SSOP-24 package. When used with the miniature package options of the OPA350 series, the combination is ideal for space-limited applications. For further information, consult the ADS7861 data sheet (SBAS110A). OUTPUT IMPEDANCE CF R IN VIN RF V+ CIN RIN • CIN = RF • CF O PA350 CL CIN VOUT The low frequency open-loop output impedance of the OPA350’s common-source output stage is approximately 1kΩ. When the op amp is connected with feedback, this value is reduced significantly by the loop gain of the op amp. For example, with 122dB of open-loop gain, the output impedance is reduced in unity-gain to less than 0.001Ω. For each decade rise in the closed-loop gain, the loop gain is reduced by the same amount which results in a ten-fold increase in effective output impedance (see the typical characteristic, Output Impedance vs Frequency). At higher frequencies, the output impedance will rise as the open-loop gain of the op amp drops. However, at these frequencies the output also becomes capacitive due to parasitic capacitance. This prevents the output impedance from becoming too high, which can cause stability problems when driving capacitive loads. As mentioned previously, the OPA350 has excellent capacitive load drive capability for an op amp with its bandwidth. Where CIN is equal to the OPA350’s input capacitance (approximately 9pF) plus any parasitic layout capacitance. Figure 4. Feedback Capacitor Improves Dynamic Performance It is suggested that a variable capacitor be used for the feedback capacitor since input capacitance may vary between op amps and layout capacitance is difficult to determine. For the circuit shown in Figure 4, the value of the variable feedback capacitor should be chosen so that the input resistance times the input capacitance of the OPA350 (typically 9pF) plus the estimated parasitic layout capacitance equals the feedback capacitor times the feedback resistor: R IN @ C IN + RF @ CF where CIN is equal to the OPA350’s input capacitance (sum of differential and common-mode) plus the layout capacitance. The capacitor can be varied until optimum performance is obtained. VIDEO LINE DRIVER Figure 6 shows a circuit for a single supply, G = 2 composite video line driver. The synchronized outputs of a composite video line driver extend below ground. As shown, the input to the op amp should be ac-coupled and shifted positively to provide adequate signal swing to account for these negative signals in a single-supply configuration. The input is terminated with a 75Ω resistor and ac-coupled with a 47µF capacitor to a voltage divider that provides the dc bias point to the input. In Figure 6, this point is approximately (V−) + 1.7V. Setting the optimal bias point requires some understanding of the nature of composite video signals. For best performance, one should be careful to avoid the distortion caused by the transition region of the OPA350’s complementary input stage. Refer to the discussion of rail-to-rail input. 11 DRIVING A/D CONVERTERS OPA350 series op amps are optimized for driving medium speed (up to 500kHz) sampling A/D converters. However, they also offer excellent performance for higher speed converters. The OPA350 OPA350 OPA2350 OPA4350 SBOS099C − SEPTEMBER 2000 − REVISED JANUARY 2005 www.ti.com CB1 2kΩ 2kΩ +5V 2 1/ 4 4 1 0.1µ F CB0 24 13 +VA SERIAL DATA A SERIAL DATA B BUSY CLOCK CS ADS7861 RD CONVST A0 M0 M1 AGND 12 23 22 21 20 19 18 17 16 15 14 Serial Interface 0.1µ F O P A 43 5 0 VIN B1 3 2kΩ 2kΩ +VD 2 3 CH B1+ CH B1− CH B0+ CH B0− CH A1+ CH A1− CH A0+ CH A0− REFIN REFOUT DGND 1 6 1/ 4 7 4 5 VIN B0 5 O P A 43 5 0 CA1 2kΩ 2kΩ 6 7 8 9 9 1/ 4 8 10 11 VIN A1 10 O P A 43 5 0 CA0 2kΩ 2kΩ 12 1/ 4 14 11 VIN A0 13 O P A 43 5 0 VIN = 0V to 2.45V for 0V to 4.9V output. Choose CB1, CB0, CA1, CA0 to filter high frequency noise. Figure 5. OPA4350 Driving Sampling A/D Converter 12 www.ti.com OPA350 OPA2350 OPA4350 SBOS099C − SEPTEMBER 2000 − REVISED JANUARY 2005 RG 1kΩ RF 1kΩ C1 220µF +5V C4 0.1µF 0.1µF + 10µ F 2 7 6 C5 1000µ F ROUT Cable VOUT RL 4 C2 47µ F Video In R1 75Ω R2 5kΩ OPA350 3 R3 5kΩ R4 5kΩ +5V (pin 7) C3 10µ F Figure 6. Single-Supply Video Line Driver +5V 50kΩ (2.5V) 8 REF1004−2.5 4 +5V R1 100kΩ R2 25kΩ RG 1/ 2 O P A 2 35 0 R3 25kΩ R4 100kΩ 1/ 2 O P A 23 5 0 VO RL 10kΩ G=5+ 200kΩ RG Figure 7. Two Op-Amp Instrumentation Amplifier With Improved High Frequency Common-Mode Rejection 13 OPA350 OPA2350 OPA4350 SBOS099C − SEPTEMBER 2000 − REVISED JANUARY 2005 www.ti.com C1 4.7nF R1 10.5kΩ +2.5V +2.5V R1 2.74kΩ VIN R2 19.6kΩ C2 1nF OPA350 RL 20kΩ −2.5V VOUT VIN C1 1830pF C2 270pF OPA350 RL 20kΩ − 2.5V VOUT R2 49.9kΩ Figure 8. 10kHz Low-Pass Filter Figure 9. 10kHz High-Pass Filter 14 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2007 PACKAGING INFORMATION Orderable Device OPA2350EA/250 OPA2350EA/250G4 OPA2350EA/2K5 OPA2350EA/2K5G4 OPA2350PA OPA2350PAG4 OPA2350UA OPA2350UA/2K5 OPA2350UA/2K5G4 OPA2350UAG4 OPA350EA/250 OPA350EA/250G4 OPA350EA/2K5 OPA350EA/2K5G4 OPA350PA OPA350PAG4 OPA350UA OPA350UA/2K5 OPA350UA/2K5G4 OPA350UAG4 OPA4350EA/250 OPA4350EA/250G4 OPA4350EA/2K5 OPA4350EA/2K5G4 OPA4350UA Status (1) ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE Package Type MSOP MSOP MSOP MSOP PDIP PDIP SOIC SOIC SOIC SOIC MSOP MSOP MSOP MSOP PDIP PDIP SOIC SOIC SOIC SOIC SSOP/ QSOP SSOP/ QSOP SSOP/ QSOP SSOP/ QSOP SOIC Package Drawing DGK DGK DGK DGK P P D D D D DGK DGK DGK DGK P P D D D D DBQ DBQ DBQ DBQ D Pins Package Eco Plan (2) Qty 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 16 16 16 16 14 250 250 Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Lead/Ball Finish CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU MSL Peak Temp (3) Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR N / A for Pkg Type N / A for Pkg Type Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR N / A for Pkg Type N / A for Pkg Type Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR 2500 Green (RoHS & no Sb/Br) 2500 Green (RoHS & no Sb/Br) 50 50 100 Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) 2500 Green (RoHS & no Sb/Br) 2500 Green (RoHS & no Sb/Br) 100 250 250 Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) 2500 Green (RoHS & no Sb/Br) 2500 Green (RoHS & no Sb/Br) 50 50 100 Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) 2500 Green (RoHS & no Sb/Br) 2500 Green (RoHS & no Sb/Br) 100 250 250 Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) 2500 Green (RoHS & no Sb/Br) 2500 Green (RoHS & no Sb/Br) 58 Green (RoHS & no Sb/Br) Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2007 Orderable Device OPA4350UA/2K5 OPA4350UA/2K5G4 OPA4350UAG4 (1) Status (1) ACTIVE ACTIVE ACTIVE Package Type SOIC SOIC SOIC Package Drawing D D D Pins Package Eco Plan (2) Qty 14 14 14 2500 Green (RoHS & no Sb/Br) 2500 Green (RoHS & no Sb/Br) 58 Green (RoHS & no Sb/Br) Lead/Ball Finish CU NIPDAU CU NIPDAU CU NIPDAU MSL Peak Temp (3) Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing MSOP MSOP SOIC MSOP MSOP SOIC SSOP/ QSOP SSOP/ QSOP SOIC DGK DGK D DGK DGK D DBQ DBQ D 8 8 8 8 8 8 16 16 14 SPQ Reel Reel Diameter Width (mm) W1 (mm) 180.0 330.0 330.0 180.0 330.0 330.0 180.0 330.0 330.0 12.4 12.4 12.4 12.4 12.4 12.4 12.4 12.4 16.4 A0 (mm) B0 (mm) K0 (mm) P1 (mm) 8.0 8.0 8.0 8.0 8.0 8.0 8.0 8.0 8.0 W Pin1 (mm) Quadrant 12.0 12.0 12.0 12.0 12.0 12.0 12.0 12.0 16.0 Q1 Q1 Q1 Q1 Q1 Q1 Q1 Q1 Q1 OPA2350EA/250 OPA2350EA/2K5 OPA2350UA/2K5 OPA350EA/250 OPA350EA/2K5 OPA350UA/2K5 OPA4350EA/250 OPA4350EA/2K5 OPA4350UA/2K5 250 2500 2500 250 2500 2500 250 2500 2500 5.3 5.3 6.4 5.3 5.3 6.4 6.4 6.4 6.5 3.4 3.4 5.2 3.4 3.4 5.2 5.2 5.2 9.0 1.4 1.4 2.1 1.4 1.4 2.1 2.1 2.1 2.1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 *All dimensions are nominal Device OPA2350EA/250 OPA2350EA/2K5 OPA2350UA/2K5 OPA350EA/250 OPA350EA/2K5 OPA350UA/2K5 OPA4350EA/250 OPA4350EA/2K5 OPA4350UA/2K5 Package Type MSOP MSOP SOIC MSOP MSOP SOIC SSOP/QSOP SSOP/QSOP SOIC Package Drawing DGK DGK D DGK DGK D DBQ DBQ D Pins 8 8 8 8 8 8 16 16 14 SPQ 250 2500 2500 250 2500 2500 250 2500 2500 Length (mm) 184.0 346.0 346.0 184.0 346.0 346.0 190.5 346.0 346.0 Width (mm) 184.0 346.0 346.0 184.0 346.0 346.0 212.7 346.0 346.0 Height (mm) 50.0 29.0 29.0 50.0 29.0 29.0 31.8 29.0 33.0 Pack Materials-Page 2 MECHANICAL DATA MPDI001A – JANUARY 1995 – REVISED JUNE 1999 P (R-PDIP-T8) 0.400 (10,60) 0.355 (9,02) 8 5 PLASTIC DUAL-IN-LINE 0.260 (6,60) 0.240 (6,10) 1 4 0.070 (1,78) MAX 0.325 (8,26) 0.300 (7,62) 0.015 (0,38) 0.200 (5,08) MAX Seating Plane 0.125 (3,18) MIN 0.010 (0,25) NOM Gage Plane 0.020 (0,51) MIN 0.100 (2,54) 0.021 (0,53) 0.015 (0,38) 0.010 (0,25) M 0.430 (10,92) MAX 4040082/D 05/98 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001 For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. 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