OPA381AIDGKT

OPA381 OPA2381 SBOS313B − AUGUST 2004 − REVISED NOVEMBER 2004 Precision, Low Power, 18MHz Transimpedance Amplifier FEATURES DESCRIPTION D OVER 250kHz TRANSIMPEDANCE D D D D D D D D D D D D The OPA381 family of transimpedance amplifiers provides 18MHz of Gain Bandwidth (GBW), with extremely high precision, excellent long-term stability, and very low 1/f noise. The OPA381 features an offset voltage of 25µV (max), offset drift of 0.1µV/°C (max), and bias current of 3pA. The OPA381 far exceeds the offset, drift, and noise performance that conventional JFET op amps provide. BANDWIDTH DYNAMIC RANGE: 5 Decades EXCELLENT LONG-TERM STABILITY LOW VOLTAGE NOISE: 10nV/√Hz BIAS CURRENT: 3pA OFFSET VOLTAGE: 25µV (max) OFFSET DRIFT: 0.1µV/°C (max) GAIN BANDWIDTH: 18MHz QUIESCENT CURRENT: 800µA FAST OVERLOAD RECOVERY SUPPLY RANGE: 2.7V to 5.5V SINGLE AND DUAL VERSIONS MicroPACKAGE: DFN-8, MSOP-8 The signal bandwidth of a transimpedance amplifier depends largely on the GBW of the amplifier and the parasitic capacitance of the photodiode, as well as the feedback resistor. The 18MHz GBW of the OPA381 enables a transimpedance bandwidth of > 250kHz in most configurations. The OPA381 is ideally suited for fast control loops for power level measurement on an optical fiber. As a result of the high precision and low-noise characteristics of the OPA381, a dynamic range of 5 decades can be achieved. This capability allows the measurement of signal currents on the order of 10nA, and up to 1mA in a single I/V conversion stage. In contrast to logarithmic amplifiers, the OPA381 provides very wide bandwidth throughout the full dynamic range. By using an external pulldown resistor to –5V, the output voltage range can be extended to include 0V. APPLICATIONS D D D D D PRECISION I/V CONVERSION PHOTODIODE MONITORING OPTICAL AMPLIFIERS CAT-SCANNER FRONT-END PHOTO LAB EQUIPMENT The OPA381 and OPA2381 are both available in MSOP-8 and DFN-8 (3mm x 3mm) packages. They are specified from –40°C to +125°C. RF +5V OPA381 RELATED DEVICES 7 OPA381 2 6 VOUT (0V to 4.4V) C DIO DE RP (Optional Pulldown Resistor) Photodiode 1MΩ 65pF −5V 100kΩ 3 75pF PRODUCT FEATURES OPA380 90MHz GBW, 2.7V to 5.5V Supply Transimpedance Amplifier OPA132 16MHz GBW, Precision FET Op Amp ±15V OPA300 150MHz GBW, Low-Noise, 2.7V to 5.5V Supply OPA335 10µV VOS, Zero-Drift, 2.5V to 5V Supply OPA350 500µV VOS, 38MHz, 2.5V to 5V Supply OPA354 100MHz GBW CMOS, RRIO, 2.5V to 5V Supply OPA355 200MHz GBW CMOS, 2.5V to 5V Supply OPA656/7 230MHz, Precision FET, ±5V 4 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. Copyright  2004, Texas Instruments Incorporated
          
             
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%"#$ www.ti.com SBOS313B − AUGUST 2004 − REVISED NOVEMBER 2004 ABSOLUTE MAXIMUM RATINGS(1) ELECTROSTATIC DISCHARGE SENSITIVITY Voltage Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7V Signal Input Terminals(2), Voltage . . . . . (V−) −0.5V to (V+) + 0.5V Current . . . . . . . . . . . . . . . . . . . . . ±10mA Short-Circuit Current(3) . . . . . . . . . . . . . . . . . . . . . . . . Continuous Operating Temperature Range . . . . . . . . . . . . . . . −40°C to +125°C Storage Temperature Range . . . . . . . . . . . . . . . . . −65°C to +150°C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C Lead Temperature (soldering, 10s) . . . . . . . . . . . . . . . . . . . . . +300°C OPA381 ESD Rating (Human Body Model) . . . . . . . . . . . . . . . 2000V OPA2381 ESD Rating (Human Body Model) . . . . . . . . . . . . . . 1500V (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. (2) Input terminals are diode clamped to the power-supply rails. Input signals that can swing more than 0.5V beyond the supply rails should be current limited to 10mA or less. (3) Short-circuit to ground; one amplifier per package. This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGE/ORDERING INFORMATION(1) PRODUCT PACKAGE-LEAD PACKAGE DESIGNATOR SPECIFIED TEMPERATURE RANGE PACKAGE MARKING OPA381 MSOP-8 DGK −40°C to +125°C A64 OPA381 DFN-8 DRB −40°C to +125°C A65 OPA2381 MSOP-8 DGK −40°C to +125°C A62 OPA2381 DFN-8 DRB −40°C to +125°C A63 ORDERING NUMBER TRANSPORT MEDIA, QUANTITY OPA381AIDGKT OPA381AIDGKR OPA381AIDRBT OPA381AIDRBR OPA2381AIDGKT OPA2381AIDGKR OPA2381AIDRBT OPA2381AIDRBR Tape and Reel, 250 Tape and Reel, 2500 Tape and Reel, 250 Tape and Reel, 3000 Tape and Reel, 250 Tape and Reel, 2500 Tape and Reel, 250 Tape and Reel, 3000 (1) For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet. PIN ASSIGNMENTS Top View OPA381 OPA381 NC (1 ) 1 8 NC (1 ) −In 2 7 +In 3 V− 4 NC (1 ) 1 V+ −In 2 6 Out +In 3 5 NC (1 ) V− 4 Exposed Thermal Die Pad on Underside 8 NC (1 ) 7 V+ 6 Out 5 NC (1 ) DFN−8 MSOP−8 NOTE: (1) NC indicates no internal connection. OPA2381 Out A 1 8 V+ Out A 1 − In A 2 7 Out B −In A 2 +In A 3 6 − In B +In A 3 V− 4 5 +In B V− 4 MSOP−8 2 OPA2381 Exposed Thermal Die Pad on Underside DFN−8 8 V+ 7 Out B 6 −In B 5 +In B 
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%"#$ www.ti.com SBOS313B − AUGUST 2004 − REVISED NOVEMBER 2004 ELECTRICAL CHARACTERISTICS: VS = +2.7V to +5.5V Boldface limits apply over the temperature range, TA = −40°C to +125°C. All specifications at TA = +25°C, RL = 10kΩ connected to VS/2, and VOUT = VS/2, unless otherwise noted. OPA381 PARAMETER OFFSET VOLTAGE Input Offset Voltage Drift vs Power Supply Over Temperature Long-Term Stability(1) Channel Separation, dc INPUT BIAS CURRENT Input Bias Current Over Temperature Input Offset Current NOISE Input Voltage Noise, f = 0.1Hz to 10Hz Input Voltage Noise Density, f = 10kHz Input Voltage Noise Density, f > 1MHz Input Current Noise Density, f = 10kHz INPUT VOLTAGE RANGE Common-Mode Voltage Range Common-Mode Rejection Ratio CONDITION VOS dVOS/dT PSRR MIN VS = +5V, VCM = 0V VS = +2.7V to +5.5V, VCM = 0V VS = +2.7V to +5.5V, VCM = 0V IB VCM = VS/2 IOS VCM = VS/2 en en en in OUTPUT Voltage Output Swing from Positive Rail Voltage Output Swing from Negative Rail Voltage Output Swing from Positive Rail Voltage Output Swing from Negative Rail Output Current Short-Circuit Current Capacitive Load Drive Open-Loop Output Impedance POWER SUPPLY Specified Voltage Range Quiescent Current (per amplifier) Over Temperature TEMPERATURE RANGE Specified and Operating Range Storage Range Thermal Resistance MSOP-8 DFN-8 UNITS 7 0.03 3.5 25 0.1 20 20 µV µV/°C µV/V µV/V VCM CMRR VS = +5V, (V−) < VCM < (V+) − 1.8V AOL 0.05V < VO < (V+) − 0.6V, VCM = VS/2, VS = 5V GBW SR V− 95 IOUT ISC CLOAD RO VS IQ 110 106 F = 1MHz, IO = 0 pA 110 (V+) − 1.8V V dB 1 1013|| 2.5 pF Ω || pF 135 135 dB dB 18 12 7 7 200 MHz V/µs µs µs ns 400 600 30 50 400 600 −20 0 10 20 See Typical Characteristics 250 2.7 IO = 0A pA µVPP nV/√Hz nV/√Hz fA/√Hz 3 70 10 20 G = +1 VS = +5V, 4V Step, G = +1, OPA381 VS = +5V, 4V Step, G = +1, OPA2381 VIN • G = > VS RL = 10kΩ RL = 10kΩ RP = 10kΩ to −5V(2) RP = 10kΩ to −5V(2) µV/V 3 ±50 See Typical Characteristics 6 ±100 VS = +5V, VCM = 0V VS = +5V, VCM = 0V VS = +5V, VCM = 0V VS = +5V, VCM = 0V 0V < VO < (V+) − 0.6V, VCM = 0V, RP = 10kΩ to −5V(2), VS = 5V FREQUENCY RESPONSE Gain-Bandwidth Product Slew Rate Settling Time, 0.0015%(3) Settling Time, 0.003%(3) Overload Recovery Time(4), (5) MAX See Note (1) 1 INPUT IMPEDANCE Differential Capacitance Common-Mode Resistance and Capacitance OPEN-LOOP GAIN Open-Loop Voltage Gain TYP 0.8 −40 −65 mV mV mV mV mA mA Ω 5.5 1 1.1 V mA mA +125 +150 °C °C qJA 150 65 °C/W °C/W (1) High temperature operating life characterization of zero-drift op amps applying the techniques used in the OPA381 have repeatedly demonstrated randomly distributed variation approximately equal to measurement repeatability of 1µV. This consistency gives confidence in the stability and repeatability of these zerodrift techniques. (2) Tested with output connected only to R , a pulldown resistor connected between V P OUT and −5V, as shown in Figure 3. See also Applications section, Achieving Output Swing to Negative Rail. (3) Transimpedance frequency of 250kHz. (4) Time required to return to linear operation. (5) From positive rail. 3 
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%"#$ www.ti.com SBOS313B − AUGUST 2004 − REVISED NOVEMBER 2004 TYPICAL CHARACTERISTICS: VS = +2.7V to +5.5V All specifications at TA = +25°C, RL = 10kΩ connected to VS/2, and VOUT = VS/2, unless otherwise noted. POWER−SUPPLY REJECTION RATIO AND COMMON−MODE REJECTION vs FREQUENCY OPEN−LOOP GAIN AND PHASE vs FREQUENCY Open−Loop Gain (dB) 120 200 140 150 120 100 100 80 50 60 0 40 −50 Gain −100 20 0 −150 −20 −200 10 100 1k 10k 100k 1M 10M 100 PSRR, CMRR (dB) Phase Phase (_ ) 140 PSRR 80 60 40 20 0 CMRR −20 −40 −60 100M 10 100 1k Frequency (Hz) PHASE MARGIN vs LOAD CAPACITANCE 100k 1M 10M 100M QUIESCENT CURRENT vs TEMPERATURE 90 1.00 RS = 100Ω 70 0.90 Quiescent Current (mA) 80 Phase Margin (_) 10k Frequency (Hz) 100pF 60 50kΩ RS 50 CL RS = 50Ω 40 30 RS = 0Ω 20 0.85 0.80 0.75 5.5V 0.70 0.65 2.7V 0.60 0.55 10 0.50 0 100 200 300 400 500 600 700 800 900 1000 −40 −25 0 CL Load Capacitance (pF) 25 50 75 100 125 Temperature (_ C) QUIESCENT CURRENT vs SUPPLY VOLTAGE INPUT BIAS CURRENT vs TEMPERATURE 1.00 1000 0.85 Input Bias Current (pA) Quiescent Current (mA) 0.90 0.80 0.75 0.70 0.65 0.60 100 10 0.55 1 0.50 2.7 3.1 3.5 3.9 4.3 Supply Voltage (V) 4 4.7 5.1 5.5 −40 −25 0 25 50 Temperature (_ C) 75 100 125 
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%"#$ www.ti.com SBOS313B − AUGUST 2004 − REVISED NOVEMBER 2004 TYPICAL CHARACTERISTICS: VS = +2.7V to +5.5V (continued) All specifications at TA = +25°C, RL = 10kΩ connected to VS/2, and VOUT = VS/2, unless otherwise noted. OUTPUT VOLTAGE SWING vs OUTPUT CURRENT (VS = 5.5V) INPUT BIAS CURRENT vs COMMON−MODE VOLTAGE (V+) 50 (V+) − 1 30 20 Output Swing (V) Input Bias Current (pA) 40 −IB 10 0 −10 +IB −20 −30 (V+) − 2 +125_ C +25°C (V−) + 2 −40_ C (V−) + 1 −40 −50 (V−) 0 0.5 1.0 1.5 2.0 2.5 3.0 0 3.5 5 15 20 25 OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION OUTPUT VOLTAGE SWING vs OUTPUT CURRENT (VS = 2.7V) (V+) 10 Output Current (mA) Common−Mode Voltage (V) (V+) − 0.35 (V+) −1.05 Population (V+) −1.40 +125_ C +25_ C (V−) + 1.40 −40_C (V−) + 1.05 (V−) + 0.70 (V−) + 0.35 (V−) 5 10 15 20 25 −0.10 −0.09 −0.08 −0.07 −0.06 −0.05 −0.04 −0.03 −0.02 −0.01 0.00 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.10 0 Output Current (mA) Offset Voltage Drift (µV/_C) OFFSET VOLTAGE PRODUCTION DISTRIBUTION GAIN BANDWIDTH vs POWER SUPPLY VOLTAGE 20 Gain Bandwidth (MHz) 19 Population 18 17 16 15 14 13 25.00 20.00 15.00 10.00 5.00 0.00 −5.00 −10.00 −15.00 −20.00 12 −25.00 Output Swing (V) (V+) − 0.70 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Power Supply Voltage (V) Offset Voltage (µV) 5 
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%"#$ www.ti.com SBOS313B − AUGUST 2004 − REVISED NOVEMBER 2004 TYPICAL CHARACTERISTICS: VS = +2.7V to +5.5V (continued) All specifications at TA = +25°C, RL = 10kΩ connected to VS/2, and VOUT = VS/2, unless otherwise noted. CF RF CSTRAY OPA381 Transimpedance Gain (V/A in dB) Circuit for Transimpedance Amplifier Characteristic curves on this page. 6 TRANSIMPEDANCE AMP CHARACTERISTIC 150 CDIODE = 10pF 140 130 RF = 10MΩ 120 110 RF = 1MΩ CF = 0.5pF 100 90 RF = 100kΩ CF = 2pF 80 70 RF = 10kΩ 60 CF = 4pF 50 40 30 20 CSTRAY (parasitic) = 0.2pF 10 100 1k 10k 100k 1M 10M 100M Frequency (Hz) Transimpedance Gain (V/A in dB) TRANSIMPEDANCE AMP CHARACTERISTIC 150 CDIODE = 50pF 140 130 RF = 10MΩ 120 CF = 1pF 110 RF = 1MΩ 100 CF = 3pF 90 R = 100kΩ F 80 70 R = 10kΩ CF = 8pF F 60 50 40 30 20 CSTRAY (parasitic) = 0.2pF 10 100 1k 10k 100k 1M 10M 100M Frequency (Hz) Transimpedance Gain (V/A in dB) Transimpedance Gain (V/A in dB) Transimpedance Gain (V/A in dB) CDIODE TRANSIMPEDANCE AMP CHARACTERISTIC 150 CDIODE = 100pF 140 130 RF = 10MΩ C = 0.5pF F 120 CF = 1pF 110 RF = 1MΩ 100 CF = 4pF 90 R = 100kΩ F 80 70 R = 10kΩ CF = 12pF F 60 50 40 30 20 CSTRAY (parasitic) = 0.2pF 10 100 1k 10k 100k 1M 10M 100M Frequency (Hz) TRANSIMPEDANCE AMP CHARACTERISTIC 150 CDIODE = 20pF 140 130 RF = 10MΩ 120 110 RF = 1MΩ CF = 0.5pF 100 90 RF = 100kΩ CF = 2pF 80 70 RF = 10kΩ CF = 5pF 60 50 40 30 20 CSTRAY (parasitic) = 0.2pF 10 100 1k 10k 100k 1M 10M 100M Frequency (Hz) TRANSIMPEDANCE AMP CHARACTERISTIC 150 CDIODE = 1pF 140 130 RF = 10MΩ 120 110 RF = 1MΩ 100 CF = 0.5pF 90 RF = 100kΩ 80 70 RF = 10kΩ CF = 2pF 60 50 40 30 20 C STRAY (parasitic) = 0.2pF 10 100 1k 10k 100k 1M 10M 100M Frequency (Hz) 
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%"#$ www.ti.com SBOS313B − AUGUST 2004 − REVISED NOVEMBER 2004 TYPICAL CHARACTERISTICS: VS = +2.7V to +5.5V (continued) All specifications at TA = +25°C, and RL = 10kΩ connected to VS/2, unless otherwise noted. LARGE−SIGNAL STEP RESPONSE (with pull−down) SMALL−SIGNAL STEP RESPONSE (with or without pull−down) 200kHz (CF = 16pF) 1MHz (CF = 3pF) 1V/div 50mV/div CF 50kΩ 3pF 50kΩ OPA381 O PA3 81 10kΩ 10kΩ VP = 0V or −5V VP −5V Time (100ns/div) Time (100ns/div) OVERLOAD RECOVERY LARGE−SIGNAL STEP RESPONSE (without pull−down) 6 VOUT (V/div) 200kHz (CF = 16pF) 1MHz (CF = 3pF) 20kΩ 4 250µA 2 10kΩ Nonlinear Linear Operation Operation VP 0 50kΩ IIN (mA/div) OPA381 OPA381 10kΩ 0.8 VP = 0V or −5V OPA2381 I IN 0 0 100 200 300 400 500 600 700 800 900 1000 Time (100ns/div) Time (ns) CHANNEL SEPARATION vs INPUT FREQUENCY INPUT VOLTAGE NOISE SPECTRAL DENSITY 160 1000 Channel Separation (dB) 140 Input Voltage Noise (nV/√(Hz) OPA381 IIN CF 1V/div 40pF VOUT 100 10 OPA2381 120 100 80 60 40 20 0 −20 −40 1 10 100 1k 10k 100k Frequency (Hz) 1M 10M 10 100 1k 10k 100k 1M 10M 100M Input Frequency (Hz) 7 
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%"#$ www.ti.com SBOS313B − AUGUST 2004 − REVISED NOVEMBER 2004 APPLICATIONS INFORMATION BASIC OPERATION The OPA381 is a high-precision transimpedance amplifier with very low 1/f noise. Due to its unique architecture, the OPA381 has excellent long-term input voltage offset stability. The OPA381 performance results from an internal auto-zero amplifier combined with a high-speed amplifier. The OPA381 has been designed with circuitry to improve overload recovery and settling time over that achieved by a traditional composite approach. It has been specifically designed and characterized to accommodate circuit options to allow 0V output operation (see Figure 3). The OPA381 is used in inverting configurations, with the noninverting input used as a fixed biasing point. Figure 1 shows the OPA381 in a typical configuration. Power-supply pins should be bypassed with 1µF ceramic or tantalum capacitors. Electrolytic capacitors are not recommended. CF OPERATING VOLTAGE OPA381 series op amps are fully specified from 2.7V to 5.5V over a temperature range of −40°C to +125°C. Parameters that vary significantly with operating voltages or temperature are shown in the Typical Characteristics. INTERNAL OFFSET CORRECTION The OPA381 series op amps use an auto-zero topology with a time-continuous 18MHz op amp in the signal path. This amplifier is zero-corrected every 100µs using a proprietary technique. Upon power-up, the amplifier requires approximately 400µs to achieve specified VOS accuracy, which includes one full auto-zero cycle of approximately 100µs and the start-up time for the bias circuitry. Prior to this time, the amplifier will function properly but with unspecified offset voltage. This design has virtually no aliasing and low noise. Zero correction occurs at a 10kHz rate, but there is virtually no fundamental noise energy present at that frequency due to internal filtering. For all practical purposes, any glitches have energy at 20MHz or higher and are easily filtered, if necessary. Most applications are not sensitive to such high-frequency noise, and no filtering is required. RF INPUT VOLTAGE +5V 1µF λ OPA381 VOUT(1) (0.5V to 4.4V) The input common-mode voltage range of the OPA381 series extends from V− to (V+) –1.8V. With input signals above this common-mode range, the amplifier will no longer provide a valid output value, but it will not latch or invert. VBIAS = 0.5V INPUT OVERVOLTAGE PROTECTION NOTE: (1) VOUT = 0.5V in dark conditions. Figure 1. OPA381 Typical Configuration 8 Device inputs are protected by ESD diodes that will conduct if the input voltages exceed the power supplies by more than approximately 500mV. Momentary voltages greater than 500mV beyond the power supply can be tolerated if the current is limited to 10mA. The OPA381 family features no phase inversion when the inputs extend beyond supplies if the input is current limited. 
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%"#$ www.ti.com SBOS313B − AUGUST 2004 − REVISED NOVEMBER 2004 OUTPUT RANGE ACHIEVING OUTPUT SWING TO GROUND The OPA381 is specified to swing within at least 600mV of the positive rail and 50mV of the negative rail with a 10kΩ load while maintaining good linearity. Swing to the negative rail while maintaining linearity can be extended to 0V—see the section, Achieving Output Swing to Ground. See the Typical Characteristic curve, Output Voltage Swing vs Output Current. Some applications require output voltage swing from 0V to a positive full-scale voltage (such as +4.096V) with excellent accuracy. With most single-supply op amps, problems arise when the output signal approaches 0V, near the lower output swing limit of a single-supply op amp. A good single-supply op amp may swing close to single-supply ground, but will not reach 0V. The OPA381 can swing slightly closer than specified to the positive rail; however, linearity will decrease and a high-speed overload recovery clamp limits the amount of positive output voltage swing available—see Figure 2. The output of the OPA381 can be made to swing to 0V, or slightly below, on a single-supply power source. This extended output swing requires the use of another resistor and an additional negative power supply. A pulldown resistor may be connected between the output and the negative supply to pull the output down to 0V; see Figure 3. 25 20 VS = 5.5V 15 VOS (µV) 10 RF 5 λ 0 V+ = +5V −5 −10 −15 OPA381 R P = 10kΩ to −5V R L = 10kΩ to VS/2 −20 −25 −1 0 1 2 3 4 5 VOUT R P = 10kΩ V− = Gnd 6 VOUT (V) RP = −VS 500µA −VS = −5V Negative Supply Figure 2. Effect of High-Speed Overload Recovery Clamp on Output Voltage OVERLOAD RECOVERY The OPA381 has been designed to prevent output saturation. After being overdriven to the positive rail, it will typically require only 200ns to return to linear operation. The time required for negative overload recovery is greater, unless a pulldown resistor connected to a more negative supply is used to extend the output swing all the way to the negative rail—see the following section, Achieving Output Swing to Ground. Figure 3. Amplifier with Pull-Down Resistor to Achieve VOUT = 0V The OPA381 has an output stage that allows the output voltage to be pulled to its negative supply rail using this technique. However, this technique only works with some types of output stages. The OPA381 has been designed to perform well with this method. Accuracy is excellent down to 0V. Reliable operation is assured over the specified temperature range. 9 
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%"#$ www.ti.com SBOS313B − AUGUST 2004 − REVISED NOVEMBER 2004 BIASING PHOTODIODES IN SINGLE-SUPPLY CIRCUITS The +IN input can be biased with a positive DC voltage to offset the output voltage and allow the amplifier output to indicate a true zero photodiode measurement when the photodiode is not exposed to any light. It will also prevent the added delay that results from coming out of the negative rail. This bias voltage appears across the photodiode, providing a reverse bias for faster operation. An RC filter placed at this bias point will reduce noise. (Refer to Figure 4.) This bias voltage can also serve as an offset bias point for an ADC with range that does not include ground. D the desired transimpedance gain (RF); D the Gain Bandwidth Product (GBW) for the OPA381 (18MHz). With these three variables set, the feedback capacitor value (CF) can be set to control the frequency response. CSTRAY is the stray capacitance of RF, which is 0.2pF for a typical surface-mount resistor. To achieve a maximally flat 2nd-order Butterworth frequency response, the feedback pole should be set to: 1 + 2pR FǒCF ) CSTRAYǓ Ǹ4pRGBWC F (1) TOT Bandwidth is calculated by: CF(1) < 1pF f *3dB + Ǹ2pRGBWC F RF 10MΩ ID OPA381 VOUT = IDRF + VBIAS 0.1µF (2) These equations will result in maximum transimpedance bandwidth. For even higher transimpedance bandwidth, the high-speed CMOS OPA380 (90MHz GBW), the OPA300 (150MHz GBW), or the OPA656 (230MHz GBW) may be used. V+ λ Hz TOT 100kΩ For additional information, refer to Application Bulletin AB−050 (SBOA055), Compensate Transimpedance Amplifiers Intuitively, available for download at www.ti.com. +VBIAS [0V to (V+) − 1.8V] CF(1) NOTE: (1) CF is optional to prevent gain peaking. It includes the stray capacitance of RF. RF 10MΩ Figure 4. Photodiode with Filtered Reverse Bias Voltage CSTRAY(2) +5V TRANSIMPEDANCE AMPLIFIER Wide bandwidth, low input bias current and low input voltage and current noise make the OPA381 an ideal wideband photodiode transimpedance amplifier. Low voltage noise is important because photodiode capacitance causes the effective noise gain of the circuit to increase at high frequency. The key elements to a transimpedance design are shown in Figure 5: D the total input capacitance (CTOT), consisting of the photodiode capacitance (CDIODE) plus the parasitic common-mode and differential-mode input capacitance (2.5pF + 1pF for the OPA381); 10 λ CTOT(3) VOUT OPA381 RP (optional pulldown resistor) − 5V NOTE: (1) CF is optional to prevent gain peaking. (2) CSTRAY is the stray capacitance of RF (typically, 0.2pF for a surface−mount resistor). (3) CTOT is the photodiode capacitance plus OPA381 input capacitance. Figure 5. Transimpedance Amplifier 
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%"#$ www.ti.com SBOS313B − AUGUST 2004 − REVISED NOVEMBER 2004 TRANSIMPEDANCE BANDWIDTH AND NOISE RF = 50kΩ (a) Limiting the gain set by RF can decrease the noise occurring at the output of the transimpedance circuit. However, all required gain should occur in the transimpedance stage, since adding gain after the transimpedance amplifier generally produces poorer noise performance. The noise spectral density produced by RF increases with the square-root of RF, whereas the signal increases linearly. Therefore, signal-to-noise ratio is improved when all the required gain is placed in the transimpedance stage. C STRAY = 0.2pF λ RF = 50kΩ (b) CSTRAY = 0.2pF CF = 16pF λ OPA381 VOUT VBIAS RF = 50kΩ (c) CSTRAY = 0.2pF Using RDIODE to represent the equivalent diode resistance, and CTOT for equivalent diode capacitance plus OPA381 input capacitance, the noise zero, fZ, is calculated by: ǒRDIODE ) RFǓ fZ + 2pRDIODER FǒC TOT ) C FǓ VOUT VBIAS Total noise increases with increased bandwidth. Limit the circuit bandwidth to only that required. Use a capacitor, CF, across the feedback resistor, RF, to limit bandwidth (even if not required for stability), if total output noise is a concern. Figure 6a shows the transimpedance circuit without any feedback capacitor. The resulting transimpedance gain of this circuit is shown in Figure 7. The –3dB point is approximately 3MHz. Adding a 16pF feedback capacitor (Figure 6b) will limit the bandwidth and result in a –3dB point at approximately 200kHz (seen in Figure 7). Output noise will be further reduced by adding a filter (RFILTER and CFILTER) to create a second pole (Figure 6c). This second pole is placed within the feedback loop to maintain the amplifier’s low output impedance. (If the pole was placed outside the feedback loop, an additional buffer would be required and would inadvertently increase noise and dc error). OPA381 CF = 22pF RFILTER = 102kΩ λ OPA381 VOUT CFILTER = 3.9nF (3) VBIAS Figure 6. Transimpedance Circuit Configurations with Varying Total and Integrated Noise Gain 11 
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%"#$ www.ti.com SBOS313B − AUGUST 2004 − REVISED NOVEMBER 2004 120 500 Integrated Output Noise (µVrms) Transimpedance Gain (dB) 100 −3dB at 200kHz 80 See Figure 6c 60 40 20 0 −20 100 CDIODE = 10pF See Figure 6a CDIODE = 10pF 400 310µVrms 300 See Figure 6a 200 68µVrms 25µVrms See Figure 6b 100 See Figure 6c See Figure 6b 0 1k 10k 100k 1M 10M 100M 100 1k 10k Frequency (Hz) 100k 1M 10M 100M Frequency (Hz) Figure 7. Transimpedance Gains for Circuits in Figure 6 Figure 9. Integrated Output Noise for Circuits in Figure 6 The effects of these circuit configurations on output noise are shown in Figure 8 and on integrated output noise in Figure 9. A 2-pole Butterworth filter (maximally flat in passband) is created by selecting the filter values using the equation: Figure 10 shows the effects of diode capacitance on integrated output noise, using the circuit in Figure 6c. (4) The circuit in Figure 6b rolls off at 20dB/decade. The circuit with the additional filter shown in Figure 6c rolls off at 40dB/decade, resulting in improved noise performance. 400 Output Noise (µV/√Hz) CDIODE = 10pF 300 CDIODE = 100pF 50 56µVrms CDIODE = 50pF 37µVrms 40 CDIODE = 20pF 30 28µVrms 20 CDIODE = 1pF See Figure 6c 10 CDIODE = 10pF See Figure 6a 25µVrms 23µVrms 0 200 1 10 100 1k 10k 100k 1M 10M 100M Frequency (Hz) 100 0 100 See Figure 6b Figure 10. Integrated Output Noise for Various Values of CDIODE for Circuit in Figure 6c See Figure 6c 1k 10k 100k 1M 10M 100M Frequency (Hz) Figure 8. Output Noise for Circuits in Figure 6 12 60 Integrated Output Noise (µVrms) C FRF + 2C FILTERR FILTER For additional information, refer to Noise Analysis of FET Transimpedance Amplifiers (SBOA060), and Noise Analysis for High Speed Op Amps (SBOA066), available for download from the TI web site. 
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%"#$ www.ti.com SBOS313B − AUGUST 2004 − REVISED NOVEMBER 2004 BOARD LAYOUT CAPACITIVE LOAD AND STABILITY Minimize photodiode capacitance and stray capacitance at the summing junction (inverting input). This capacitance causes the voltage noise of the op amp to be amplified (increasing amplification at high frequency). Using a low-noise voltage source to reverse-bias a photodiode can significantly reduce its capacitance. Smaller photodiodes have lower capacitance. Use optics to concentrate light on a small photodiode. The OPA381 series op amps can drive greater than 100pF pure capacitive load. Increasing the gain enhances the amplifier’s ability to drive greater capacitive loads. See the Phase Margin vs Load Capacitance typical characteristic curve. Circuit board leakage can degrade the performance of an otherwise well-designed amplifier. Clean the circuit board carefully. A circuit board guard trace that encircles the summing junction and is driven at the same voltage can help control leakage. See Figure 11. One method of improving capacitive load drive in the unity-gain configuration is to insert a 10Ω to 20Ω resistor inside the feedback loop, as shown in Figure 12. This reduces ringing with large capacitive loads while maintaining DC accuracy. RF CF(3) RF V+ λ OPA381 VOUT RS 20Ω λ VOUT OPA381 VB(1) CL V− Guard ring Figure 11. Connection of Input Guard RL VPD(2) NOTES: (1) VB = GND or pedestal voltage to reverse bias the photodiode. (2) VPD = GND or −5V. (3) CF x RF ≥ 2CL x RS. OTHER WAYS TO MEASURE SMALL CURRENTS Logarithmic amplifiers are used to compress extremely wide dynamic range input currents to a much narrower range. Wide input dynamic ranges of 8 decades, or 100pA to 10mA, can be accommodated for input to a 12-bit ADC. (Suggested products: LOG101, LOG102, LOG104, LOG112.) Extremely small currents can be accurately measured by integrating currents on a capacitor. (Suggested product: IVC102.) Low-level currents can be converted to high-resolution data words. (Suggested product: DDC112.) For further information on the range of products available, search www.ti.com using the above specific model names or by using keywords transimpedance and logarithmic. Figure 12. Series Resistor in Unity-Gain Buffer Configuration Improves Capacitive Load Drive DRIVING 16-BIT ANALOG-TO-DIGITAL CONVERTERS (ADC) The OPA381 series is optimized for driving a 16-bit ADC such as the ADS8325. The OPA381 op amp buffers the converter input capacitance and resulting charge injection while providing signal gain. Figure 13 shows the OPA381 in a single-ended method of interfacing the ADS8325 16-bit, 100kSPS ADC. For additional information, refer to the ADS8325 data sheet. 13 
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%"#$ www.ti.com SBOS313B − AUGUST 2004 − REVISED NOVEMBER 2004 CF RF SW1 100Ω ADS8325 OPA381 C1 1µF R1 1MΩ 1nF VIN V+ 1µF RC values shown are optimized for the ADS8325  values may vary for other ADCs. OPA381 Figure 13. Driving 16-Bit ADCs VOUT VBIAS INVERTING AMPLIFIER Its excellent dc precision characteristics make the OPA381 also useful as an inverting amplifier. Figure 14 shows it configured for use on a single-supply set to a gain of 10. Figure 15. Precision Integrator CF DFN (DRB) THERMALLYENHANCED PACKAGE R1 100kΩ R2 10kΩ V+ VIN OPA381 VBIAS VOUT = VBIAS − R2 R1 x VIN Figure 14. Inverting Gain PRECISION INTEGRATOR With its low offset voltage, the OPA381 is well-suited for use as an integrator. Some applications require a means to reset the integration. The circuit shown in Figure 15 uses a mechanical switch as the reset mechanism. The switch is opened at the beginning of the integration period. It is shown in the open position, which is the integration mode. With the values of R1 and C1 shown, the output changes −1V/s per volt of input. 14 One of the package options for the OPA381 and OPA2381 is the DFN-8 package, a thermally-enhanced package designed to eliminate the use of bulky heat sinks and slugs traditionally used in thermal packages. The absence of external leads eliminates bent-lead concerns and issues. Although the power dissipation requirements of a given application might not require a heat sink, for mechanical reliability, the exposed power pad must be soldered to the board and connected to V− (pin 4). This package can be easily mounted using standard PCB assembly techniques. See Application Note SLUA271, QFN/SON PCB Attachment, located at www.ti.com. These DFN packages have reliable solderability with either SnPb or Pb-free solder paste. PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) OPA2381AIDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) NIPDAUAG Level-2-260C-1 YEAR -40 to 125 A62 OPA2381AIDGKT ACTIVE VSSOP DGK 8 250 Green (RoHS & no Sb/Br) NIPDAUAG Level-2-260C-1 YEAR -40 to 125 A62 OPA2381AIDRBT ACTIVE SON DRB 8 250 Green (RoHS & no Sb/Br) NIPDAU Level-2-260C-1 YEAR -40 to 125 A63 OPA381AIDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) NIPDAUAG Level-2-260C-1 YEAR -40 to 125 A64 OPA381AIDGKT ACTIVE VSSOP DGK 8 250 Green (RoHS & no Sb/Br) NIPDAUAG Level-2-260C-1 YEAR -40 to 125 A64 OPA381AIDRBT ACTIVE SON DRB 8 250 Green (RoHS & no Sb/Br) NIPDAU Level-2-260C-1 YEAR -40 to 125 A65 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of