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OPA 445
OPA445
OPA
445
For most current data sheet and other product information, visit www.burr-brown.com
High Voltage FET-Input OPERATIONAL AMPLIFIER
FEATURES
q WIDE-POWER SUPPLY RANGE: ±10V to ±45V q HIGH SLEW RATE: 15V/µs q LOW INPUT BIAS CURRENT: 10pA q STANDARD-PINOUT TO-99, DIP, AND SURFACE-MOUNT PACKAGES
APPLICATIONS
q TEST EQUIPMENT q HIGH-VOLTAGE REGULATORS q POWER AMPLIFIERS q DATA ACQUISITION q SIGNAL CONDITIONING q AUDIO q PIEZO DRIVERS
DESCRIPTION
The OPA445 is a monolithic operational amplifier capable of operation from power supplies up to ±45V and output currents of 15mA. It is useful in a wide variety of applications requiring high output voltage or large common-mode voltage swings. The OPA445’s high slew rate provides wide powerbandwidth response, which is often required for highvoltage applications. FET input circuitry allows the use of high-impedance feedback networks, thus minimizing their output loading effects. Laser trimming of the input circuitry yields low input offset voltage and drift. The OPA445 is available in standard pin-out TO-99, DIP-8, and SO-8 surface-mount packages. It is fully specified from –25°C to +85°C and operates from –55°C to +125°C. A SPICE macromodel is available for design analysis.
NC Offset Trim –In 2 8 1 7 V+
Offset Trim
6 Output
1 2 3 4 8-Pin DIP, SO-8
8 7 6 5
NC V+ Output Offset Trim
–In +In
+In
3 4 V–
5 Offset Trim
V–
Case is connected to V– TO-99
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
©
1987 Burr-Brown Corporation
PDS-754H
Printed in U.S.A. March, 2000
SPECIFICATIONS
At TA = +25°C, VS = ±40V, and RL = 5kΩ, unless otherwise specified. Boldface limits apply over the specified temperature range, TA = –25°C to +85°C. VS = ±40V. OPA445BM PARAMETER OFFSET VOLTAGE Input Offset Voltage vs Temperature vs Power Supply CONDITIONS MIN TYP ±1 4 ± 10 ±4 MAX ±3 100 ± 50 ± 20 ±5 MIN OPA445AP, AU TYP ± 1.5 T T T T MAX ±5 T ±100 ±20 ± 40 ±10 UNITS
VOS VOS /dT PSRR
VCM = 0, IO = 0 TA = –25°C to +85°C VS = ±10V to ±45V VCM = 0V VCM = 0V
±10
mV µV/°C µV/V pA nA pA nA nV/√Hz fA/√Hz
INPUT BIAS CURRENT(1) Input Bias Current IB Over Specified Temperature Range Input Offset Current IOS Over Specified Temperature Range NOISE Input Voltage Noise Density, f = 1kHz Current Noise Density, f = 1kHz en in
±10
15 6 VS = ±40V VCM = –35V to +35V (V–)+5 80 80 (V+)–5 95 T T T
T T T T
INPUT VOLTAGE RANGE Common-Mode Voltage Range VCM Common-Mode Rejection CMRR Over Specified Temperature Range INPUT IMPEDANCE Differential Common-Mode OPEN-LOOP GAIN, DC Open-Loop Voltage Gain AOL Over Specified Temperature Range FREQUENCY RESPONSE Gain Bandwidth Product Slew Rate Full Power Bandwidth Rise Time Overshoot Total Harmonic Distortion + Noise GBW SR
V dB dB Ω || pF Ω || pF dB dB MHz V/µs kHz ns % % %
1013 || 1 1014 || 3 VO = –35V to +35V 100 97 110 T T
T T T
THD+N
VO = 70Vp-p VO = 70Vp-p VO = ±200mV G = +1, ZL = 5kΩ || 50pF f = 1kHz, VO = 3.5Vr ms, G = 1 f = 1kHz, VO = 10Vr ms, G = 1
5 23
2 15 70 100 35 0.0002 0.00008 (V+)–5 (V+)–5
T T
T T T T T T T T T T T T T
OUTPUT Voltage Output VO Over Specified Temperature Range Current Output IO Output Resistance, Open Loop RO Short Circuit Current ISC Capacitive Load Drive CLOAD POWER SUPPLY Specified Operating Range Operating Voltage Range Quiescent Current TEMPERATURE RANGE Specification Range Operating Range Storage Range Thermal Resistance TO-99 8-Pin DIP SO-8 Surface-Mount T Specifications same as OPA445BM. VS IQ
VO = ±28V dc
(V–)+5 (V–)+5 ± 15
T T T
220 ± 26 See Typical Curve(2) ± 40 ± 4.2
V V mA Ω mA
± 10 IO = 0 –25 –55 –65
± 45 ± 4.7 +85 +125 +125
T T T T –55
T T T T +125
V V mA °C °C °C °C/W °C/W °C/W
θJA
200 100 150
NOTE: (1) High-speed test at TJ = +25°C. (2) See “Small-Signal Overshoot vs Load Capacitance” in the Typical Performance Curves section.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.
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OPA445
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ABSOLUTE MAXIMUM RATINGS(1)
Power Supply ..................................................................................... ±50V Differential Input Voltage ................................................................... ±80V Input Voltage Range ................................................................... |±VS| –3V Storage Temperature Range: M ..................................... –65°C to +150°C P, U ................................. –55°C to +125°C Operating Temperature Range ....................................... –55°C to +125°C Lead Temperature (soldering, 10s) ............................................... +300°C Output Short-Circuit to Ground (TJ < +125°C) ......................... Continuous Junction Temperature: M ................................................................. 175°C P,U .............................................................. 150°C NOTE: (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability.
ELECTROSTATIC DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PACKAGE /ORDERING INFORMATION
PRODUCT OPA445AP OPA445AU OPA445AU OPA445BM PACKAGE 8-Pin DIP SO-8 Surface-Mount " 8-Pin TO-99 PACKAGE DRAWING NUMBER 006 182 " 001 SPECIFIED TEMPERATURE RANGE –25°C to +85°C –25°C to +85°C " –25°C to +85°C PACKAGE MARKING OPA445AP OPA445AU " OPA445BM ORDERING NUMBER(1) OPA445AP OPA445AU OPA445AU/2K5 OPA445BM TRANSPORT MEDIA Rails Rails Tape and Reel Rails
NOTE: (1) Products followed by a slash (/) are only available in Tape and Reel in the quantities indicated (e.g., /2K5 indicates 2500 devices per reel). Ordering 2500 pieces of “OPA445AU/2K5” will get a single 2500 piece Tape and Reel.
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OPA445
TYPICAL PERFORMANCE CURVES
At TA = +25°C, VS = ±40V, unless otherwise noted.
OPEN-LOOP GAIN AND PHASE vs FREQUENCY 140 120 Voltage Gain (dB) 100 80 60 40 20 0 10 100 1k 10k 100k 1M Frequency (Hz) Gain –185 10M –135 θ –90 –45
125 120 115
OPEN-LOOP GAIN AND SUPPLY CURRENT vs SUPPLY VOLTAGE 4.5
AVOL 110 105 100 95 10 20 30
IQ
4.0
3.5
3.0 40 50 Supply Voltage (±VS)
GAIN BANDWIDTH AND SLEW RATE vs TEMPERATURE 2.6 2.4
Gain Bandwidth (MHz)
GAIN BANDWIDTH AND SLEW RATE vs SUPPLY VOLTAGE
16 15
Gain Bandwidth (MHz)
2.2
19
SR
Slew Rate (V/µs)
GBW 2.0 17
Slew Rate (V/µs)
2.2 2.0 GBW 1.8 1.6 1.4 –75 –50 –25 0 25 50 75 100 Ambient Temperature (°C)
14 13 12 11 10 125
1.8 SR
15
1.6 10 20 30 Supply Voltage (±VS) 40 50
13
INPUT BIAS CURRENT vs TEMPERATURE 100nA 10nA
INPUT BIAS CURRENT vs COMMON-MODE VOLTAGE 40 35 30
Bias Current (pA)
Input Bias Current
1nA 100pA 10pA 1pA 0.1pA 0.01pA –75 –50 –25 0 25 50 75 100 125 Temperature (°C)
25 20 15 10 5 0 –50 –40 –30 –20 –10 0 10 20 30 40 50 Common-Mode Voltage (V) –IB +IB
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OPA445
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Supply Current (mA)
Voltage Gain (dB)
Phase (Degrees)
TYPICAL PERFORMANCE CURVES (Cont.)
At TA = +25°C, VS = ±40V, unless otherwise noted.
POWER SUPPLY REJECTION vs FREQUENCY 120
Common-Mode Rejection (dB)
COMMON-MODE REJECTION vs FREQUENCY 100 90 80 70 60 50 40
Power Supply Rejection (dB)
100 80 60 40 20 0 10 100 1k 10k 100k 1M 10M 100M Frequency (Hz) –PSRR +PSRR
10
100
1k
10k
100k
1M
10M
Frequency (Hz)
OPEN-LOOP GAIN vs TEMPERATURE 120
130 120
POWER SUPPLY REJECTION AND COMMON-MODE REJECTION vs TEMPERATURE
PSRR, CMRR (dB)
Voltage Gain (dB)
110
110 100 90 80
PSRR
CMRR
100
90 –75 –50 –25 0 25 50 75 100 125 Ambient Temperature (°C)
70 –75
–50
–25
0
25
50
75
100
125
Ambient Temperature (°C)
INPUT VOLTAGE NOISE SPECTRAL DENSITY 100
TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 0.1
Voltage Noise (nV/ Hz)
0.01 THD+Noise (%) VO = 3.5Vrms 0.001 G = 10 VO = 3.5Vrms 0.0001 G=1 VO = 10Vrms
1 10 100 1k Frequency (Hz) 10k 100k
10
VO = 10Vrms
0.00001 20 100 1k Frequency (Hz) 10k 20k
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OPA445
TYPICAL PERFORMANCE CURVES (Cont.)
At TA = +25°C, VS = ±40V, unless otherwise noted.
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT (V+) (V+) –2
Output Voltage Swing (V)
Output Voltage Swing (V)
OUTPUT VOLTAGE SWING vs TEMPERATURE (V+) (V+) –1 Positive Swing (V+) –2 (V+) –3 (V+) –4 (V–) +4 (V–) +3 (V–) +2 (V–) +1 (V–) Negative Swing
(V+) –4 (V+) –6 (V+) –8 (V+) –10 (V–) +10 (V–) +8 (V–) +6 (V–) +4 (V–) +2 (V–) 0 ±5 ±10 ±15 ±20 ±25 ±30 Output Current (mA) Sinking Current Sourcing Current
–75
–50
–25
0
25
50
75
100
125
Temperature (°C)
SUPPLY CURRENT vs TEMPERATURE 5 35 30
OUTPUT CURRENT vs TEMPERATURE
Short-Circuit Current
Supply Current (mA)
Output Current (mA)
4
25 20 15 10 5
3
Output Current VO = ±35V
2 –75 –50 –25 0 25 50 75 100 125 Ambient Temperature (°C)
0 –50 –25 0 25 50 75 100 125 Temperature (°C)
MAXIMUM OUTPUT VOLTAGE SWING vs FREQUENCY 90 80
MAXIMUM POWER DISSIPATION vs TEMPERATURE 0.8 No Heat Sink 0.7 0.6
Dissipation (W)
Output Voltage (Vp-p)
70 60 50 40 30 20 10 0 1k 10k
Maximum output without slew-rate induced distortion.
Plastic DIP TO-99
0.5 0.4 0.3 0.2 0.1 0 TJ (max) TO-99: 150°C DIP, SO: 125°C –25 0 25
SO-8
100k Frequency (Hz)
1M
–50
50
75
100
125
Temperature (°C)
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OPA445
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TYPICAL PERFORMANCE CURVES (Cont.)
At TA = +25°C, VS = ±40V, unless otherwise noted.
OFFSET VOLTAGE PRODUCTION DISTRIBUTION 20 18
OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION 25 Typical production distribution of packaged units.
Percent of Amplifiers (%)
14 12 10 8 6 4 2 0
Percent of Amplifiers (%)
16
Typical production distribution of packaged units.
20
15
10
5
0
–5 –4.5 –4 –3.5 –3 –2.5 –2 –1.5 –1 –0.5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
Offset Voltage (mV)
SMALL-SIGNAL STEP RESPONSE G = 1, CL = 100pF
50mV/div
10V/div
500ns/div
SMALL-SIGNAL OVERSHOOT vs LOAD CAPACITANCE 60 50
Overshoot (%)
40 30 20 10 0 10pF
G = –1
G = +1 G = –2
G = 10
100pF
1nF
Load Capacitance
0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
Offset Voltage Drift (µV/°C)
LARGE-SIGNAL STEP RESPONSE G = 1, CL = 100pF
2.5µs/div
10nF
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OPA445
APPLICATION INFORMATION
Figure 1 shows the OPA445 connected as a basic noninverting amplifier. The OPA445 can be used in virtually any op amp configuration. Power supply terminals should be bypassed with 0.1µF capacitors, or greater, near the power supply pins. Be sure that the capacitors are appropriately rated for the power supply voltage used.
V+ 0.1µF G = 1+ R1 R2 R2 R1
V+ 7 OPA445 3 5 4
(1)
Use offset adjust pins only to null offset voltage of op amp—see text.
2
6 1 10mV Typical Trim Range NOTE: (1) 10kΩ to 1MΩ Trim Potentiometer (100kΩ recommended).
V–
FIGURE 2. Offset Voltage Trim.
OPA445 VIN 0.1µF ZL VO
V–
FIGURE 1. Offset Voltage Trim. POWER SUPPLIES The OPA445 may be operated from power supplies up to ±45V or a total of 90V with excellent performance. Most behavior remains unchanged throughout the full operating voltage range. Parameters which vary significantly with operating voltage are shown in the typical performance curves. Some applications do not require equal positive and negative output voltage swing. Power supply voltages do not need to be equal. The OPA445 can operate with as little as 20V between the supplies and with up to 90V between the supplies. For example, the positive supply could be set to 80V with the negative supply at –10V, or vice-versa. OFFSET VOLTAGE TRIM The OPA445 provides offset voltage trim connections on pins 1 and 5. Offset voltage can be adjusted by connecting a potentiometer as shown in Figure 2. This adjustment should be used only to null the offset of the op amp, not to adjust system offset or offset produced by the signal source. Nulling system offset could degrade the offset voltage drift behavior of the op amp. While it is not possible to predict the exact change in drift, the effect is usually small. SAFE OPERATING AREA Stress on the output transistors is determined both by the output current and by the output voltage across the conducting output transistors, VS – VO. The power dissipated by the
output transistor is equal to the product of the output current and the voltage across the conducting transistor, VS – VO. The Safe Operating Area (SOA curve, Figures 3, 4, and 5) shows the permissible range of voltage and current. The curves shown represent devices soldered to a circuit board with no heat sink. Increasing printed circuit trace area or the use of a heat sink (TO-99 package) can significantly reduce thermal resistance (θ), resulting in increased output current for a given output voltage (see “Heat Sink” text). The safe output current decreases as VS – VO increases. Output short-circuits are a very demanding case for SOA. A short-circuit to ground forces the full power supply voltage (V+ or V–) across the conducting transistor and produces a typical output current of 25mA. With ±40V power supplies, this creates an internal dissipation of 1W. This exceeds the maximum rating and is not recommended. If operation in this region is unavoidable, a heat sink is required. For further insight on SOA, consult Application Bulletin AB-039.
SAFE OPERATING AREA 100 TA = 25°C
Output Current (mA)
10 TA = 85°C TA = 120°C 1 TA + (|VS| – |VO|) IO θJA ≤ TJ (max) θJA = 100°C/W TJ (max) = 125°C 0.1 1 2 5 10 |VS| – |VO| (V) 20 50 100
FIGURE 3. 8-Pin DIP Safe Operating Area.
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OPA445
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HEAT SINKING
SAFE OPERATING AREA 100
Output Current (mA)
TA = 25°C 10 TA = 120°C TA = 85°C
1 TA + (|VS| – |VO|) IO θJA ≤ TJ (max) θJA = 150°C/W TJ (max) = 125°C 0.1 1 2 5 10 |VS| – |VO| (V) 20 50 100
Power dissipated in the OPA445 will cause the junction temperature to rise. For reliable operation junction temperature should be limited to 125°C, maximum (150°C for TO-99 package). Some applications will require a heat sink to assure that the maximum operating junction temperature is not exceeded. In addition, the junction temperature should be kept as low as possible for increased reliability. Junction temperature can be determined according to the following equation: TJ = TA + PD θJA Package thermal resistance, θJA, is affected by mounting techniques and environments. Poor air circulation and use of sockets can significantly increase thermal resistance. Best thermal performance is achieved by soldering the op amp into a circuit board with wide printed circuit traces to allow greater conduction through the op amp leads. Simple clip-on heat sinks (such as Thermalloy 2257) can reduce the thermal resistance of the TO-99 metal package by as much as 50°C/W. For additional information on determining heat sink requirements, consult Applications Bulletin AB-038. CAPACITIVE LOADS The dynamic characteristics of the OPA445 have been optimized for commonly encountered gains, loads, and operating conditions. The combination of low closed-loop gain and capacitive load will decrease the phase margin and may lead to gain peaking or oscillations. Figure 6 shows a circuit which preserves phase margin with capacitive load. The circuit does not suffer a voltage drop due to load current, however, input impedance is reduced at high frequencies. Consult Application Bulletin AB-028 for details of analysis techniques and application circuits.
FIGURE 4. SO-8 Safe Operating Area.
SAFE OPERATING AREA 100
Output Current (mA)
TA = 25°C 10 TA = 125°C TA = 85°C 1 TA + (|VS| – |VO|) IO θJA ≤ TJ (max) θJA = 200°C/W (No Heat Sink*) TJ (max) = 150°C *Simple clip-on heatsinks can reduce θ by as much as 50°C/W. 1 2 5 10 |VS| – |VO| (V) 20 50 100
0.1
FIGURE 5. TO-99 Safe Operating Area. POWER DISSIPATION Power dissipation depends on power supply, signal, and load conditions. For dc signals, power dissipation is equal to the product of the output current times the voltage across the conducting output transistor, PD = IL (VS – VO). Power dissipation can be minimized by using the lowest possible power supply voltage necessary to assure the required output voltage swing. For resistive loads, the maximum power dissipation occurs at a dc output voltage of one-half the power supply voltage. Dissipation with ac signals is lower. Application Bulletin AB-039 explains how to calculate or measure dissipation with unusual loads or signals. The OPA445 can supply output currents of 15mA and larger. This would present no problem for a standard op amp operating from ±15V supplies. With high supply voltages, however, internal power dissipation of the op amp can be quite large. Operation from a single power supply (or unbalanced power supplies) can produce even larger power dissipation since a large voltage is impressed across the conducting output transistor. Applications with large power dissipation may require a heat sink.
R1 2kΩ RC 20Ω CC 0.22µF
R2 2kΩ G=1+ R2 R1
OPA445 VIN RC = R2 2CL X 1010 – (1 + R2 /R1) CL X 103 RC
VO CL 5000pF
CC =
NOTE: Design equations and component values are approximate. User adjustment is required for optimum performance.
FIGURE 6. Driving Large Capacitive Loads.
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OPA445
INCREASING OUTPUT CURRENT In those applications where the 15mA of output current is not sufficient to drive the required load, output current can be increased by connecting two or more OPA445s in parallel as shown in Figure 7. Amplifier A1 is the “master” amplifier and may be configured in virtually an op amp circuit. Amplifier A2, the “slave”, is configured as a unity gain buffer. Alternatively, external output transistors can be used to boost output current. The circuit in Figure 8 is capable of supplying output currents up to 1A. INPUT PROTECTION The inputs of conventional FET-input op amps should be protected against destructive currents that can flow when input FET gate-to-substrate isolation diodes are forwardbiased. This can occur if the input voltage exceeds the power supplies or there is an input voltage with VS = 0V. Protection is easily accomplished with a resistor in series with the input. Care should be taken because the resistance in series with the input capacitance may affect stability. Many input signals are inherently current-limited, therefore, a limiting resistor may not be required.
R1 R2 RS(1) 10Ω
“MASTER” OPA445 VIN
RS(1) 10Ω OPA445 “SLAVE” RL
NOTE: (1) RS resistors minimize the circulating current that will always flow between the two devices due to VOS errors.
FIGURE 7. Parallel Amplifiers Increase Output Current Capability.
R1
R2 +45V
TIP29C CF R3(1) 100Ω OPA445 VIN R4 0.2Ω TIP30C R4 0.2Ω VO LOAD
–45V NOTE: (1) Provides current limit for OPA445 and allows the amplifier to drive the load when the output is between 0.7V and –0.7V.
FIGURE 8. External Output Transistors Boost Output Current up to 1 Amp.
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OPA445
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TYPICAL APPLICATIONS
R1 100kΩ V1 +40V
25kΩ +60V 0.1µF
R2 10kΩ
OPA445 –40V V2 R3 100kΩ IL = [(V2 – V1)/R5] (R2 /R1) = (V2 – V1)/1k Ω Compliance Voltage Range = ±35V NOTE: R1 = R3 and R2 = R4 + R5 R4 9.9kΩ IL Load R5 100Ω
0-2mA DAC80-CBI-I
OPA445 Protects DAC During Slewing 0.1µF VO = 0 to +50V at 10mA
–12V
FIGURE 9. Voltage-to-Current Converter.
FIGURE 10. Programmable Voltage Source.
R1 1kΩ
R2 9kΩ R4 10kΩ +45V 160V OPA445
R3 10kΩ
+45V
OPA445 Piezo(1) Crystal
“SLAVE”
VIN ±4V
“MASTER” –45V
–45V
NOTE: (1) For transducers with large capacitance the stabilization technique described in Figure 6 may be necessary. Be certain that the “Master” amplifier is stable before stabilizing the “Slave” amplifier.
FIGURE 11. Bridge Circuit Doubles Voltage for Piezo Crystals.
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OPA445
