OPA502BM

® OPA502 High Current, High Power OPERATIONAL AMPLIFIER FEATURES q HIGH OUTPUT CURRENT: 10A q WIDE POWER SUPPLY VOLTAGE: ±10V to ±45V q USER-SET CURRENT LIMIT q SLEW RATE: 10V/µs q FET INPUT: IB = 200pA max q CLASS A/B OUTPUT STAGE q QUIESCENT CURRENT: 25mA max q HERMETIC TO-3 PACKAGE — ISOLATED CASE APPLICATIONS q MOTOR DRIVER q SERVO AMPLIFIER q PROGRAMMABLE POWER SUPPLY q ACTUATOR DRIVER q AUDIO AMPLIFIER q TEST EQUIPMENT V+ 3 DESCRIPTION The OPA502 is a high output current operational amplifier designed to drive a wide range of resistive and reactive loads. Its complementary class A/B output stage provides superior performance in applications requiring freedom from crossover distortion. Resistor-programmable current limits provide protection for both the amplifier and the load during abnormal operating conditions. An adjustable foldover current limit can also be used to protect against potentially damaging conditions. The OPA502 employs a custom monolithic op amp/ driver circuit and rugged complementary output transistors, providing excellent DC and dynamic performance. The industry-standard 8-pin TO-3 package is electrically isolated from all circuitry. This allows the OPA502 to be mounted directly to a heat sink without cumbersome insulating hardware which degrade thermal performance. The OPA502 is available in –40°C to +85°C temperature range. 5 4 280Ω 2 +Output Drive 20kΩ Bias Circuit 20kΩ 1 Current Sense RFO – Output Drive 7 280Ω 8 6 V– International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111 Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 ® © 1992 Burr-Brown Corporation PDS-1166B 1 Printed in U.S.A. OPA502 March, 1998 SPECIFICATIONS TCASE = +25°C, VS = ±40V, unless otherwise noted. OPA502BM PARAMETER OFFSET VOLTAGE Input Offset Voltage vs Temperature vs Power Supply INPUT BIAS CURRENT(1) Input Bias Current Input Offset Current NOISE Input Voltage Noise Noise Density, Current Noise Density, INPUT VOLTAGE RANGE Common-Mode Input Range, Positive Negative Common-Mode Rejection INPUT IMPEDANCE Differential Common-Mode OPEN-LOOP GAIN Open-Loop Voltage Gain FREQUENCY RESPONSE Gain-Bandwidth Product Slew Rate Full-Power Bandwidth Total Harmonic Distortion Capacitive Load OUTPUT Voltage Output, Positive Negative Positive Negative Current Output Short Circuit Current POWER SUPPLY Specified Operating Voltage Operating Voltage Range Quiescent Current TEMPERATURE RANGE Specification Storage Thermal Resistance, θJC IO = 10A IO = 10A IO = 1A IO = 1A (V+) –6 (V–) +6 VO = ±34V, RL = 6Ω G = +10, RL = 50Ω 68Vp-p, RL = 6Ω G = +3, f = 20kHz VO = 20V, RL = 8Ω 92 CONDITION MIN TYP ±0.5 ±5 92 12 ±3 MAX ±5 UNITS mV µV/°C dB pA pA Specified Temp. Range VS = ±10V to ±45V VCM = 0V VCM = 0V 74 200 f = 1kHz f = 1kHz Linear Operation Linear Operation VCM = ±35V (V+) –5 (V–) +5 74 25 3 (V+) –4 (V–) +4 106 1012 || 5 1012 || 4 103 2.0 10 See Typical Curves 0.06 See Figure 6 (V+)–3.5 (V–) +3.6 (V+) –2.5 (V–) +3.1 See SOA Curves Resistor Programmed ±40 ±20 nV/√Hz fA/√Hz V V dB Ω || pF Ω || pF dB MHz V/µs % 5 V V V V ±10 IO = 0 –40 –55 DC AC f ≥ 50Hz No Heat Sink ±45 ±25 +85 +125 1.4 0.9 V V mA °C °C °C/W °C/W °C/W θJA NOTE: (1) High-speed test at TJ = 25°C. 1.25 0.8 30 ABSOLUTE MAXIMUM RATINGS(1) Supply Voltage, V+ to V– ..................................................................... 90V Output Current .................................................................. See SOA Curve Input Voltage .............................................................. (V–) –1V to (V+)+1V Case Temperature, Operating ......................................................... 150°C Junction Temperature ...................................................................... 200°C NOTE: (1) Stresses above these ratings may cause permanent damage. PACKAGE/ORDERING INFORMATION PACKAGE DRAWING NUMBER(1) 030 TEMPERATURE RANGE –40°C to +85°C PRODUCT OPA502BM PACKAGE 8-Pin TO-3 NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. ® OPA502 2 PIN CONFIGURATION Top View TO-3 ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. V+ 3 +In 4 2 +Output Drive 1 Current Sense + RCL VO –In 5 8 6 V– 7 RFO –Output Drive RCL – TYPICAL PERFORMANCE CURVES TCASE = +25°C, VS = ±40V, unless otherwise noted. CURRENT LIMIT vs LIMIT RESISTOR 10 2.4 2.2 2.0 ICL (A) CURRENT LIMIT vs TEMPERATURE 0.24 0.22 RCL = 5.0Ω 0.20 –ICL ICL (A) 1 +ICL 1.6 1.4 1.2 RCL = 0.5Ω NOTE: These are average values. –ICL is typically 8% higher. +ICL is typically 8% lower. –25 0 25 50 75 100 125 0.16 0.14 0.12 0.10 0.10 0.01 0.10 RCL (Ω) 1 10 1.0 –50 Case Temperature (°C) OPEN-LOOP GAIN AND PHASE vs FREQUENCY 120 100 Voltage Gain (dB) SUPPLY CURRENT vs TEMPERATURE 0 –45 –90 Supply Current (mA) Phase (degrees) 30 80 60 40 20 0 10 100 1k 10k 100k 1M RL = 4Ω RL = 50Ω –135 –180 20 VS = ±10 to ±45V 10 10M –50 –25 0 25 50 75 100 125 Frequency (Hz) Case Temperature (°C) 3 OPA502 ICL (A) ® 1.8 0.18 TYPICAL PERFORMANCE CURVES TCASE = +25°C, VS = ±40V, unless otherwise noted. (CONT) INPUT BIAS AND OFFSET CURRENTS vs TEMPERATURE 10nA 2.2 INPUT BIAS CURRENT vs INPUT COMMON-MODE VOLTAGE Input Bias and Offset Current (pA) 1.8 1nA Normalized (IB) IB 100 IOS 10 1.4 1.0 0.6 0.2 –50 –25 0 25 50 75 100 125 –40 –30 –20 –10 0 10 20 30 40 Case Temperature (°C) Common-Mode Voltage (V) 1 VOLTAGE NOISE DENSITY vs FREQUENCY 10k 2.8 2.4 Voltage Noise (nV/ Hz) GAIN BANDWIDTH PRODUCT vs TEMPERATURE RL = 10kΩ RL = 50Ω GBWP (MHz) 1k 2.0 1.6 G = +10 1.2 0.8 0.4 RL = 4Ω 100 10 1 10 100 1k 10k 100k Frequency (Hz) 0 –50 –25 0 25 50 75 100 125 Case Temperature (°C) POWER SUPPLY REJECTION vs FREQUENCY 120 120 COMMON-MODE REJECTION vs FREQUENCY 100 100 80 CMRR (dB) 1 10 100 1k Frequency (Hz) 100k 1M PSRR (dB) 80 60 60 40 20 10k 40 20 1 10 100 1k Frequency (Hz) 10k 100k 1M ® OPA502 4 TYPICAL PERFORMANCE CURVES TCASE = +25°C, VS = ±40V, unless otherwise noted. (CONT) SLEW RATE vs TEMPERATURE 14 35 30 FULL POWER RESPONSE 12 Output Voltage (VPK) Slew Rate (V/µs) 25 20 15 10 5 G = +10 RL = 8Ω THD < 2% –SR 10 8 6 4 –50 G = +10 VO = 34VPK RL = 6Ω +SR 0 –25 0 25 50 75 100 125 10k 100k Frequency (Hz) 1M Case Temperature (°C) TOTAL HARMONIC DISTORTION AND NOISE vs FREQUENCY 1.000 G = +3 RL = 8Ω Measurement BW = 80kHz OUTPUT VOLTAGE SWING vs OUTPUT CURRENT 5 4 THD + N (%) 0.100 |±VS| – |VOUT| (V) PO = 100mW PO = 5W (+VS) – VO 3 |–VS| – |VO| 2 0.010 PO = 50W 1 0.001 20 100 1k Frequency (Hz) 10k 20k 0 0 1 2 3 4 5 IOUT (A) 6 7 8 9 10 OUTPUT VOLTAGE SWING vs TEMPERATURE 5 4 |±VS| – |VO| (V) IO = +10A IO = +1A IO = –10A 3 2 IO = –1A 1 0 –50 –25 0 25 50 75 100 125 Case Temperature (°C) ® 5 OPA502 TYPICAL PERFORMANCE CURVES TCASE = +25°C, VS = ±40V, unless otherwise noted. (CONT) LARGE SIGNAL RESPONSE G = +3, RL = 4Ω SMALL SIGNAL RESPONSE G = +3, CL = 1000pF APPLICATIONS INFORMATION +40V Power supply terminals should be bypassed with low series impedance capacitors such as ceramic or tantalum close to the device pins. Power supply wiring should have low series impedance and inductance. Figure 1 indicates the high current connections in bold lines. Current limit is set with two external resistors—one for positive output current and one for negative output current (see Figure 1). For conventional current limit, independent of output voltage, pin 7 should be left open (see “Foldback Current Limit”). Limiting occurs when the output current causes sufficient voltage drop across RCL to turn on the respective current limit transistor. The limit current decreases at high temperature (see typical performance curve “Current Limit vs Temperature). Figure 1 also shows nominal current limit produced by standard resistor values. See also the typical performance curve “Current Limit vs Limit Resistance”. The output current must flow through this resistor, so its power rating must be chosen accordingly. The table in Figure 1 shows the power dissipation of the current limit resistor during continuous current limit (room temperature). Connections from the current limit resistors to the device pins can typically add 0.02Ω to 0.05Ω to the effective value of RCL. This significantly affects the current limit value for high output currents. The current limit resistors can be chosen from a variety of types. Most common wire-wound types are satisfactory, although some physically large types may have excessive inductance which can cause problems. You should test your circuits with the exact resistor type planned for production use. You can set different current limits for positive and negative current. Resistors are chosen with the same table of values in Figure 1. SAFE OPERATING AREA Stress on the output transistors is determined by the output current and the voltage across the conducting output transis® 2µF 0.1µF R1 + RCL 5 4 3 2 OPA502 6 2µF 0.1µF VIN 8 1 – RCL R2 G=1+ R2 R1 VO Load –40V NOTE: Bold lines indicate high current paths. RCL (Ω) 10 5 2 1 0.68 0.5 0.3 0.2 0.15 0.1 ICL at 25°C (A) 0.11 0.19 0.44 0.78 1.22 1.65 2.73 4.0 5.4 8.1 Power Dissipation1 of RCL (W) 0.12 0.18 0.39 0.61 1.0 1.4 2.2 3.2 4.4 6.6 NOTE 1: Power dissipation during continuous current limit at TCASE = +25°C. FIGURE 1. Basic Circuit Connections. tor. The power dissipated by the output transistor is equal to the product of the output current and the voltage across the conducting transistor, VCE. The Safe Operating Area (SOA curve, Figure 2) shows the permissible range of voltage and current. 6 OPA502 The safe output current decreases as VCE increases. Output short-circuits are a very demanding case for SOA. A shortcircuit to ground forces the full power supply voltage (V+ or V–) across the conducting transistor. With VS = ±40V the current limit must be set for 3A (25°C) to be safe for continuous short-circuit to ground. For further insight on SOA, consult AB-039. circuit can be set to allow high output current when VCE is low (high output voltage). Output current limits at a lower value under the more stressful condition when VCE is high, (output voltage is low). The behavior of this voltage-dependant current limit is described by the following equation. 0.81 + 0.28 VO RFO + 20 + 0.03 RCL SAFE OPERATING AREA 10 TC = +25°C 5.0 TC = +85°C t= ILIMIT = t= m 0.5 s 1m s t= where: VO is the output voltage measured with respect to ground. RFO is the resistor connected from pin 7 to ground (in k ohms). RCL is the current limit resistor (in ohms). 2.0 IO (A) 5m s 1.0 0.5 Ther mal Limitation (TJ = 200°C) 0.2 0.1 1 2 5 10 20 50 100 |VS – VOUT| (V) Second Breakdown Limited The foldover limit circuitry can be set to allow large voltage and current to resistive loads, yet limit output current to a safe value with an output short circuit. Reactive or EMF-generating loads can produce unexpected behavior with the foldover circuit driven into limiting. With a reactive load, peak output current occurs at low or zero output voltage. Compared to a resistive load, a reactive load with the same total impedance will be more likely to activate the foldover limit circuitry. FIGURE 2. Safe Operating Area (SOA). UNBALANCED POWER SUPPLIES Some applications do not require equal positive and negative output voltage swing. The power supply voltages of the OPA502 do not need to be equal. Figure 3 shows a circuit designed for a positive output voltage and current. The –5V power supply voltage assures that the inputs of the OPA502 are operated within their linear common-mode range. The V+ power supply could range from 15V to 85V. The total voltage (V– to V+) can range from 20V to 90V. V+ Fast Recovery Diode 5A, 100V MR821 OPA502 Inductive or EMF-Generating Load 55V at 0.5A 1kΩ 2Ω 0 to 50V VO 0.5A RL –5V at 50mA 9kΩ MR821 V– FIGURE 4. Diode Protection of Output. OUTPUT PROTECTION The output stage of the OPA502 is protected by internal diode clamps to the power supply terminals. These internal diodes are similar to common silicon rectifier types and may not be fast enough for adequate protection. For loads that can deliver large reverse kickback current (greater than 5A) to the output, external fast-recovery clamp diodes are recommended (Figure 4). For these diodes (internal or external) to provide the intended protection, the power supplies must provide a low impedance to a reverse current. OPA502 VIN 0 to 5V 22Ω FIGURE 3. Unbalanced Power Supplies. FOLDOVER CURRENT LIMIT By connecting a resistor from pin 7 to ground, you can make the limit current vary with output voltage. The foldover limit ® 7 OPA502 COMPENSATION AND STABILITY Capacitance at the inverting input causes a high frequency pole in the feedback path. This reduces phase margin, causing pulse response ringing, and in severe cases, oscillations. A low value feedback capacitor can reduce or eliminate this effect by maintaining a constant feedback factor at high frequency (see Figure 5). Depending on the load conditions, precautions may be required when using the OPA502 in low gains. Gains less than +3V/V or –2V/V may cause oscillations, particularly with capacitive loads. Figure 6 shows several circuits for low gain and capacitive loads. Large value feedback capacitors used to limit the closed-loop bandwidth or form an integrator may also produce instability because the closed-loop gain approaches unity at high frequency. MOUNTING AND HEAT SINKING Most applications require a heat sink to assure that the maximum junction temperature is not exceeded. The heat sink required depends on the power dissipated and on ambient conditions. Consult Application Bulletin AB-038 for information on determining heat sink requirements. The case of the OPA502 is isolated from all circuitry and can be fastened directly to a heat sink. This eliminates cumbersome insulating hardware that degrades thermal performance. Consult Application Bulletin AB-037 for proper mounting techniques and procedures for TO-3 power products. SOCKET A mating socket, 0804MC is available for the OPA502 and can be purchased from Burr-Brown. Although not required, this socket makes interchanging parts easy, especially during design and testing. C2 = R1 C R2 IN R2 R1 OPA502 CIN CIN = Input capacitance, package and wiring ≈ 20pF FIGURE 5. Compensating Input Capacitance. ® OPA502 8 10kΩ VIN 470pF 10kΩ OPA502 20kΩ CL ≤ 0.01µF G = –2 10kΩ VIN 20kΩ 4µH 10Ω OPA502 CL ≤ 0.1µF G = –2 Prevents phase-inversion in G = 1 circuits IN4148 20kΩ VIN 10kΩ 470pF CL ≤ 2200pF OPA502 G = +1 FIGURE 6. Compensation Circuits. ® 9 OPA502 20kΩ 10kΩ 10pF 47pF 0.1Ω 10Ω G = +21 OPA502 OPA27 VIN 100kΩ 1kΩ VS = ±15V 4.7kΩ 0.1Ω VS = ±40V THD at 50W 0.02% at 20kHz 0.002% at 1kHz 4µH 4Ω FIGURE 7. Low Distortion Composite Amplifier. +35V 10kΩ 10kΩ +35V 10kΩ 20kΩ 0.2Ω 20Ω OPA502 0.2Ω 3nF OPA502 VIN ±10V G = +3 0.2Ω Load 120Vp-p (±60V) 0.2Ω 1kΩ G = –1 –35V –35V FIGURE 8. Bridge Drive Circuit. +30V 10V REF102 +30V 20kΩ +5V 20pF 8-bit data port (8 + 4 bits) 0-1mA 10kΩ OPA602 DAC7801 12-bit M-DAC 40kΩ 0.1Ω 10kΩ OPA502 4.7kΩ 470pF 0.1Ω VO ±20V at 5A –30V FIGURE 9. Digitally Programmable Power Supply. ® OPA502 10