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OPA835, OPA2835
SLOS713I – JANUARY 2011 – REVISED AUGUST 2016
OPAx835 Ultra-Low-Power, Rail-to-Rail Out, Negative Rail In, VFB Op Amp
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Ultra-Low Power
– Supply Voltage: 2.5 V to 5.5 V
– Quiescent Current: 250 µA/ch (Typical)
– Power Down Mode: 0.5 µA (Typical)
Bandwidth: 56 MHz (AV = 1 V/V)
Slew Rate: 160 V/µs
Rise Time: 10 ns (2 VSTEP)
Settling Time (0.1%): 55 ns (2 VSTEP)
Overdrive Recovery Time: 200 ns
SNR: 0.00015% (–116.4 dBc) at 1 kHz (1 VRMS)
THD: 0.00003% (–130 dBc) at 1 kHz (1 VRMS)
HD2/HD3: –70 dBc/–73 dBc at 1 MHz (2 VPP)
Input Voltage Noise: 9.3 nV/√Hz (f = 100 kHz)
Input Offset Voltage: 100 µV (±500-µV Maximum)
CMRR: 113 dB
Output Current Drive: 40 mA
RRO: Rail-to-Rail Output
Input Voltage Range: –0.2 V to 3.9 V
(5-V Supply)
Operating Temperature Range:
–40°C to +125°C
2 Applications
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Low-Power Signal Conditioning
Audio ADC Input Buffer
Low-Power SAR and ΔΣ ADC Driver
Portable Systems
Low-Power Systems
High-Density Systems
Ultrasonic Flow Meter
3 Description
The OPA835 and OPA2835 devices (OPAx835) are
single and dual ultra-low-power, rail-to-rail output,
negative-rail
input,
voltage-feedback
(VFB)
operational amplifiers designed to operate over a
power supply range of 2.5-V to 5.5-V with a single
supply, or ±1.25-V to ±2.75-V with a dual supply.
Consuming only 250 µA per channel and with a unity
gain bandwidth of 56 MHz, these amplifiers set an
industry-leading performance-to-power ratio for railto-rail amplifiers.
For battery-powered, portable applications where
power is of key importance, the low power
consumption and high-frequency performance of the
OPA835 and OPA2835 devices offers performance
versus power that is not attainable in other devices.
Coupled with a power-savings mode to reduce
current to < 1.5 μA, these devices offer an attractive
solution for high-frequency amplifiers in batterypowered applications.
The OPA835 RUN package option includes
integrated gain-setting resistors for the smallest
possible
footprint
on
a
printed-circuit-board
(approximately 2.00 mm × 2.00 mm). By adding
circuit traces on the PCB, gains of +1, –1, –1.33, +2,
+2.33, –3, +4, –4, +5, –5.33, +6.33, –7, +8 and
inverting attenuations of –0.1429, –0.1875, –0.25,
–0.33, –0.75 can be achieved. See Table 3 and
Table 4 for details.
The
OPA835
and
OPA2835
devices
are
characterized for operation over the extended
industrial temperature range of –40°C to +125°C.
Device Information(1)
PART NUMBER
OPA835
OPA2835
PACKAGE
BODY SIZE (NOM)
SOT-23 (6)
2.90 mm × 1.60 mm
QFN (10)
2.00 mm × 2.00 mm
SOIC (8)
4.90 mm × 3.91 mm
VSSOP (10)
3.00 mm × 3.00 mm
UQFN (10)
2.00 mm × 2.00 mm
QFN (10)
2.00 mm × 2.00 mm
(1) For all available packages, see the package option addendum
at the end of the data sheet.
Harmonic Distortion vs Frequency
-30
-50
VS = 5 V,
G = 1,
VOUT = 2 Vpp,
-60
RL = 2 kW
-40
Harmonic Distortion - dBc
1 Features
RF = 0 W,
-70
-80
-90
HD2
-100
-110
HD3
-120
-130
-140
10k
100k
1M
10M
f - Frequency - Hz
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
OPA835, OPA2835
SLOS713I – JANUARY 2011 – REVISED AUGUST 2016
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
OPA835-Related Devices ......................................
Pin Configuration and Functions .........................
Specifications.........................................................
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
8
1
1
1
2
5
5
7
Absolute Maximum Ratings ...................................... 7
ESD Ratings.............................................................. 7
Recommended Operating Conditions....................... 7
Thermal Information: OPA835 ................................. 7
Thermal Information: OPA2835 ................................ 7
Electrical Characteristics: VS = 2.7 V........................ 8
Electrical Characteristics: VS = 5 V......................... 10
Typical Characteristics: VS = 2.7 V ......................... 13
Typical Characteristics: VS = 5 V ............................ 19
Detailed Description ............................................ 25
8.1 Overview ................................................................. 25
8.2 Functional Block Diagram ....................................... 25
8.3 Feature Description................................................. 25
8.4 Device Functional Modes........................................ 28
9
Application and Implementation ........................ 31
9.1 Application Information............................................ 31
9.2 Typical Application .................................................. 37
10 Power Supply Recommendations ..................... 41
11 Layout................................................................... 41
11.1 Layout Guidelines ................................................. 41
11.2 Layout Example .................................................... 42
12 Device and Documentation Support ................. 43
12.1
12.2
12.3
12.4
12.5
Device Support ....................................................
Documentation Support ........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
43
43
43
43
43
13 Mechanical, Packaging, and Orderable
Information ........................................................... 44
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision H (November 2015) to Revision I
Page
•
Reformatted table note on Thermal Information: OPA835 and Thermal Information: OPA2835 tables ............................... 7
•
Deleted the word "linear" from output voltage low, output voltage high, and output current drive parameters in
Electrical Characteristics: VS = 2.7 V table ............................................................................................................................ 9
•
Changed Current noise 1/f corner frequency parameter units from Hz to kHz in Electrical Characteristics: VS = 5 V
table ..................................................................................................................................................................................... 11
•
Deleted the word "linear" from output voltage low, output voltage high, and output current drive parameters in
Electrical Characteristics: VS = 5 V table ............................................................................................................................. 12
•
Reformatted Development Support section ......................................................................................................................... 43
•
Reformatted Related Documentation section ...................................................................................................................... 43
Changes from Revision F (June 2015) to Revision G
Page
•
Moved all switching parameters from the Switching Characteristics: VS = 2.7 V back into the Electrical
Characteristics: VS = 2.7 V table ........................................................................................................................................... 8
•
Moved all switching parameters from the Switching Characteristics: VS = 5 V table back into the Electrical
Characteristics: VS = 5 V table ............................................................................................................................................ 10
Changes from Revision E (July 2013) to Revision F
Page
•
Added Pin Configuration and Functions section, ESD Ratings table, Switching Characteristics tables, Feature
Description section, Device Functional Modes, Application and Implementation section, Power Supply
Recommendations section, Layout section, Device and Documentation Support section, and Mechanical,
Packaging, and Orderable Information section ..................................................................................................................... 1
•
Moved the switching parameters from the Electrical Characteristics tables into Switching Characteristics tables. ............ 11
2
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Product Folder Links: OPA835 OPA2835
OPA835, OPA2835
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SLOS713I – JANUARY 2011 – REVISED AUGUST 2016
Changes from Revision D (October 2011) to Revision E
Page
•
Added RMC package to document......................................................................................................................................... 1
•
Added RMC to Thermal Information table.............................................................................................................................. 7
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3
OPA835, OPA2835
SLOS713I – JANUARY 2011 – REVISED AUGUST 2016
www.ti.com
Changes from Revision C (September 2011) to Revision D
Page
•
Removed Product Preview from OPA835IRUNT and OPA835IRUNR .................................................................................. 5
•
Changed Resistor temperature coefficient typical value from TBD to < 10 ......................................................................... 10
•
"Changed Quiescent operating current" parameter to "Quiescent operating current per amplifier" .................................... 10
•
Changed Resistor temperature coefficient parameter units from TBD to < 10 .................................................................... 12
•
Changed Quiescent operating current parameter to Quiescent operating current per amplifer .......................................... 12
Changes from Revision B (May 2011) to Revision C
Page
•
Removed Product Preview from all devices except OPA835IRUNT and OPA835IRUNR .................................................... 5
•
Changed - Channel to channel crosstalk (OPA2835) typical value from TBD to –120 dB .................................................... 9
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Changed the Common-mode rejection ratio minimum value from 91 dB to 88 dB................................................................ 9
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Added GAIN-SETTING RESISTORS (OPA835IRUN ONLY) parameter............................................................................. 10
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Changed the Quiescent operating current per amplifier(TA = 25°C) parameter minimum value from190 µA to 175 µA..... 10
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Changed the Power supply rejection (±PSRR) minimum value from 91 dB to 88 dB ......................................................... 10
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Changed the Power-down pin bias current test conditions fromPD = 0.7 V toPD = 0.5 V .................................................. 10
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Changed the Power-down quiescent current test conditions fromPD = 0.7 V toPD = 0.5 V ............................................... 10
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Changed Channel to channel crosstalk (OPA2835) typical value from TBD to -120 dB ..................................................... 11
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Changed the common-mode rejection ratio minimum value from 94 dB to 91 dB............................................................... 12
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Added GAIN-SETTING RESISTORS (OPA835IRUN ONLY) parameter............................................................................. 12
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Changed the Quiescent operating current (TA = 25°C) Min value From: 215 µA To: 200 µA ............................................. 12
•
Changed the Power supply rejection (±PSRR) minimum value from 93 dB to 90 dB ......................................................... 12
•
Changed the Power-down quiescent current test conditions from PD = 0.7 V to PD = 0.5 V ............................................. 12
•
Changed the Power-down quiescent current test conditions fromPD = 0.7 V to PD = 0.5 V .............................................. 12
•
Added Figure Crosstalk vs Frequency ................................................................................................................................. 16
•
Added Figure Crosstalk vs Frequency ................................................................................................................................. 22
•
Added Single-Ended to Differential Amplifier section .......................................................................................................... 32
Changes from Revision A (March 2011) to Revision B
•
4
Page
Changed OPA835 from product preview to production data.................................................................................................. 1
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Product Folder Links: OPA835 OPA2835
OPA835, OPA2835
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SLOS713I – JANUARY 2011 – REVISED AUGUST 2016
5 OPA835-Related Devices
BW (AV = 1)
MHz
SLEW RATE
V/µsec
Iq (+5 V)
mA
INPUT NOISE
nV/√Hz
RAIL-TO-RAIL IN/OUT
DUALS
OPA835
30
110
0.25
9.3
–VS/Out
OPA2835
OPA365
50
25
5
4.5
In/Out
OPA2365
THS4281
95
35
0.75
12.5
In/Out
LMH6618
140
45
1.25
10
In/Out
LMH6619
OPA836
205
560
1
4.6
–VS/Out
OPA2836
OPA830
310
600
3.9
9.5
–VS/Out
OPA2830
PART NUMBER
For a complete selection of TI High Speed Amplifiers, visit ti.com.
6 Pin Configuration and Functions
OPA835: DBV Package
6-Pin SOT-23
Top View
OPA2835: D Package
8-Pin SOIC
Top View
VOUT
1
6
VS+
VS-
2
5
PD
VIN+
3
+ 4
VIN-
VOUT1
1
VIN1-
2
VIN1+
3
VS-
4
OPA835: RUN Package
10-Pin QFN
Top View
1
10
9
FB1
8
FB2
2.4k
VIN-
- +
2
VOUT1
1
VIN1-
2
VIN1+
3
VS-
4
PD1
5
1.8k
VIN+
3
7
FB3
6
FB4
600
PD
4
5
+
VS+
7
VOUT2
6
VIN2-
5
VIN2+
OPA2835: DGS Package
10-Pin VSSOP
Top View
VS+
VOUT
+
8
10
+
+
VS+
9
VOUT2
8
VIN2-
7
VIN2+
6
PD2
VS-
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5
OPA835, OPA2835
SLOS713I – JANUARY 2011 – REVISED AUGUST 2016
www.ti.com
OPA2835: RMC and RUN Packages
10-Pin UQFN and 10-Pin QFN
Top View
VS+
VOUT1
1
VIN1-
2
VIN1+
3
PD1
4
10
9
VOUT2
8
VIN2-
7
VIN2+
6
PD2
+ -
- +
5
VS-
Pin Functions
PIN
OPA835
NAME
SOT-23
OPA2835
QFN
SOIC
VSSOP
I/O
DESCRIPTION
QFN,
UQFN
FB1
9
I/O
Connection to top of 2.4-kΩ internal gain-setting resistors
FB2
8
I/O
Connection to junction of 1.8-kΩ and 2.4-kΩ internal gainsetting resistors
I/O
Connection to junction of 600-Ω and 1.8-kΩ internal gainsetting resistors
I/O
Connection to bottom of 600-Ω internal gain-setting resistors
—
FB3
7
FB4
6
PD
5
4
—
—
PD1
—
—
I
Amplifier Power Down, low = low-power mode,
high = normal operation (PIN MUST BE DRIVEN)
5
4
I
Amplifier 1 Power Down, low = low-power mode,
high = normal operation (PIN MUST BE DRIVEN)
6
6
I
Amplifier 2 Power Down, low = low-power mode,
high = normal operation (PIN MUST BE DRIVEN)
—
—
I
Amplifier noninverting input
I
Amplifier inverting input
—
PD2
VIN+
3
3
VIN–
4
2
VIN1+
3
3
3
I
Amplifier 1 noninverting input
VIN1–
2
2
2
I
Amplifier 1 inverting input
5
7
7
I
Amplifier 2 noninverting input
VIN2+
—
—
1
1
VIN2–
VOUT
VOUT1
6
8
8
I
Amplifier 2 inverting input
—
—
—
O
Amplifier output
1
1
1
O
Amplifier 1 output
7
9
9
O
Amplifier 2 output
—
—
VS+
6
10
8
10
10
POW
Positive power supply input
VS–
2
5
4
4
5
POW
Negative power supply input
VOUT2
6
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SLOS713I – JANUARY 2011 – REVISED AUGUST 2016
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
UNIT
5.5
V
VS+ + 0.7
V
VS– to VS+
Supply voltage
VI
Input voltage
VID
Differential input voltage
1
V
II
Continuous input current
0.85
mA
IO
Continuous output current
60
mA
VS– – 0.7
See Thermal Information:
OPA835 and Thermal
Information: OPA2835
Continuous power dissipation
TJ
Maximum junction temperature
150
°C
TA
Operating free-air temperature
–40
125
°C
Tstg
Storage temperature
–65
150
°C
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±6000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±1000
Machine model
±200
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
VS+
Single supply voltage
2.5
5
5.5
UNIT
V
TA
Ambient temperature
–40
25
125
°C
7.4 Thermal Information: OPA835
OPA835
THERMAL METRIC (1)
DBV
(SOT23-6)
RUN
(QFN)
6 PINS
10 PINS
194
145.8
°C/W
UNIT
RθJA
Junction-to-ambient thermal resistance
RθJCtop
Junction-to-case (top) thermal resistance
129.2
75.1
°C/W
RθJB
Junction-to-board thermal resistance
39.4
38.9
°C/W
ψJT
Junction-to-top characterization parameter
25.6
13.5
°C/W
ψJB
Junction-to-board characterization parameter
38.9
104.5
°C/W
(1)
For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics (SPRA953).
7.5 Thermal Information: OPA2835
OPA2835
THERMAL METRIC
RθJA
(1)
(1)
Junction-to-ambient thermal resistance
D
(SOIC)
DGS
(VSSOP)
RUN
(QFN)
RMC
(UQFN)
8 PINS
10 PINS
10 PINS
10 PINS
150.1
206
145.8
143.2
UNIT
°C/W
For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics (SPRA953).
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OPA835, OPA2835
SLOS713I – JANUARY 2011 – REVISED AUGUST 2016
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Thermal Information: OPA2835 (continued)
OPA2835
THERMAL METRIC (1)
D
(SOIC)
DGS
(VSSOP)
RUN
(QFN)
RMC
(UQFN)
UNIT
8 PINS
10 PINS
10 PINS
10 PINS
RθJCtop
Junction-to-case (top) thermal resistance
83.8
75.3
75.1
49.0
°C/W
RθJB
Junction-to-board thermal resistance
68.4
96.2
38.9
61.9
°C/W
ψJT
Junction-to-top characterization parameter
33.0
12.9
13.5
3.3
°C/W
ψJB
Junction-to-board characterization parameter
67.9
94.6
104.5
61.9
°C/W
7.6 Electrical Characteristics: VS = 2.7 V
at VS+ = +2.7 V, VS– = 0 V, VOUT = 1 VPP, RF = 0 Ω, RL = 2 kΩ, G = 1 V/V, input and output referenced to mid-supply, VIN_CM =
mid-supply – 0.5 V. TA = 25°C, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
TEST
LEVEL (1)
MHz
C
AC PERFORMANCE
Small-signal bandwidth
VOUT = 100 mVPP, G = 1
51
VOUT = 100 mVPP, G = 2
22.5
VOUT = 100 mVPP, G = 5
7.2
VOUT = 100 mVPP, G = 10
3
Gain-bandwidth product
VOUT = 100 mVPP, G = 10
30
MHz
C
Large-signal bandwidth
VOUT = 1 VPP, G = 1
24
MHz
C
Bandwidth for 0.1-dB flatness
VOUT = 1 VPP, G = 2
4
MHz
C
Slew rate, rise
VOUT = 1 VSTEP, G = 2
110
V/µs
C
Slew rate, fall
VOUT = 1 VSTEP, G = 2
130
V/µs
C
Rise time
VOUT = 1 VSTEP, G = 2
9.5
ns
C
Fall time
VOUT = 1 VSTEP, G = 2
9
ns
C
Settling time to 1%, rise
VOUT = 1 VSTEP, G = 2
35
ns
C
Settling time to 1%, fall
VOUT = 1 VSTEP, G = 2
30
ns
C
Settling time to 0.1%, rise
VOUT = 1 VSTEP, G = 2
60
ns
C
Settling time to 0.1%, fall
VOUT = 1 VSTEP, G = 2
65
ns
C
Settling time to 0.01%, rise
VOUT = 1 VSTEP, G = 2
120
ns
C
Settling time to 0.01%, rise
VOUT = 1 VSTEP, G = 2
90
ns
C
Overshoot/Undershoot
VOUT = 1 VSTEP, G = 2
0.5%/0.2%
Second-order harmonic distortion
Third-order harmonic distortion
f = 10 kHz, VIN_CM = mid-supply – 0.5 V
–133
f = 100 kHz, VIN_CM = mid-supply – 0.5 V
–110
f = 1 MHz, VIN_CM = mid-supply – 0.5 V
–73
f = 10 kHz, VIN_CM = mid-supply – 0.5 V
–137
f = 100 kHz, VIN_CM = mid-supply – 0.5 V
–125
C
dBc
C
dBc
C
f = 1 MHz, VIN_CM = mid-supply – 0.5 V
–78
Second-order intermodulation distortion
f = 1 MHz, 200-kHz Tone Spacing,
VOUT Envelope = 1 VPP,
VIN_CM = mid-supply – 0.5 V
–75
dBc
C
Third-order intermodulation distortion
f = 1 MHz, 200-kHz Tone Spacing,
VOUT Envelope = 1 VPP,
VIN_CM = mid-supply – 0.5 V
–81
dBc
C
Input voltage noise
f = 100 kHz
9.3
nV/√Hz
C
147
Hz
C
Voltage noise 1/f corner frequency
(1)
8
Test levels (all values set by characterization and simulation): (A) 100% tested at 25°C; over temperature limits by characterization and
simulation. (B) Not tested in production; limits set by characterization and simulation. (C) Typical value only for information.
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SLOS713I – JANUARY 2011 – REVISED AUGUST 2016
Electrical Characteristics: VS = 2.7 V (continued)
at VS+ = +2.7 V, VS– = 0 V, VOUT = 1 VPP, RF = 0 Ω, RL = 2 kΩ, G = 1 V/V, input and output referenced to mid-supply, VIN_CM =
mid-supply – 0.5 V. TA = 25°C, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
UNIT
TEST
LEVEL (1)
0.45
pA/√Hz
C
14.7
kHz
C
140/125
ns
C
TYP
MAX
AC PERFORMANCE (continued)
Input current noise
f = 1 MHz
Current noise 1/f corner frequency
Overdrive recovery time, over/under
Overdrive = 0.5 V
Closed-loop output impedance
f = 100 kHz
0.028
Ω
C
Channel-to-channel crosstalk
(OPA2835)
f = 10 kHz
–120
dB
C
dB
A
DC PERFORMANCE
Open-loop voltage gain (AOL)
Input referred offset voltage
100
120
TA = 25°C
–500
±100
TA = 0°C to 70°C
–880
880
TA = –40°C to 85°C
–1040
1040
TA = –40°C to 125°C
–1850
1850
TA = 0°C to 70°C
Input offset voltage drift
(2)
TA = –40°C to 85°C
Input bias current
Input offset current
Input offset current drift (2)
A
µV
B
8.5
–9
±1.5
9
±2.25
13.5
TA = 25°C
50
200
400
TA = 0°C to 70°C
47
410
TA = –40°C to 85°C
45
425
TA = –40°C to 125°C
45
530
TA = 0°C to 70°C
Input bias current drift (2)
±1.4
–13.5
TA = –40°C to 125°C
(3)
–8.5
500
–1.4
±0.25
1.4
TA = –40°C to 85°C
–1.05
±0.175
1.05
TA = –40°C to 125°C
–1.1
±0.185
1.1
TA = 25°C
–100
±13
100
TA = 0°C to 70°C
–100
±13
100
TA = –40°C to 85°C
–100
±13
100
TA = –40°C to 125°C
–100
±13
100
TA = 0°C to 70°C
–1.230
±0.205
1.230
TA = –40°C to 85°C
–0.940
±0.155
0.940
TA = –40°C to 125°C
–0.940
±0.155
0.940
TA = 25°C, < 3 dB degradation in CMRR limit
–0.2
TA = –40°C to 125°C, < 3-dB degradation in CMRR limit
–0.2
µV/°C
B
A
nA
nA/°C
B
B
A
nA
B
nA/°C
B
0
V
A
0
V
B
V
A
B
INPUT
Common-mode input range low
Common-mode input range high
TA = 25°C, < 3-dB degradation in CMRR limit
1.5
TA = –40°C to 125°C, < 3-dB degradation in CMRR limit
1.5
1.6
V
88
110
dB
A
200 || 1.2
kΩ || pF
C
200 || 1
kΩ || pF
C
Common-mode rejection ratio
Input impedance common-mode
Input impedance differential mode
1.6
OUTPUT
Output voltage low
Output voltage high
Output saturation voltage, high/low
Output current drive
(2)
(3)
TA = 25°C, G = 5
0.15
0.2
V
A
TA = –40°C to 125°C, G = 5
0.15
0.2
V
B
A
TA = 25°C, G = 5
2.45
2.5
V
TA = –40°C to 125°C, G = 5
2.45
2.5
V
B
45/13
mV
C
±35
mA
A
mA
B
TA = 25°C, G = 5
TA = 25°C
±25
TA = –40°C to 125°C
±20
Input Offset Voltage Drift, Input Bias Current Drift, and Input Offset Current Drift are average values calculated by taking data at the end
points, computing the difference, and dividing by the temperature range.
Current is considered positive out of the pin.
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Product Folder Links: OPA835 OPA2835
9
OPA835, OPA2835
SLOS713I – JANUARY 2011 – REVISED AUGUST 2016
www.ti.com
Electrical Characteristics: VS = 2.7 V (continued)
at VS+ = +2.7 V, VS– = 0 V, VOUT = 1 VPP, RF = 0 Ω, RL = 2 kΩ, G = 1 V/V, input and output referenced to mid-supply, VIN_CM =
mid-supply – 0.5 V. TA = 25°C, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
TEST
LEVEL (1)
GAIN-SETTING RESISTORS (OPA835IRUN ONLY)
Resistor FB1 to FB2
DC resistance
2376
2400
2424
Ω
A
Resistor FB2 to FB3
DC resistance
1782
1800
1818
Ω
A
Resistor FB3 to FB4
DC resistance
594
600
606
Ω
A
Resistor tolerance
DC resistance
–1%
Resistor temperature coefficient
DC resistance
PPM
C
1%
< 10
A
POWER SUPPLY
Specified operating voltage
Quiescent operating current per
amplifier
2.5
TA = 25°C
175
TA = –40°C to 125°C
135
Power supply rejection (±PSRR)
88
245
5.5
V
B
340
µA
A
345
µA
B
dB
A
2.1
V
A
105
POWER DOWN (PIN MUST BE DRIVEN)
Enable voltage threshold
Specified on above VS–+ 2.1 V
1.4
Disable voltage threshold
Specified off below VS–+ 0.7 V
V
A
Power-down pin bias current
PD = 0.5 V
20
500
nA
A
Power-down quiescent current
PD = 0.5 V
0.5
1.5
µA
A
Turnon time delay
Time from PD = high to VOUT = 90% of final value
250
ns
C
Turnoff time delay
Time from PD = low to VOUT = 10% of original value
50
ns
C
0.7
1.4
7.7 Electrical Characteristics: VS = 5 V
at VS+ = +5 V, VS– = 0 V, VOUT = 2 VPP, RF = 0 Ω, RL = 2 kΩ, G = 1 V/V, input and output referenced to mid-supply. TA = 25°C,
unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
TEST
LEVEL (1)
MHz
C
AC PERFORMANCE
Small-signal bandwidth
VOUT = 100 mVPP, G = 1
56
VOUT = 100 mVPP, G = 2
22.5
VOUT = 100 mVPP, G = 5
7.4
VOUT = 100 mVPP, G = 10
3.1
Gain-bandwidth product
VOUT = 100 mVPP, G = 10
31
MHz
C
Large-signal bandwidth
VOUT = 2 VPP, G = 1
31
MHz
C
Bandwidth for 0.1-dB flatness
VOUT = 2 VPP, G = 2
14.5
MHz
C
Slew rate, rise
VOUT = 2-V Step, G = 2
160
V/µs
C
Slew rate, fall
VOUT = 2-V Step, G = 2
260
V/µs
C
Rise time
VOUT = 2-V Step, G = 2
10
ns
C
Fall time
VOUT = 2-V Step, G = 2
7
ns
C
Settling time to 1%, rise
VOUT = 2-V Step, G = 2
45
ns
C
Settling time to 1%, fall
VOUT = 2-V Step, G = 2
45
ns
C
Settling time to 0.1%, rise
VOUT = 2-V Step, G = 2
50
ns
C
Settling time to 0.1%, fall
VOUT = 2-V Step, G = 2
55
ns
C
Settling time to 0.01%, rise
VOUT = 2-V Step, G = 2
82
ns
C
Settling time to 0.01%, fall
VOUT = 2-V Step, G = 2
85
ns
C
Overshoot/Undershoot
VOUT = 2-V Step, G = 2
2.5%/1.5%
Second-order harmonic distortion
f = 10 kHz
–135
f = 100 kHz
–105
f = 1 MHz
(1)
10
C
dBc
C
–70
Test levels (all values set by characterization and simulation): (A) 100% tested at 25°C; over temperature limits by characterization and
simulation. (B) Not tested in production; limits set by characterization and simulation. (C) Typical value only for information.
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Copyright © 2011–2016, Texas Instruments Incorporated
Product Folder Links: OPA835 OPA2835
OPA835, OPA2835
www.ti.com
SLOS713I – JANUARY 2011 – REVISED AUGUST 2016
Electrical Characteristics: VS = 5 V (continued)
at VS+ = +5 V, VS– = 0 V, VOUT = 2 VPP, RF = 0 Ω, RL = 2 kΩ, G = 1 V/V, input and output referenced to mid-supply. TA = 25°C,
unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
TEST
LEVEL (1)
dBc
C
AC PERFORMANCE (continued)
Third-order harmonic distortion
f = 10 kHz
–139
f = 100 kHz
–122
f = 1 MHz
-73
Second-order intermodulation
distortion
f = 1 MHz, 200-kHz Tone Spacing,
VOUT Envelope = 2 VPP
–70
dBc
C
Third-order intermodulation distortion
f = 1 MHz, 200-kHz Tone Spacing,
VOUT Envelope = 2 VPP
–83
dBc
C
Signal-to-noise ratio, SNR
f = 1 kHz, VOUT = 1 VRMS, 22-kHz bandwidth
Total harmonic distortion, THD
f = 1 kHz, VOUT = 1 VRMS
Input voltage noise
f = 100 kHz
0.00015%
–116.4
0.00003%
f = 1 MHz
Current noise 1/f corner frequency
C
C
–130
Voltage noise 1/f corner frequency
Input current noise
dBc
dBc
C
9.3
nV/√Hz
C
147
Hz
C
0.45
pA/√Hz
C
14.7
kHz
C
195/135
ns
C
f = 100 kHz
0.028
Ω
C
f = 10 kHz
–120
dB
C
dB
A
Overdrive recovery time, over/under
Overdrive = 0.5 V
Closed-loop output impedance
Channel to channel crosstalk
(OPA2835)
DC PERFORMANCE
Open-loop voltage gain (AOL)
Input referred offset voltage
100
120
TA = 25°C
–500
±100
TA = 0°C to 70°C
–880
880
TA = –40°C to 85°C
–1040
1040
TA = –40°C to 125°C
–1850
1850
TA = 0°C to 70°C
Input offset voltage drift (2)
–8.5
±1.4
–9
±1.5
9
–13.5
±2.25
13.5
TA = 25°C
50
200
400
TA = 0°C to 70°C
47
410
TA = –40°C to 85°C
45
425
TA = –40°C to 125°C
45
530
TA = –40°C to 85°C
TA = –40°C to 125°C
Input bias current (3)
TA = 0°C to 70°C
Input bias current drift (2)
Input offset current
Input offset current drift (2)
(2)
(3)
500
A
µV
B
8.5
–1.4
±0.25
1.4
TA = –40°C to 85°C
–1.05
±0.175
1.05
TA = –40°C to 125°C
–1.1
±0.185
1.1
TA = 25°C
–100
±13
100
TA = 0°C to 70°C
–100
±13
100
TA = –40°C to 85°C
–100
±13
100
TA = –40°C to 125°C
–100
±13
100
TA = 0°C to 70°C
–1.23
±0.205
1.23
TA = –40°C to 85°C
–0.94
±0.155
0.94
TA = –40°C to 125°C
–0.94
±0.155
0.94
µV/°C
B
A
nA
nA/°C
B
B
A
nA
nA/°C
B
B
Input Offset Voltage Drift, Input Bias Current Drift, and Input Offset Current Drift are average values calculated by taking data at the end
points, computing the difference, and dividing by the temperature range.
Current is considered positive out of the pin.
Submit Documentation Feedback
Copyright © 2011–2016, Texas Instruments Incorporated
Product Folder Links: OPA835 OPA2835
11
OPA835, OPA2835
SLOS713I – JANUARY 2011 – REVISED AUGUST 2016
www.ti.com
Electrical Characteristics: VS = 5 V (continued)
at VS+ = +5 V, VS– = 0 V, VOUT = 2 VPP, RF = 0 Ω, RL = 2 kΩ, G = 1 V/V, input and output referenced to mid-supply. TA = 25°C,
unless otherwise noted.
PARAMETER
CONDITIONS
MIN
UNIT
TEST
LEVEL (1)
0
V
A
0
V
B
TYP
MAX
TA = 25°C, < 3-dB degradation in CMRR limit
–0.2
TA = –40°C to 125°C, < 3-dB degradation in CMRR limit
–0.2
INPUT
Common-mode input range low
Common-mode input range high
TA = 25°C, < 3-dB degradation in CMRR limit
3.8
3.9
V
A
TA = –40°C to 125°C, < 3-dB degradation in CMRR limit
3.8
3.9
V
B
91
113
dB
A
200 || 1.2
kΩ || pF
C
200 || 1
kΩ || pF
C
Common-mode rejection ratio
Input impedance common-mode
Input impedance differential mode
OUTPUT
Output voltage low
Output voltage high
Output saturation voltage, high/low
Output current drive
TA = 25°C, G = 5
0.15
0.2
V
A
TA = –40°C to 125°C, G = 5
0.15
0.2
V
B
TA = 25°C, G = 5
4.75
4.8
V
A
TA = –40°C to 125°C, G = 5
4.75
4.8
V
B
70/25
mV
C
±40
mA
A
mA
B
TA = 25°C, G = 5
TA = 25°C
±30
TA = –40°C to 125°C
±25
GAIN-SETTING RESISTORS (OPA835IRUN ONLY)
Resistor FB1 to FB2
DC resistance
2376
2400
2424
Ω
A
Resistor FB2 to FB3
DC resistance
1782
1800
1818
Ω
A
Resistor FB3 to FB4
DC resistance
594
600
606
Ω
A
Resistor tolerance
DC resistance
–1%
Resistor temperature coefficient
DC resistance
PPM
C
1%
692
-600
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