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OPT8241
SBAS704B – JUNE 2015 – REVISED OCTOBER 2015
OPT8241 3D Time-of-Flight Sensor
1 Features
2 Applications
•
•
1
•
•
•
•
•
•
•
•
•
Imaging Array:
– 320 × 240 Array
– 1/3” Optical Format
– Pixel Pitch: 15 µm
– Up to 150 Frames per Second
Optical Properties:
– Responsivity: 0.35 A/W at 850 nm
– Demodulation Contrast: 45% at 50 MHz
– Demodulation Frequency: 10 MHz to 100 MHz
Output Data Format:
– 12-Bit Phase Correlation Data
– 4-Bit Common-Mode (Ambient)
Chipset Interface:
– Compatible with TI's Time-of-Flight Controller
OPT9221
Sensor Output Interface:
– CMOS Data Interface (50-MHz DDR, 16-Lane
Data, Clock and Frame Markers)
– LVDS:
– 600 Mbps, 3 Data Pairs
– 1-LVDS Bit Clock Pair, 1-LVDS Sample
Clock Pair
Timing Generator (TG):
– Addressing Engine with Programmable Region
of Interest (ROI)
– Modulation Control
– De-Aliasing
– Master, Slave Sync Operation
I2C Slave Interface for Control
Power Supply:
– 3.3-V I/O, Analog
– 1.8-V Analog, Digital, I/O
– 1.5-V Demodulation (Typical)
Optimized Optical Package (COG-78):
– 8.757 mm × 7.859 mm × 0.7 mm
– Integrated Optical Band-Pass Filter
(830 nm to 867 nm)
– Optical Fiducials for Easy Alignment
Operating Temperature: 0°C to 70°C
Depth Sensing:
– Location and Proximity Sensing
– 3D Scanning
– 3D Machine Vision
– Security and Surveillance
– Gesture Controls
– Augmented and Virtual Reality
3 Description
The OPT8241 time-of-flight (ToF) sensor is part of
the TI 3D ToF image sensor family. The device
combines ToF sensing with an optimally-designed
analog-to-digital converter (ADC) and a versatile,
programmable timing generator (TG). The device
offers quarter video graphics array (QVGA 320 x 240)
resolution data at frame rates up to 150 frames per
second (600 readouts per second).
The built-in TG controls the reset, modulation,
readout,
and
digitization
sequence.
The
programmability of the TG offers flexibility to optimize
for various depth-sensing performance metrics (such
as power, motion robustness, signal-to-noise ratio,
and ambient cancellation).
Device Information(1)
PART NUMBER
OPT8241
PACKAGE
BODY SIZE (NOM)
COG (78)
7.859 mm × 8.757 mm
(1) For all available packages, see the package option addendum
at the end of the data sheet.
Block Diagram
OPT8241
ILLUM_P
ILLUM_N
ILLUM_EN
DMIX0,
DMIX1
Modulation Block
CLK Generator
Mix Drivers
CLK,
CTRL
MCLK
Row
Sensor Core
Reset
Column
Analog
Timing Generator
Addressing
Engine
CLK,
CTRL
Analog Processing
VD_IN
Analog
CLK,
CTRL
CLK,
CTRL
VD_FR
VD_QD
VD_SF
HD_QD
Temperature
Sensor
ADC
REG
I2C
Digital
Serializer
Output Block
LVDS
CMOS Data
CLKOUT
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
OPT8241
SBAS704B – JUNE 2015 – REVISED OCTOBER 2015
www.ti.com
Table of Contents
1
2
3
4
5
6
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
7
1
1
1
2
3
6
Absolute Maximum Ratings ...................................... 6
ESD Ratings.............................................................. 6
Recommended Operating Conditions....................... 6
Thermal Information .................................................. 7
Electrical Characteristics........................................... 7
Timing Requirements ................................................ 8
Switching Characteristics .......................................... 8
Optical Characteristics .............................................. 9
Typical Characteristics ............................................ 10
Detailed Description ............................................ 11
7.1 Overview ................................................................. 11
7.2 Functional Block Diagram ....................................... 11
7.3 Feature Description................................................. 12
7.4 Device Functional Modes........................................ 13
7.5 Programming .......................................................... 13
8
Application and Implementation ........................ 14
8.1 Application Information............................................ 14
8.2 Typical Applications ................................................ 15
9 Power Supply Recommendations...................... 24
10 Layout................................................................... 24
10.1 Layout Guidelines ................................................. 24
10.2 Layout Example .................................................... 26
10.3 Mechanical Assembly Guidelines ......................... 27
11 Device and Documentation Support ................. 28
11.1
11.2
11.3
11.4
11.5
Documentation Support ........................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
28
28
28
28
28
12 Mechanical, Packaging, and Orderable
Information ........................................................... 28
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (June 2015) to Revision B
Page
•
Changed equations to correct format throughout document ................................................................................................. 1
•
Changed name of Function column in Pin Functions table ................................................................................................... 4
•
Changed SCL and SDATA pin descriptions in Pin Functions table ...................................................................................... 5
•
Added parameter names to Sensor section of Electrical Characteristics table .................................................................... 7
•
Changed depth resolution description in Table 5 ................................................................................................................ 21
Changes from Original (June 2015) to Revision A
•
2
Page
Released to production........................................................................................................................................................... 1
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SBAS704B – JUNE 2015 – REVISED OCTOBER 2015
5 Pin Configuration and Functions
NBN Package
COG-78
Top View (Representative, Not to Scale)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
A
NC
GPO[0]
SDATA
GND
VMIXH
VMIXH
GND
GND
VMIXH
VMIXH
GND
ILLUM_P
ILLUM_N
DVDDH
GND
ILLUM_
EN
AVDDH
AVDD_
PLL
NC
B
GPO[1]
SCLK
SUB_
BIAS
MCLK
C
VD_IN
RSTZ
NC
DEMOD_
CLK
D
HD_QD
AVDD
RFU
TP2
E
VD_QD
AVSS
PVDD
QPORT
F
VD_FR
REFM
AVSS_
PLL
IOVDD
G
IOVSS
REFP
AVDD
DVSS
H
IOVDD
AVSS
AVSS
DVDD
J
CMOS[14]
VD_SF
TP1
SUM_M
K
CMOS[13]
CMOS[15]
SUM_P
DIFF1_M
L
CMOS[12]
CMOS[11]
DIFF1_P
DCLKM
M
NC
CMOS[10]
CMOS[9]
CMOS[8]
CLKOUT
CMOS[7]
CMOS[6]
CMOS[5]
CMOS[4]
CMOS[3]
CMOS[2]
CMOS[1]
CMOS[0]
PCLK_P
PCLK_M
DIFF0_P
DIFF0_M
DCLKP
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3
OPT8241
SBAS704B – JUNE 2015 – REVISED OCTOBER 2015
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Pin Functions
PIN
NAME
AVDD
AVDD_PLL
AVDDH
DESCRIPTION
NO.
FUNCTION
I/O BANK
D3, G17
Power
—
1.8-V analog VDD
A18
Power
—
1.8-V PLL VDD
A17
Power
—
3.3-V analog VDD
E3, H3, H17
GND
—
Analog ground
AVSS_PLL
F17
GND
—
PLL GND
CLKOUT
M5
O
IOVDD
Parallel data clock output
CMOS[0]
M13
O
IOVDD
Parallel data output bit 0
CMOS[1]
M12
O
IOVDD
Parallel data output bit 1
CMOS[2]
M11
O
IOVDD
Parallel data output bit 2
CMOS[3]
M10
O
IOVDD
Parallel data output bit 3
CMOS[4]
M9
O
IOVDD
Parallel data output bit 4
CMOS[5]
M8
O
IOVDD
Parallel data output bit 5
CMOS[6]
M7
O
IOVDD
Parallel data output bit 6
CMOS[7]
M6
O
IOVDD
Parallel data output bit 7
CMOS[8]
M4
O
IOVDD
Parallel data output bit 8
CMOS[9]
M3
O
IOVDD
Parallel data output bit 9
CMOS[10]
M2
O
IOVDD
Parallel data output bit 10
CMOS[11]
L3
O
IOVDD
Parallel data output bit 11
CMOS[12]
L1
O
IOVDD
Parallel data output bit 12
CMOS[13]
K1
O
IOVDD
Parallel data output bit 13
CMOS[14]
J1
O
IOVDD
Parallel data output bit 14
CMOS[15]
K3
O
IOVDD
Parallel data output bit 15
DCLKM
L19
O
LVDS
Negative LVDS bit clock
DCLKP
M18
O
LVDS
Positive LVDS bit clock
DEMOD_CLK
C19
I
IOVDD
Demodulation clock input (optional).
This pin has a weak internal pulldown resistor.
DIFF0_M
M17
O
LVDS
Negative LVDS DIFF0 data pin
DIFF0_P
M16
O
LVDS
Positive LVDS DIFF0 data pin
DIFF1_M
K19
O
LVDS
Negative LVDS DIFF1 data pin
Positive LVDS DIFF1 data pin
AVSS
DIFF1_P
L17
O
LVDS
DVDD
H19
Power
—
1.8-V digital VDD
DVDDH
A14
Power
—
3.3-V digital VDD
DVSS
G19
GND
—
Digital GND
GND
Ground
A4, A7, A8, A11, A15
GND
—
GPO[0]
A2
O
IOVDD
General-purpose output
GPO[1]
B1
O
IOVDD
General-purpose output
HD_QD
D1
O
IOVDD
Quad-frame line sync output
ILLUM_EN
A16
O
DVDDH
Illumination enable
ILLUM_N
A13
O
DVDDH
Illumination modulation signal; active low
Illumination modulation signal; active high
ILLUM_P
A12
O
DVDDH
IOVDD
H1, F19
Power
—
1.8-V to 3.3-V IOVDD
IOVSS
G1
GND
—
I/O GND
MCLK
B19
I
IOVDD
A1, A19, C17, M1,
M19
NC
—
M15
O
LVDS
NC
PCLK_M
4
Main clock input for TG.
This pin has a weak internal pulldown resistor.
No connection
Negative LVDS pixel clock
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Pin Functions (continued)
PIN
NAME
NO.
FUNCTION
I/O BANK
DESCRIPTION
PCLK_P
M14
O
LVDS
PVDD
E17
Power
—
Positive LVDS pixel clock
QPORT
E19
I/O
IOVDD
REFM
F3
Analog In
—
Connect REFM to GND
REFP
G3
Analog Out
—
ADC reference; connect a 10-nF capacitor close to REFM and
REFP.
RFU
D17
RFU
—
Reserved for future use
RSTZ
C3
I
IOVDD
Sensor reset input. This pin has a weak internal pullup resistor.
SCL
B3
I
IOVDD
Clock I2C slave interface
SDATA
A3
I/O
IOVDD
Data I2C slave interface
SUB_BIAS
B17
Power
—
SUM_M
J19
O
LVDS
Negative LVDS sum data
SUM_P
K17
O
LVDS
Positive LVDS sum data
TP1
J17
O
—
Debug pin 1, connect to a test pad on the board
TP2
D19
O
—
Debug pin 2, connect to a test pad on the board
VD_FR
F1
O
IOVDD
Frame sync output
VD_IN
C1
I
IOVDD
Frame sync input (optional)
VD_QD
E1
O
IOVDD
Quad-frame sync output
VD_SF
J3
O
—
Sub-frame sync output
VMIXH
A5, A6, A9, A10
Power
—
Mix driver power
3.3-V pixel VDD
Debug port.
Pullup with an external 1-kΩ resistor to IOVDD instead.
Substrate bias
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
UNIT
IOVDD
Digital I/O supply
–0.3
4.0
V
AVDDH
Analog supply
–0.3
4.0
V
DVDDH
Digital I/O supply
–0.3
4.0
V
PVDD
Pixel supply
–0.3
4.0
V
AVDD
Analog supply
–0.3
2.2
V
VMIXH
Mix supply
–0.3
2.5
V
DVDD
Digital supply
–0.3
2.2
V
AVDD_PLL
PLL supply
–0.3
2.2
V
VI
Input voltage at input pins
–0.3
VCC + 0.3 (2)
V
TJ
Operating junction temperature
0
125
°C
Tstg
Storage temperature
–40
125
°C
(1)
(2)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
VCC refers to the I/O bank voltage.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
±1000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±250
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
IOVDD
Digital I/O supply
1.7
1.8 to 3.3
3.6
V
AVDDH
Analog supply
3.0
3.3
3.6
V
DVDDH
Digital I/O supply
3.0
3.3
3.6
V
PVDD
Pixel supply
3.0
3.3
3.6
V
AVDD
Analog supply
1.7
1.8
1.9
V
VMIXH
Mix supply
1.4
1.5
2.0
V
DVDD
Digital supply
1.7
1.8
1.9
V
AVDD_PLL
PLL supply
1.7
1.8
1.9
V
TA
Operating ambient temperature
70
°C
6
0
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6.4 Thermal Information
OPT8241
THERMAL METRIC (1)
NBN (COG)
UNIT
78 PINS
Without underfill
79.2
°C/W
With underfill
41.0
°C/W
18.6
°C/W
51.0
°C/W
Junction-to-top characterization parameter
6.3
°C/W
Junction-to-board characterization parameter
51.1
°C/W
Junction-to-case (bottom) thermal resistance
18.6
°C/W
RθJA
Junction-to-ambient thermal resistance
RθJC(top)
Junction-to-case (top) thermal resistance
RθJB
Junction-to-board thermal resistance
ψJT
ψJB
RθJC(bot)
(1)
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
6.5 Electrical Characteristics
All specifications at TA = 25°C, VAVDDH = 3.3 V, VAVDD = 1.8 V, VVMIXH = 1.5 V, VDVDD = 1.8 V, VDVDDH = 3.3 V, VPVDD = 3.3 V,
VSUB_BIAS = 0 V, integration duty cycle = 10%, system clock frequency = 48 MHz, modulation frequency = 50 MHz, and 850
nm illumination, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SENSOR
V
Maximum rows
240
Rows
H
Maximum columns
320
Columns
PP
Pixel pitch
15
μm
9
mA
POWER (Normal Operation)
IAVDD_PLL
PLL supply current
IAVDD
Analog supply current
IDVDDH
3.3-V digital supply current
IAVDDH
3.3-V analog supply current
IPVDD
Pixel VDD current
IVMIXH
IIOVDD
IDVDD
Demodulation current
Without dynamic power-down
40
With dynamic power-down
20
5
Without dynamic power-down
17
With dynamic power-down
7
10% integration duty cycle
70
100% integration duty cycle
600
2
I/O supply current (CMOS mode)
20
I/O supply current (LVDS mode)
2
Digital supply current
mA
mA
mA
mA
mA
mA
45
mA
POWER (Standby)
IIOVDD
I/O supply current
0.7
mA
IAVDD_PLL
PLL supply current
0.3
mA
IAVDD
Analog supply current
0.3
mA
IDVDD
Digital supply current
0.6
mA
IDVDDH
3.3-V digital supply current
1.1
mA
IAVDDH
3.3-V analog supply current
0.2
mA
IVMIXH
Demodulation current
0
mA
IPVDD
Pixel VDD current
0
mA
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Electrical Characteristics (continued)
All specifications at TA = 25°C, VAVDDH = 3.3 V, VAVDD = 1.8 V, VVMIXH = 1.5 V, VDVDD = 1.8 V, VDVDDH = 3.3 V, VPVDD = 3.3 V,
VSUB_BIAS = 0 V, integration duty cycle = 10%, system clock frequency = 48 MHz, modulation frequency = 50 MHz, and 850
nm illumination, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
CMOS I/Os
VIH
VIL
Input low-level threshold
VOH
Output high level
VOL
Output Low Level
II
Input pin leakage current
CI
Input capacitance
IOH
0.3 × VCC
V
(1)
IOH = –2 mA
VCC (1) – 0.45
IOH = –8 mA
VCC (1) – 0.5
V
V
IOL = 2 mA
0.35
IOL = 8 mA
0.65
Pins with pullup, pulldown resistor
±50
Pins without pullup, pulldown
resistor
±10
V
µA
5
pF
10
Output current
IOL
(1)
0.7 × VCC (1)
Input high-level threshold
mA
10
VCC is equal to IOVDD or DVDDH, based on the I/O bank listed in the Pin Functions table.
6.6 Timing Requirements
MIN
NOM
MAX
MCLK duty cycle
48%
52%
MCLK frequency
12
50
VD_IN pulse duration
UNIT
MHz
2 × MCLK period
ns
RTSZ low pulse duration (reset)
100
ns
6.7 Switching Characteristics
over operating free-air temperature range (unless otherwise noted); VDVDD = 1.8 V, VDVDDH = 3.3 V, and VIOVDD = 1.8 V
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
DDR LVDS MODE
tSU
Data setup time
Data valid to zero crossing of DCLKP, DCLKM
0.48
ns
tH
Data hold time
Zero crossing of DCLKP, DCLKM to data becoming invalid
0.54
ns
tFALL, tRISE
Data fall time, data rise time
Rise time measured from –100 mV to +100 mV
0.35
ns
tCLKRISE,
tCLKFALL
Output clock rise time,
output clock fall time
Rise time measured from –100 mV to +100 mV
0.35
ns
PARALLEL CMOS MODE
tSU
Data setup time
Data valid to zero crossing of CLKOUT
1.5
ns
tH
Data hold time
Zero crossing of CLKOUT to data becoming invalid
3.5
ns
tFALL, tRISE
Data fall time, data rise time
Rise time measured from 30% to 70% of IOVDD
2.5
ns
tCLKRISE,
tCLKFALL
Output clock rise time,
output clock fall time
Rise time measured from 30% to 70% of IOVDD
2.2
ns
8
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6.8 Optical Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
Glass side
AOI
MAX
Top
UNIT
Side
Passband
(50% relative transmittance (1))
0° incident angle
813 to 893
nm
30° incident angle
798 to 877
nm
Passband
(90% relative transmittance (1))
0° incident angle
830 to 881
nm
30° incident angle
838 to 867
Recommended angle of incidence
Maximum absolute transmittance
(1)
TYP
nm
0
35
Degrees
0° incident angle
87.34% at 863
nm
30° incident angle
81.89% at 855
nm
Relative transmittance is a ratio of transmittance to maximum absolute transmittance at the same angle of incidence.
DCLKM
Output Clock
DCLKP
tSU
Dn(1)
Output Data Pair
(1)
tH
tSU
tH
Dn+1(1)
Dn = bits D0, D2, D4, and so forth. Dn+1 = bits D1, D3, D5, and so forth.
Figure 1. LVDS Switching Diagram
Output Clock
CLKOUT
tSU
tH
tSU
tH
Output Data
CMOSn
(2)
Dn(1)
Dn(1)
Dn = bits D0, D1, D2, and so forth.
Figure 2. CMOS Switching Diagram
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6.9 Typical Characteristics
At VAVDDH = 3.3 V, VAVDD = 1.8 V, VVMIXH = 1.5 V, VDVDD = 1.8 V, VDVDDH = 3.3 V, VPVDD = 3.3 V, VSUB_BIAS = 0 V, and
integration duty cycle = 10%, unless otherwise noted.
40
1.4
1.2
ISUB_BIAS (mA)
Normalized IVMIXH
30
1
0.8
0.6
20
10
0.4
0
0.2
0
0
0.3
0.6
0.9
1.2
1.5
VVMIXH (V)
1.8
2.1
2.4
2.7
-10
-8
-7
-6
-5
-4
-3
VSUB_BIAS (V)
-2
-1
0
Normalized to VMIXH = 1.5 V
Figure 3. Normalized VMIXH Supply Current vs
VMIXH Supply Voltage
Figure 4. VSUB_BIAS Supply Current vs
VSUB_BIAS Supply Voltage
90
80
Incident Angle = 0 q
Incident Angle = 30 q
Transmitivity (%)
70
60
50
40
30
20
10
0
350
450
550
650
750
850
Light Wavelength (nm)
950
1050
Figure 5. Optical Filter Transitivity vs
Light Wavelength
10
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7 Detailed Description
7.1 Overview
The OPT8241 is a high-performance quarter video graphics array (QVGA) resolution, 3D sensor device that
senses depth information based on the time of flight (ToF) technique. The OPT8241 has a CMOS image sensor
core with an integrated analog-to-digital converter (ADC), an addressing engine for the sensor core, an lowvoltage differential signaling (LVDS) serializer, and an I2C slave device. The device supports configurable timings
to optimize power and performance.
The OPT8241 includes the following blocks:
• Timing generator (TG)
• Sensor core
• Addressing engine
• ADC and overload detection
• Modulation block
• Output block
• Temperature sensor
• I2C control interface
7.2 Functional Block Diagram
OPT8241
ILLUM_P
Modulation Block
DMIX0,
DMIX1
CLK Generator
Mix Drivers
MCLK
ILLUM_N
ILLUM_EN
CLK, CTRL
Sensor Core
Reset
Row
Column
Analog
Addressing Engine
CLK, CTRL
Timing Generator
Analog Processing
VD_IN
Analog
Temperature Sensor
CLK, CTRL
ADC
REG
CLK, CTRL
I2C
Digital
Serializer
VD_FR
VD_QD
LVDS
Output Block
VD_SF
CMOS Data
HD_QD
CLKOUT
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7.3 Feature Description
7.3.1 Output Block
The output block provides the output data, clock, and frame boundary signals. The positions of the following
frame boundary marker signals are programmable. Table 1 lists signals that can be used by the host processor
to reconstruct the frame.
Table 1. Output Frame Marker Signals
SIGNAL
TYPE
VD_FR
Output
DESCRIPTION
Frame sync
VD_SF
Output
Sub-frame sync
VD_QD
Output
Quad sync
HD_QD
Output
Row sync
7.3.1.1 Serializer and LVDS Output Interface
The sensor has an option for a serial LVDS interface. The digitized data from the ADCs are serialized and sent
on three LVDS data pairs and one LVDS pixel clock pair. The DIFF0, DIFF1 pairs provide the differential data
(A-B). The differential data for each pixel is 12 bits long. The pixel clock pair is 0 for the first six data bits and 1
for the next six data bits. The pixel clock can be used by the external host to identify the boundary of the 12-bit
data for each pixel. The LVDS waveforms are shown in Figure 6.
DCLKP, DCLKM
PCLK_P, PCLK_M
DIFFx_P, DIFFx_M
SUM_P, SUM_M
D11
D10
«
D5
D6
«
D1
D0
D11
Bits 11-0
Channel 0: A - B
DIFF0_P, DIFF0_M
Bits 11-0
Channel 1: A - B
DIFF1_P, DIFF1_M
SUM_P, SUM_M
Bits 11-8
Bits 7-4
Channel 0: A + B
Channel 1: A + B
Bits 3-0
0000
Figure 6. LVDS Output Waveforms
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7.3.1.2 Parallel CMOS Output Interface
The sensor has options for both serial and parallel data output interfaces. The output data on the parallel CMOS
interface toggles on both edges of the clock (DDR rate) with the output clock frequency being equal to the
system clock frequency. The CMOS parallel data waveforms are shown in Figure 7.
VD
HD
CLKOUT
(50 MHz)
CMOS[15:0]
Frame ID
Channel 1,
Pixel 1,
Row 1
CMOS[15:0]
Channel 1,
Pixel 1,
Row 2
Channel 2,
Pixel 1,
Row 1
CMOS[15:12]
CMOS[11:0]
A+B
A-B
Channel 2,
Pixel 1,
Row 2
Figure 7. CMOS Output waveforms
Following the VD start, the first sample set is a frame ID that denotes the quadrant (quad) number. The frame ID
format is given in Table 2.
Table 2. Frame ID Word Format
15
14
13
12
11
10
9
8
0
1
0
1
0
1
0
1
7
6
5
4
SF[3:0]
3
2
1
0
Q[3:0]
Note that Q[3:0] is the quad number and SF[3:0] denotes the sub-frame number.
7.3.2 Temperature Sensor
The on-die temperature sensor can measure temperatures in the range of –25°C to 125°C. The temperature is
updated every 3 ms. The temperature value is stored in a register that can be read through the I2C interface.
7.4 Device Functional Modes
All OPT8241 control commands are directed through the OPT9221 time-of-flight controller. For more details on
the functional modes of the chipset, see the OPT9221 datasheet.
7.5 Programming
The device registers are programmed by the OPT9221 time-of-flight controller. Therefore, in a typical system, the
I2C interface is connected to the OPT9221 sensor control I2C bus; see the OPT9221 datasheet for more details.
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
ToF cameras provide the complete depth map of a scene. In contrast with the scanning type light detection and
ranging (LIDAR) systems, the depth map of the entire scene is captured at the same instant with an array of ToF
pixels. A broad classification of applications for a 3D camera include:
• Presence detection,
• Object location,
• Movement detection, and
• 3D scanning.
The OPT8241 ToF sensor, along with TI's OPT9221 ToF controller, forms a two-chip solution for creating a 3D
camera. The block diagram of a complete 3D ToF camera implementation using the OPT8241 is shown in
Figure 8.
Illumination
Optics
Illumination
Modulation
Scene
DDR
Timing Generation
+
ADC
Computation
(OPT9221)
Depth Data
Pixel Array
Lens
OPT8241
Figure 8. 3D ToF Camera
The TI ToF estimator tool can be used to estimate the performance of a ToF camera with various configurations.
The estimator allows control of the following parameters:
• Depth resolution
• 2D resolution (number of pixels)
• Distance range
• Frame rate
• Field of view (FoV)
• Ambient light (in watts × nm × m2 around the sensor filter bandwidth)
• Reflectivity of the objects
For more details on how to choose the above parameters, see the white paper on the ToF system design.
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8.2 Typical Applications
8.2.1 Presence Detection for Industrial Safety
Processing 3D information and a separate foreground from the background is computationally less intensive
when compared to using color information from a reg, green, blue (RGB) camera. 3D information can also be
used to extract the form of the object and classify the object detected as being a human, robot, vehicle, and so
forth, as shown in Figure 9.
Figure 9. Industrial Safety
8.2.1.1 Design Requirements
Table 3. Industrial Safety Requirements
SPECIFICATION
VALUE
UNITS
COMMENTS
Depth resolution
7.5
Percentage of distance
Temporal standard deviation of measured
distance without the use of any software filters
Frame rate
30
Frames per second
For reactions fast enough to trigger a machine
shut down
Field of view
74.4 × 59.3
Degrees (H × V)
Example only, requirements may vary
Minimum distance
1
Meters
Example only, requirements may vary
Maximum distance
5
Meters
Example only, requirements may vary
Minimum reflectivity of objects at which
the depth resolution is specified
40
Percentage
320 × 240
Rows x columns
Number of pixels
Assuming Lambertian reflection
Using a full array
2
Ambient light
Illumination source
0.1
W × nm × m around
850 nm
Laser
—
Low-intensity diffused sunlight
Laser + diffuser for diffusing light uniformly
through the scene
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8.2.1.2 Detailed Design Procedure
Using the TI ToF estimator tool, the ToF camera design requirements can be input and the power numbers
required for achieving the desired specifications can be obtained. The choice of inputs to the estimator tool is
explained in the following section.
8.2.1.2.1 Frequencies of Operation
The frequencies of operation are limited by the sensor bandwidth because the illumination source is a laser.
Frequencies around 75 MHz can be used to obtain a good demodulation figure of merit. Two frequencies are
used to implement de-aliasing and extend the unambiguous range because frequencies around 75 MHz provide
a very short unambiguous range. The two frequencies chosen for de-aliasing are 70 MHz and 80 MHz. The
unambiguous range is now given by Equation 1.
C
299792458.0 ms
Unambiguous Range
14.990 m
2 u GCD f1, f2 2 u GCD 70 MHz, 80 MHz
(1)
For the purpose of power requirement calculations, the average frequency of 75 MHz can be used in the
estimator tool.
8.2.1.2.2 Number of Sub-Frames and Quads
In this example, two sub-frames and six quads are used to obtain good dynamic range and account for wide
ranges of reflectivity and distance. Also, six quads (minimum) are required for implementing de-aliasing. A depth
resolution of 5% instead of the requirement of 7.5% is used as the resolution input to the estimator tool to allow
for margins resulting from the additional noise when using de-aliasing.
8.2.1.2.3 Field of View (FoV)
Field of view in the horizontal direction is 74.4 degrees. The diagonal FoV can be calculated using Equation 2.
ª5
§ 74.4 · º
FoV Diagonal 2 u tan1 « u tan ¨
¸ » | 87q
© 2 ¹¼
¬4
(2)
The ratio of 5/4 is used to represent the ratio of the diagonal length to the horizontal length of the sensor.
8.2.1.2.4 Lens
A lens with a 1/3” image circle must be chosen. The FoV of the lens must match the requirements (that is, the
FoV must be equal to 87 degrees, as calculated in Equation 2). A lower f.no is always better. For this example,
use an f.no of 1.2.
8.2.1.2.5 Integration Duty Cycle
An integration duty cycle of less than 50% is chosen to keep the sensor cool in an industrial housing with no
airflow. Choosing an even lower integration duty cycle can result in a marked increase in the peak illumination
power. Higher peak illumination power results in a higher number of illumination elements and, thus, an increase
in system cost.
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8.2.1.2.6 Design Summary
A screen shot of the system estimator tool is shown in Figure 10.
Figure 10. Screen Shot of the Estimator Tool
The illumination peak optical power of 1.98 W can be supplied using one high-power laser.
8.2.1.3 Application Curve
250
U = 10 %
U = 40 %
U = 100 %
225
Depth Resolution (mm)
200
175
150
125
100
75
50
25
0
1
1.4
1.8
2.2
2.6
3
3.4 3.8
Object Distance (m)
4.2
4.6
5
ρ represents object reflectivity
Figure 11. Example Industrial Safety Object Distance vs Depth Resolution
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8.2.2 People Counting and Locating
Locating and tracking people is a complex problem to solve using regular RGB cameras. With the additional
information of distance to each point in the scene, the algorithmic challenges become more surmountable, as
shown in Figure 9.
Figure 12. People Counting
8.2.2.1 Design Requirements
Table 4. People Counting Requirements
VALUE
UNITS
Depth resolution
SPECIFICATION
200
mm
Frame rate
15
Frames per second
100.0 × 83.6
Degrees (H × V)
Minimum distance
1
Meters
Example only, requirements may vary
Maximum distance
6
Meters
Example only, requirements may vary
Typical reflectivity of objects
40
Percentage
Field of view
Number of pixels
Ambient light
Illumination source
18
320 × 240
Rows × columns
0
W × nm × m2 around
850 nm
LED
—
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COMMENTS
For basic identification of shapes
Reasonable update rate for moderate object
movement speeds
Higher FoVs are better for more coverage but are
worse from a power requirement point of view
Assuming objects reflect very little infrared light
and assuming Lambertian reflection.
Using a full array
Indoor lighting conditions
LED + lens optics
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8.2.2.2 Detailed Design Procedure
Using the TI ToF estimator tool, the ToF camera design requirements can be input and the power numbers
required for achieving the desired specifications can be obtained by following the procedures discussed in this
section.
8.2.2.2.1 Frequencies of Operation
The frequencies of operation are limited by the LED bandwidth because the source of illumination is an LED.
Frequencies around 24 MHz can be used to obtain a good demodulation figure of merit if a fast-switching
infrared (IR) LED is used. The unambiguous range is given by Equation 3.
C
299792458.0 ms
Unambiguous Range
6.246 m
(3)
2u f
2 u 24 MHz
8.2.2.2.2 Number of Sub-Frames and Quads
In this example, one sub-frame and four quads are used to minimize the effects of the sensor reset noise.
8.2.2.2.3 Field of View (FoV)
Field of view in the horizontal direction is 74.4 degrees. The diagonal field of view can be calculated using
Equation 2.
ª5
§ 100.0 · º
FoV Diagonal 2 u tan1 « u tan ¨
¸ » | 112.3q
© 2 ¹¼
¬4
(4)
The ratio of 5/4 is used to represent the ratio of the diagonal length to the horizontal length of the sensor.
8.2.2.2.4 Lens
A lens with a 1/3” image circle must be chosen. The field of view of the lens must match the requirements (that
is, the FoV must be equal to 112.3 degrees, as calculated in Equation 4 ). A lower f.no is always better. For this
example, use an f.no of 1.2.
8.2.2.2.5 Integration Duty Cycle
An integration duty cycle of 60% is chosen to keep the peak illumination power requirements low. Higher peak
illumination power results in a higher number of illumination elements and, thus, an increase in system cost.
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8.2.2.2.6 Design Summary
A screen shot of the system estimator tool is shown in Figure 13.
Figure 13. Screen Shot of the Estimator Tool
The illumination peak optical power of 2.0 W can be supplied using a single high-power LED.
8.2.2.3 Application Curve
200
U = 10 %
U = 40 %
U = 100 %
180
Depth Resolution (mm)
160
140
120
100
80
60
40
20
0
1
1.5
2
2.5
3
3.5
4
4.5
Object Distance (m)
5
5.5
6
ρ represents object reflectivity
Figure 14. Example People-Counting Object Distance vs Depth Resolution
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8.2.3 People Locating and Identification
A skeletal structure can be used to classify identified shapes (such as humans, machines, pets, and so forth).
Other possibilities include classification of people (such as children and elderly). Even identification of humans by
matching the shape and movement to an existing database is possible. Such information can lend itself for use in
a variety of retail solutions, home safety, security, and public and private surveillance systems, as shown in
Figure 15.
Figure 15. People Counting and Identification
8.2.3.1 Design Requirements
Table 5. People Counting and Identification Requirements
SPECIFICATION
VALUE
UNITS
Depth resolution
1.5
Percentage of distance
Frame rate
15
Frame per second
100.0 x 83.6
Degrees (H X V)
Minimum distance
1
Meters
Example only, requirements may vary
Maximum distance
6
Meters
Example only, requirements may vary
Typical reflectivity of objects
40
Percentage
Field of view
No of pixels
Ambient light
Illumination source
320 x 240
Rows x columns
0
W × nm × m2 around
850 nm
Laser
—
COMMENTS
To obtain skeletal structure and gait accurately
and identify humans from other objects.
Reasonable update rate for moderate object
movement speeds
Higher FoVs are better for more coverage but
worse from a power requirement point of view
Assuming objects reflect very little infrared light
and assuming Lambertian reflection
Using full array
Indoor lighting conditions
Laser + diffuser for diffusing light uniformly
through the scene
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8.2.3.2 Detailed Design Procedure
Using the TI ToF estimator tool, the ToF camera design requirements can be input and the power numbers
required for achieving the desired specifications can be obtained. The choice of inputs to the estimator tool is
explained in the following section.
8.2.3.2.1 Frequencies of Operation
The frequencies of operation are limited by the sensor bandwidth because the illumination source is a laser.
Frequencies around 75 MHz can be used to obtain a good demodulation figure of merit. Two frequencies are
used to implement de-aliasing and extend the unambiguous range because frequencies around 75 MHz provide
a very short unambiguous range. The two frequencies chosen for de-aliasing are 70 MHz and 80 MHz. The
unambiguous range is now given by Equation 5.
C
299792458.0 ms
Unambiguous Range
14.990 m
2 u GCD f1, f2 2 u GCD 70 MHz, 80 MHz
(5)
For the purpose of power requirement calculations, the average frequency of 75 MHz can be used in the
estimator tool.
8.2.3.2.2 Number of Sub-Frames and Quads
In this example, one sub-frame and six quads are used to minimize the effects of the sensor reset noise. A depth
resolution of 1% instead of the requirement of 1.5% is used as the resolution input to the estimator tool to allow
for margins resulting from the additional noise when using de-aliasing.
8.2.3.2.3 Field of View (FoV)
Field of view in the horizontal direction is 74.4 degrees. The diagonal FoV can be calculated using Equation 6.
ª5
§ 100.0 · º
FoV Diagonal 2 u tan1 « u tan ¨
¸ » | 112.3q
© 2 ¹¼
¬4
(6)
The ratio of 5/4 is used to represent the ratio of the diagonal length to the horizontal length of the sensor.
8.2.3.2.4 Lens
A lens with a 1/3” image circle must be chosen. The FoV of the lens must match the requirements (that is, the
FoV must be equal to 112.3 degrees, as calculated in Equation 6). A lower f.no is always better. For this
example, use an f.no of 1.2.
8.2.3.2.5 Integration Duty Cycle
An integration duty cycle of 70% is chosen to keep the peak illumination power requirements low. Higher peak
illumination power results in a higher number of illumination elements and, thus, an increase in system cost.
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8.2.3.2.6 Design Summary
A screen shot of the system estimator tool is shown in Figure 16.
Figure 16. Screen Shot of the Estimator Tool
The illumination peak optical power of 3.54 W can be supplied using two high-power lasers.
8.2.3.3 Application Curve
60
U = 10 %
U = 40 %
U = 100 %
54
Depth Resolution (mm)
48
42
36
30
24
18
12
6
0
1
1.5
2
2.5
3
3.5
4
4.5
Object Distance (m)
5
5.5
6
ρ represents object reflectivity
Figure 17. Example People Identification Object Distance vs Depth Resolution
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9 Power Supply Recommendations
The sensor reset noise is sensitive to AVDDH and PVDD supplies. Therefore, linear regulators are
recommended for supplying power to the AVDD and PVDD supplies. DC-DC regulators can be used to supply
power to the rest of the supplies. Ripple voltage on the VMIX and the SUB_BIAS supplies must be kept at a
minimum (< 50 mV) to minimize phase noise resulting from differences between quads. The VMIX regulator must
have the bandwidth to supply surge current requirements within a short time of less than 10 µs after the
integration period begins because VMIX currents have a pulsed profile.
There is no strict order for the power-on or -off sequence. The VMIX supplies are recommended to be turned on
after all supplies have ramped to 90% of their respective values to avoid any power-up surges resulting from high
VMIX currents in a non-reset device state.
10 Layout
10.1 Layout Guidelines
10.1.1 MIX Supply Decapacitors
The VMIXH supply has a peak load current requirement of approximately 600 mA during the integration phase.
Moreover, a break-before-make circuit is used during the reversal of the demodulation polarity to avoid high
through currents. The break-before-make strategy results in a pulse with a drop and a subsequent rise of
demodulation current. The pulse duration is typically approximately 1 ns. In order to effectively support the rise in
currents, VMIXH decoupling capacitors must be placed very close to the package. Furthermore, use multiple
capacitors to reduce the effect of equivalent series inductance and resistance of the decoupling capacitors. Use
a combination of 10-nF and 1-nF capacitors per VMIXH pin. Using vias for routing the trace from decoupling
capacitors to the package pins must be avoided.
10.1.2 LVDS Transmitters
Each LVDS data output pair must be routed as a 100-Ω differential pair. When used with the OPT9221, 100-Ω
termination resistors must be placed close to the OPT9221.
10.1.3 Optical Centering
The lens mount placement on the printed circuit board (PCB) must be such that the lens optical center aligns
with the pixel array optical center. Note that the pixel array center is different from the package center.
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Layout Guidelines (continued)
10.1.4 Image Orientation
The sensor orientation for obtaining an upright image is shown in Figure 18.
Captured
Image
Sensor
Pin 1
T
Scene
Lens
240, 320
T
240, 0
L
L
R
R
Readout
0, 320
B
0, 0
B
When used with the OPT9221,
the default sensor readout direction is shown in grey.
Figure 18. Sensor Orientation for Obtaining an Upright Image
10.1.5 Thermal Considerations
In some applications, special care must be taken to avoid high sensor temperatures because demodulation
power is considerably high for the size of the package. Lower sensor temperatures help lower the thermal noise
floor as well as reduce the leakage currents. Two recommended methods for achieving better package to PCB
thermal coupling are listed below:
• Use a thermal pad below the sensor on both sides of the PCB with stitched vias.
• Use a compatible underfill.
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10.2 Layout Example
Figure 19. Example Layout
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10.3 Mechanical Assembly Guidelines
10.3.1 Board-Level Reliability
TI chip-on-glass products are designed and tested with underfill to ensure excellent board-level reliability in
intended applications. If a customer chooses to underfill a chip-on-glass product, following the guidelines below
is recommended to maximize the board level reliability:
• The underfill material must extend partially up the package edges. Underfill that ends at the bottom (ball side)
of the die degrades reliability.
• The underfill material must have a coefficient of thermal expansion (CTE) closely matched to the CTE of the
solder interconnect.
• The underfill material must have a glass transition temperature (Tg) above the expected maximum exposure
temperature.
Thermoset ME-525 is a good example of a compatible underfill.
10.3.2 Handling
To avoid dust particles on the sensor, the sensor tray must only be opened in a cleanroom facility. In case of
accidental exposure to dust, the recommended method to clean the sensors is to use an IPA solution with a
micro-fiber cloth swab with no lint. Do not handle the sensor edges with hard or abrasive materials (such as
metal tweezers) because the sensor package has a glass outline. Such handling may lead to cracks that can
negatively affect package reliability and image quality.
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11 Device and Documentation Support
11.1 Documentation Support
11.1.1 Related Documentation
OPT9221 Data Sheet, SBAS703
Introduction to the Time-of-Flight (ToF) System Design, SBAU219
11.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.3 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
11.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
OPT8241NBN
ACTIVE
COG
NBN
78
240
RoHS & Green
SNAGCU
Level-3-260C-168 HR
0 to 70
OPT8241
OPT8241NBNL
ACTIVE
COG
NBN
78
2400
RoHS & Green
SNAGCU
Level-3-260C-168 HR
0 to 70
OPT8241
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
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RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
