Not Recommended For New Designs
PCM2900B
PCM2902B
Burr-Brown Audio
www.ti.com ........................................................................................................................................................................................... SLES229 – DECEMBER 2008
STEREO AUDIO CODEC WITH USB INTERFACE,
SINGLE-ENDED ANALOG INPUT/OUTPUT, AND S/PDIF
FEATURES
1
• PCM2900B: Without S/PDIF
• PCM2902B: With S/PDIF
• On-Chip USB Interface:
– With Full-Speed Transceivers
– Fully Compliant with USB 2.0 Specification
– Certified by USB-IF
– Partially Programmable Descriptors (1)
– USB Adaptive Mode for Playback
– USB Asynchronous Mode for Record
– Bus Powered
• 16-Bit Delta-Sigma ADC and DAC
• Sampling Rate:
– DAC: 32, 44.1, 48 kHz
– ADC: 8, 11.025, 16, 22.05, 32, 44.1, 48 kHz
• On-Chip Clock Generator with Single 12-MHz
Clock Source
• Single Power Supply:
– 5 V Typical (VBUS)
• Stereo ADC:
– Analog Performance at VBUS = 5 V:
– THD+N = 0.01%
– SNR = 89 dB
– Dynamic Range = 89 dB
– Decimation Digital Filter:
– Passband Ripple = ±0.05 dB
– Stop-Band Attenuation = 65 dB
– Single-Ended Voltage Input
– Antialiasing Filter Included
– Digital HPF Included
•
234
(1)
The descriptor can be modified by changing a mask.
•
•
Stereo DAC:
– Analog Performance at VBUS = 5 V:
– THD+N = 0.005%
– SNR = 96 dB
– Dynamic Range = 93 dB
– Oversampling Digital Filter:
– Passband Ripple = ±0.1 dB
– Stop-Band Attenuation = –43 dB
– Single-Ended Voltage Output
– Analog LPF Included
Multifunctions:
– Human Interface Device (HID) Function:
– Volume and Mute Controls
– Suspend Flag Function
28-Pin SSOP Package
APPLICATIONS
•
•
•
•
USB Audio Speaker
USB Headset
USB Monitor
USB Audio Interface Box
DESCRIPTION
The PCM2900B/2902B is Texas Instruments'
single-chip, USB, stereo audio codec with a
USB-compliant full-speed protocol controller and
S/PDIF (PCM2902B only). The USB protocol
controller requires no software code, but the USB
descriptors can be modified in some areas (for
example, vendor ID and/or product ID). The
PCM2900B/2902B employs SpAct™ architecture, TI's
unique system that recovers the audio clock from
USB packet data. On-chip analog PLLs with SpAct
architecture enable playback and record with low
clock jitter as well as independent playback and
record sampling rates.
1
2
3
4
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SpAct is a trademark of Texas Instruments.
System Two, Audio Precision are trademarks of Audio Precision, Inc.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008, Texas Instruments Incorporated
Not Recommended For New Designs
PCM2900B
PCM2902B
SLES229 – DECEMBER 2008 ........................................................................................................................................................................................... www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PACKAGING/ORDERING INFORMATION (1)
SPECIFIED
TEMPERATURE
RANGE
PACKAGE
MARKING
PRODUCT
PACKAGE-LEAD
PACKAGE
DESIGNATOR
PCM2900BDB
SSOP-28
DB
–25°C to +85°C
PCM2900B
PCM2902BDB
SSOP-28
DB
–25°C to +85°C
PCM2902B
(1)
ORDERING
NUMBER
TRANSPORT
MEDIA,
QUANTITY
PCM2900BDB
Rails, 47
PCM2900BDBR
Tape and Reel,
2000
PCM2902BDB
Rails, 47
PCM2902BDBR
Tape and Reel,
2000
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
ABSOLUTE MAXIMUM RATINGS (1)
Over operating free-air temperature range (unless otherwise noted).
PARAMETER
VBUS
Supply voltage
PCM2900B/PCM2902B
UNIT
–0.3 to 6.5
V
Ground voltage differences, AGNDC, AGNDP, AGNDX, DGND, DGNDU
±0.1
V
SEL0, SEL1, TEST0 (DIN) (2)
–0.3 to 6.5
V
Digital input voltage
Analog input
voltage
D+, D–, HID0, HID1, HID2, XTI, XTO, TEST1 (DOUT) (2), SSPND
–0.3 to (VDDI + 0.3) < 4
V
VINL, VINR, VCOM, VOUTR, VOUTL
–0.3 to (VCCCI + 0.3) < 4
V
VCCCI, VCCP1I, VCCP2I, VCCXI, VDDI
–0.3 to 4
V
±10
mA
Input current (any pins except supplies)
Ambient temperature under bias
–40 to +125
°C
Tstg
Storage temperature
–55 to +150
°C
TJ
Junction temperature
+150
°C
Lead temperature (soldering, 5s)
+260
°C
Package temperature (IR reflow, peak)
+250
°C
(1)
(2)
2
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
TEST0 and TEST1 apply to the PCM2900B; DIN and DOUT apply to the PCM2902B.
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Not Recommended For New Designs
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PCM2902B
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ELECTRICAL CHARACTERISTICS
All specifications at TA = +25°C, VBUS = 5 V, fS = 44.1 kHz, fIN = 1 kHz, and 16-bit data, unless otherwise noted.
PCM2900B, PCM2902B
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
DIGITAL INPUT/OUTPUT
Host interface
Apply USB Revision 2.0, full speed
Audio data format
USB isochronous data format
INPUT LOGIC
D+, D–
VIH
High-level input
voltage
XTI, HID0, HID1,
and HID2
SEL0, SEL1
DIN (PCM2902B)
VIL
IIH
Low-level input
voltage
High-level input
voltage
2
3.3
2.52
3.3
2
5.25
2.52
5.25
D+, D–
0.8
XTI, HID0, HID1,
and HID2
0.9
SEL0, SEL1
0.8
DIN (PCM2902B)
0.9
D+, D–, XTI, SEL0,
SEL1
±10
HID0, HID1, and
HID2
VIN = 3.3 V
DIN (PCM2902B)
50
80
65
100
D+, D–, XTI, SEL0,
SEL1
IIL
Low-level input
voltage
HID0, HID1, and
HID2
VDC
VDC
µA
±10
VIN = 0 V
±10
DIN (PCM2902B)
µA
±10
OUTPUT LOGIC
D+, D–
VOH
High-level
output voltage
2.8
DOUT
(PCM2902B)
IOH = –4 mA
2.8
SSPND
IOH = –2 mA
2.8
VDC
D+, D–
VOL
Low-level output DOUT
voltage
(PCM2902B)
SSPND
0.3
IOL = 4 mA
0.5
IOL = 2 mA
0.5
VDC
CLOCK FREQUENCY
Input clock frequency, XTI
11.994
12
12.008
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MHz
3
Not Recommended For New Designs
PCM2900B
PCM2902B
SLES229 – DECEMBER 2008 ........................................................................................................................................................................................... www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
All specifications at TA = +25°C, VBUS = 5 V, fS = 44.1 kHz, fIN = 1 kHz, and 16-bit data, unless otherwise noted.
PCM2900B, PCM2902B
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ADC CHARACTERISTICS
Resolution
Audio data channel
8, 16
Bits
1, 2
Channel
ADC Clock Frequency
fS
Sampling frequency
8, 11.025, 16, 22.05, 32, 44.1, 48
kHz
ADC DC Accuracy
Gain mismatch, channel-to-channel
±1
±5
% of
FSR
Gain error
±2
±10
% of
FSR
Bipolar zero error
±0
% of
FSR
ADC Dynamic Performance (1)
VIN = –1 dB (2), VCCCI = 3.67 V
THD+N
Total harmonic distortion plus noise
0.01
VIN = –1 dB (3)
VIN = –60 dB
SNR
0.02
0.1
%
%
5
%
Dynamic range
A-weighted
81
89
dB
Signal-to-noise ratio
A-weighted
81
89
dB
80
85
dB
Input voltage
0.6 VCCCI
VPP
Center voltage
0.5 VCCCI
Channel separation
Analog Input
Input impedance
Antialiasing filter frequency response
–3 dB
fIN = 20 kHz
V
30
kΩ
150
kHz
–0.08
dB
ADC Digital Filter Performance
Passband
0.454 fS
Stop band
0.583 fS
Hz
Passband ripple
±0.05
Stop-band attenuation
td
HPF frequency response
(1)
(2)
(3)
4
65
Delay time
dB
dB
17.4/fS
–3 dB
Hz
0.078 fS/1000
s
Hz
fIN = 1 kHz, using a System Two™ audio measurement system by Audio Precision™ in the RMS mode with 20-kHz LPF, 400-Hz HPF in
calculation.
Using external voltage regulator for VCCCI (as shown in Figure 36 and Figure 37, using with REG103xA-A).
Using internal voltage regulator for VCCCI (as shown in Figure 38 and Figure 39).
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PCM2902B
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ELECTRICAL CHARACTERISTICS (continued)
All specifications at TA = +25°C, VBUS = 5 V, fS = 44.1 kHz, fIN = 1 kHz, and 16-bit data, unless otherwise noted.
PCM2900B, PCM2902B
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
DAC CHARACTERISTICS
Resolution
Audio data channel
8, 16
Bits
1, 2
Channel
DAC Clock Frequency
fS
Sampling frequency
32, 44.1, 48
kHz
DAC DC Accuracy
Gain mismatch channel-to-channel
±1
±5
% of
FSR
Gain error
±2
±10
% of
FSR
Bipolar zero error
±2
% of
FSR
DAC Dynamic Performance (4)
VOUT = 0 dB
THD+N
Total harmonic distortion plus noise
Dynamic range
EIAJ, A-weighted
SNR
Signal-to-noise ratio
EIAJ, A-weighted
0.005
VOUT = –60 dB
0.016
%
3
%
87
93
dB
90
96
dB
86
92
dB
Output voltage
0.6 VCCCI
VPP
Center voltage
0.5 VCCCI
V
Channel separation
Analog Output
VO
Load impedance
LPF frequency response
AC coupling
10
–3 dB
f = 20 kHz
kΩ
250
kHz
–0.03
dB
DAC Digital Filter Performance
Passband
Stop band
Hz
±0.1
dB
Hz
Passband ripple
Stop-band attenuation
td
0.445 fS
0.555 fS
–43
Delay time
dB
14.3 fS
s
POWER-SUPPLY REQUIREMENTS
VBUS
Voltage range
Supply current
PD
Power dissipation
VCCCI,
VCCP1I,
VCCP2I,
VCCXI,
VDDI
Internal power-supply voltage
4.35
ADC, DAC operation
5
5.25
56
67
Suspend mode (5)
250
ADC, DAC operation
280
Suspend mode (5)
1.25
3.1
3.3
VDC
mA
µA
352
3.5
mW
VDC
TEMPERATURE RANGE
Operating temperature range
θJA
(4)
(5)
–25
Thermal resistance
+85
100
°C
°C/W
fOUT = 1 kHz, using a System Two audio measurement system by Audio Precision in the RMS mode with 20-kHz LPF, 400-Hz HPF.
Under USB suspend state.
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5
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PCM2900B
PCM2902B
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PCM2900B PIN ASSIGNMENTS
DB PACKAGE
SSOP-28
(TOP VIEW)
D+
D–
VBUS
DGNDU
HID0
HID1
HID2
SEL0
SEL1
VCCCI
AGNDC
VINL
VINR
VCOM
1
2
3
4
5
6
7
8
9
10
11
12
13
14
PCM2900B
28
27
26
25
24
23
22
21
20
19
18
17
16
15
SSPND
VDDI
DGND
TEST1
TEST0
VCCXI
AGNDX
XTI
XTO
VCCP2I
AGNDP
VCCP1I
VOUTL
VOUTR
Table 1. PCM2900B TERMINAL FUNCTIONS
TERMINAL
NAME
NO.
I/O
AGNDC
11
–
Analog ground for codec
AGNDP
18
–
Analog ground for PLL
AGNDX
22
–
Analog ground for oscillator
D–
2
I/O
USB differential input/output minus (1)
D+
1
I/O
USB differential input/output plus (1)
DGND
26
–
Digital ground
DGNDU
4
–
Digital ground for USB transceiver
HID0
5
I
HID key state input (mute), active-high (2)
HID1
6
I
HID key state input (volume up), active-high (2)
HID2
7
I
HID key state input (volume down), active-high (2)
SEL0
8
I
Must be set to high (3)
SEL1
9
I
Must be set to high (3)
SSPND
28
O
Suspend flag, active-low (Low: suspend, High: operational)
TEST0
24
I
Test pin, must be connected to GND
TEST1
25
O
Test pin, must be left open
VBUS
3
–
Connect to USB power (VBUS)
VCCCI
10
–
Internal analog power supply for codec (4)
VCCP1I
17
–
Internal analog power supply for PLL (4)
VCCP2I
19
–
Internal analog power supply for PLL (4)
VCCXI
23
–
Internal analog power supply for oscillator (4)
VCOM
14
–
Common for ADC/DAC (VCCCI/2) (4)
VDDI
27
–
Internal digital power supply (4)
VINL
12
I
ADC analog input for L-channel
VINR
13
I
ADC analog input for R-channel
VOUTL
16
O
DAC analog output for L-channel
VOUTR
15
O
DAC analog output for R-channel
XTI
21
I
Crystal oscillator input
XTO
20
O
Crystal oscillator output
(1)
(2)
(3)
(4)
(5)
6
DESCRIPTION
(5)
LV-TTL level.
3.3-V CMOS-level input with internal pulldown. This pin informs the PC of serviceable control signals such as mute, volume up, or
volume down, which have no connection with the internal DAC or ADC directly. See the Interface #3 and End-Points sections.
TTL Schmitt trigger, 5-V tolerant.
Connect a decoupling capacitor to GND.
3.3-V CMOS-level input.
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Not Recommended For New Designs
PCM2900B
PCM2902B
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PCM2902B PIN ASSIGNMENTS
DB PACKAGE
SSOP-28
(TOP VIEW)
D+
D–
VBUS
DGNDU
HID0
HID1
HID2
SEL0
SEL1
VCCCI
AGNDC
VINL
VINR
VCOM
1
2
3
4
5
6
7
8
9
10
11
12
13
14
PCM2902B
28
27
26
25
24
23
22
21
20
19
18
17
16
15
SSPND
VDDI
DGND
DOUT
DIN
VCCXI
AGNDX
XTI
XTO
VCCP2I
AGNDP
VCCP1I
VOUTL
VOUTR
Table 2. PCM2902B TERMINAL FUNCTIONS
TERMINAL
NAME
NO.
I/O
AGNDC
11
–
Analog ground for codec
AGNDP
18
–
Analog ground for PLL
AGNDX
22
–
Analog ground for oscillator
D–
2
I/O
USB differential input/output minus (1)
D+
1
I/O
USB differential input/output plus (1)
DGND
26
–
Digital ground
DGNDU
4
–
Digital ground for USB transceiver
DIN
24
I
S/PDIF input (2)
DOUT
25
O
S/PDIF output
HID0
5
I
HID key state input (mute), active high (3)
HID1
6
I
HID key state input (volume up), active high (3)
HID2
7
I
HID key state input (volume down), active high (3)
SEL0
8
I
Must be set to high (4)
SEL1
9
I
Must be set to high (4)
SSPND
28
O
Suspend flag, active-low (Low: suspend, High: operational)
VBUS
3
–
Connect to USB power (VBUS)
VCCCI
10
–
Internal analog power supply for codec (5)
VCCP1I
17
–
Internal analog power supply for PLL (5)
VCCP2I
19
–
Internal analog power supply for PLL (5)
VCCXI
23
–
Internal analog power supply for oscillator (5)
VCOM
14
–
Common for ADC/DAC (VCCCI/2) (5)
VDDI
27
–
Internal digital power supply
VINL
12
I
ADC analog input for L-channel
VINR
13
I
ADC analog input for R-channel
VOUTL
16
O
DAC analog output for L-channel
VOUTR
15
O
DAC analog output for R-channel
XTI
21
I
Crystal oscillator input (6)
XTO
20
O
Crystal oscillator output
(1)
(2)
(3)
(4)
(5)
(6)
DESCRIPTION
LV-TTL level.
3.3-V CMOS-level input with internal pulldown, 5-V tolerant.
3.3-V CMOS-level input with internal pulldown. This pin informs the PC of serviceable control signals such as mute, volume up, or
volume down, which have no connection with the internal DAC or ADC directly. See the Interface #3 and End-Points sections.
TTL Schmitt trigger, 5-V tolerant.
Connect a decoupling capacitor to GND.
3.3-V CMOS-level input.
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PCM2900B
PCM2902B
SLES229 – DECEMBER 2008 ........................................................................................................................................................................................... www.ti.com
PCM2900B FUNCTIONAL BLOCK DIAGRAM
VCCCI
VCCP1I
VCCP2I
VCCXI
VDDI
AGNDC
AGNDP
AGNDX
DGND
DGNDU
5-V to 3.3-V Voltage Regulator
Power
Manager
TEST0
SSPND
TEST1
VBUS
VINL
ISO-In
End-Point
USB SIE
VINR
Analog
PLL
VCOM
Selector
Analog
PLL
XCVR
FIFO
ADC
D+
D–
Control
End-Point
SEL0
SEL1
VOUTL
FIFO
DAC
ISO-Out
End-Point
VOUTR
HID
End-Point
HID0
HID1
HID2
USB
Protocol
Controller
96 MHz
PLL (´8)
XTI
12 MHz
Tracker
(SpAct)
XTO
B0238-01
8
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PCM2902B
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PCM2902B FUNCTIONAL BLOCK DIAGRAM
VCCCI
VCCP1I
VCCP2I
VCCXI
VDDI
AGNDC
AGNDP
AGNDX
DGND
DGNDU
5-V to 3.3-V Voltage Regulator
Lock
DIN
Power
Manager
SSPND
S/PDIF Decoder
VBUS
VINL
ISO-In
End-Point
USB SIE
VINR
Analog
PLL
VCOM
Selector
Analog
PLL
XCVR
FIFO
ADC
D+
D–
Control
End-Point
SEL0
SEL1
VOUTL
FIFO
DAC
ISO-Out
End-Point
VOUTR
DOUT
HID0
HID1
HID2
HID
End-Point
S/PDIF Encoder
USB
Protocol
Controller
96 MHz
PLL (´8)
XTI
12 MHz
Tracker
(SpAct)
XTO
B0239-01
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PCM2900B
PCM2902B
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PCM2900B/2902B DIAGRAM OF ANALOG FRONT-END (RIGHT CHANNEL)
4.7 mF
+
VINR
30 kW
–
13
–
(+)
+
+
(–)
Delta-Sigma
Modulator
VCOM
14
+
(VCCCI/2)
10 mF
Reference
S0011-06
10
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PCM2902B
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TYPICAL CHARACTERISTICS: ADC
All specifications at TA = +25°C, VBUS = 5 V, fS = 44.1 kHz, fin = 1 kHz, 16-bit data, using REG 103xA-A, unless otherwise
noted.
TOTAL HARMONIC DISTORTION + NOISE at –1 dB
vs
FREE-AIR TEMPERATURE
DYNAMIC RANGE and SNR
vs
FREE-AIR TEMPERATURE
95
0.009
Dynamic Range and SNR − dB
THD+N − Total Harmonic Distortion + Noise − %
0.010
0.008
0.007
0.006
0.005
SNR
85
80
0.004
0.003
−50
−25
0
25
50
75
75
−50
100
TA − Free-Air Temperature − °C
−25
0
25
50
75
TA − Free-Air Temperature − °C
G001
Figure 1.
Figure 2.
TOTAL HARMONIC DISTORTION + NOISE at –1 dB
vs
SUPPLY VOLTAGE
DYNAMIC RANGE and SNR
vs
SUPPLY VOLTAGE
0.010
100
G002
95
0.009
Dynamic Range and SNR − dB
THD+N − Total Harmonic Distortion + Noise − %
Dynamic Range
90
0.008
0.007
0.006
0.005
Dynamic Range
90
SNR
85
80
0.004
0.003
4.0
4.5
5.0
VBUS − Supply Voltage − V
5.5
75
4.0
G003
Figure 3.
4.5
5.0
VBUS − Supply Voltage − V
5.5
G004
Figure 4.
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PCM2902B
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TYPICAL CHARACTERISTICS: ADC (continued)
All specifications at TA = +25°C, VBUS = 5 V, fS = 44.1 kHz, fin = 1 kHz, 16-bit data, using REG 103xA-A, unless otherwise
noted.
TOTAL HARMONIC DISTORTION + NOISE at –1 dB
vs
SAMPLING FREQUENCY
DYNAMIC RANGE AND SNR
vs
SAMPLING FREQUENCY
95
0.09
0.009
Dynamic Range and SNR − dB
THD+N − Total Harmonic Distortion + Noise − %
0.10
0.010
0.08
0.008
0.07
0.007
0.06
0.006
0.05
0.005
Dynamic Range
90
SNR
85
80
0.04
0.004
75
0.03
0.003
30
35
40
45
30
50
35
40
45
50
fS − Sampling Frequency − kHz
fS − Sampling Frequency − kHz
G006
G005
Figure 5.
Figure 6.
TYPICAL CHARACTERISTICS: DAC
All specifications at TA = +25°C, VBUS = 5 V, fS = 44.1 kHz, fin = 1 kHz, 16-bit data, using REG 103xA-A, unless otherwise
noted.
TOTAL HARMONIC DISTORTION + NOISE at 0 dB
vs
FREE-AIR TEMPERATURE
DYNAMIC RANGE AND SNR
vs
FREE-AIR TEMPERATURE
98
97
0.007
Dynamic Range and SNR − dB
THD+N − Total Harmonic Distortion + Noise − %
0.008
0.006
0.005
0.004
SNR
96
95
Dynamic Range
94
93
92
91
0.003
−50
−25
0
25
50
TA − Free-Air Temperature − °C
75
100
G007
90
−50
−25
Figure 7.
12
0
25
50
TA − Free-Air Temperature − °C
75
100
G008
Figure 8.
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TYPICAL CHARACTERISTICS: DAC (continued)
All specifications at TA = +25°C, VBUS = 5 V, fS = 44.1 kHz, fin = 1 kHz, 16-bit data, using REG 103xA-A, unless otherwise
noted.
TOTAL HARMONIC DISTORTION + NOISE at 0 dB
vs
SUPPLY VOLTAGE
DYNAMIC RANGE AND SNR
vs
SUPPLY VOLTAGE
98
97
0.007
Dynamic Range and SNR − dB
THD+N − Total Harmonic Distortion + Noise − %
0.008
0.006
0.005
0.004
95
Dynamic Range
94
93
92
91
0.003
4.0
4.5
5.0
90
4.0
5.5
VBUS − Supply Voltage − V
4.5
5.0
5.5
VBUS − Supply Voltage − V
G009
Figure 9.
Figure 10.
TOTAL HARMONIC DISTORTION + NOISE at 0 dB
vs
SAMPLING FREQUENCY
DYNAMIC RANGE AND SNR
vs
SAMPLING FREQUENCY
0.008
G010
98
97
0.007
Dynamic Range and SNR - dB
THD+N − Total Harmonic Distortion + Noise − %
SNR
96
0.006
0.005
0.004
SNR
96
95
94
93
Dynamic Range
92
91
90
0.003
30
35
40
45
fS − Sampling Frequency − kHz
30
50
G011
35
40
45
fS - Sampling Frequency - kHz
Figure 11.
50
G012
Figure 12.
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TYPICAL CHARACTERISTICS: SUPPLY CURRENT
All specifications at TA = +25°C, VBUS = 5 V, fS = 44.1 kHz, fin = 1 kHz, 16-bit data, using REG 103xA-A, unless otherwise
noted.
60
0.28
Operational
50
0.26
Suspend
40
0.24
0.22
30
20
4.00
4.25
4.50
4.75
5.00
5.25
ICC − Suspend Supply Current − mA
ICC − Operational Supply Current − mA
OPERATIONAL AND SUSPEND SUPPLY CURRENT
vs
SUPPLY VOLTAGE
70
0.30
0.20
5.50
VBUS − Supply Voltage − V
G013
Figure 13.
OPERATIONAL SUPPLY CURRENT
vs
SAMPLING FREQUENCY
SUSPEND SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
0.40
ICC - Suspend Supply Current - mA
ICC − Operational Supply Current − mA
70
60
50
ADC and DAC
40
30
20
30
35
40
45
fS − Sampling Frequency − kHz
50
G014
0.35
0.30
USB Spec Limit for Device (0.3 mA)
0.25
0.20
0.15
0.10
-40
0
-20
Figure 14.
14
20
40
60
TA - Free-Air Temperature - °C
80
100
G015
Figure 15.
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TYPICAL CHARACTERISTICS: ADC DIGITAL DECIMATION FILTER FREQUENCY RESPONSE
All specifications at TA = +25°C, VBUS = 5 V, fS = 44.1 kHz, fin = 1 kHz, 16-bit data, unless otherwise noted.
OVERALL CHARACTERISTICS
STOP-BAND ATTENUATION
0
0
−10
−20
−20
−40
Amplitude − dB
Amplitude − dB
−30
−60
−80
−100
−40
−50
−60
−70
−120
−80
−140
−90
−100
0.0
−160
0
8
16
24
0.4
0.6
0.8
G016
Figure 17.
PASSBAND RIPPLE
TRANSITION-BAND RESPONSE
0
0.0
−4
−0.2
−0.4
1.0
G017
Figure 16.
0.2
−8
−12
−16
−0.6
−0.8
0.0
0.2
Frequency [y fS]
Amplitude − dB
Amplitude − dB
Frequency [y fS]
32
0.1
0.2
0.3
Frequency [y fS]
0.4
0.5
−20
0.46
0.48
G018
Figure 18.
0.50
0.52
Frequency [y fS]
0.54
G019
Figure 19.
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TYPICAL CHARACTERISTICS: ADC DIGITAL HIGH-PASS FILTER FREQUENCY RESPONSE
All specifications at TA = +25°C, VBUS = 5 V, fS = 44.1 kHz, fin = 1 kHz, 16-bit data, unless otherwise noted.
STOP-BAND CHARACTERISTICS
PASSBAND CHARACTERISTICS
0
0.0
−10
−20
−0.2
Amplitude − dB
Amplitude − dB
−30
−40
−50
−60
−0.4
−0.6
−70
−0.8
−80
−90
−100
0.0
−1.0
0.1
0.2
0.3
Frequency [y fS/1000]
0
0.4
1
2
3
Frequency [y fS/1000]
G020
Figure 20.
4
G021
Figure 21.
TYPICAL CHARACTERISTICS: ADC ANALOG ANTIALIASING FILTER FREQUENCY RESPONSE
All specifications at TA = +25°C, VBUS = 5 V, fS = 44.1 kHz, fin = 1 kHz, 16-bit data, unless otherwise noted.
PASSBAND CHARACTERISTICS
0.0
−10
−0.2
Amplitude − dB
Amplitude − dB
STOP-BAND CHARACTERISTICS
0
−20
−30
−0.4
−0.6
−0.8
−40
−50
1
10
100
1k
10k
−1.0
0.01
0.1
1
100
G023
G022
Figure 22.
16
10
f − Frequency − kHz
f − Frequency − kHz
Figure 23.
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TYPICAL CHARACTERISTICS: DAC DIGITAL INTERPOLATION FILTER FREQUENCY
RESPONSE
All specifications at TA = +25°C, VBUS = 5 V, fS = 44.1 kHz, fin = 1 kHz, 16-bit data, unless otherwise noted.
STOP-BAND ATTENUATION
PASSBAND RIPPLE
0
0.2
−10
−20
0.0
Amplitude − dB
Amplitude − dB
−30
−40
−50
−60
−0.2
−0.4
−70
−80
−0.6
−90
−100
0
1
2
3
−0.8
0.0
4
Frequency [y fS]
0.1
0.2
0.3
0.4
Frequency [y fS]
G024
Figure 24.
0.5
G025
Figure 25.
TRANSITION-BAND RESPONSE
0
−2
−4
Amplitude − dB
−6
−8
−10
−12
−14
−16
−18
−20
0.46 0.47 0.48
0.49 0.50 0.51
0.52 0.53 0.54
Frequency [y fS]
G026
Figure 26.
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TYPICAL CHARACTERISTICS: DAC ANALOG FIR FILTER FREQUENCY RESPONSE
All specifications at TA = +25°C, VBUS = 5 V, fS = 44.1 kHz, fin = 1 kHz, 16-bit data, unless otherwise noted.
PASSBAND CHARACTERISTICS
0.2
−10
0.0
Amplitude − dB
Amplitude − dB
STOP-BAND CHARACTERISTICS
0
−20
−30
−40
−0.2
−0.4
−0.6
−50
0
8
16
24
Frequency [y fS]
−0.8
0.0
32
0.1
0.2
0.3
0.4
Frequency [y fS]
G027
Figure 27.
0.5
G028
Figure 28.
TYPICAL CHARACTERISTICS: DAC ANALOG LOW-PASS FILTER FREQUENCY RESPONSE
All specifications at TA = +25°C, VBUS = 5 V, fS = 44.1 kHz, fin = 1 kHz, 16-bit data, unless otherwise noted.
PASSBAND CHARACTERISTICS
0.0
−10
−0.2
Amplitude − dB
Amplitude − dB
STOP-BAND CHARACTERISTICS
0
−20
−30
−0.4
−0.6
−0.8
−40
−50
1
10
100
1k
10k
−1.0
0.01
0.1
1
100
G030
G029
Figure 29.
18
10
f − Frequency − kHz
f − Frequency − kHz
Figure 30.
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DETAILED DESCRIPTION
USB INTERFACE
Control data and audio data are transferred to the PCM2900B/2902B via D+ (pin 1) and D– (pin 2). All data
to/from the PCM2900B/2902B are transferred at full speed. The device descriptor contains the information
described in Table 3. The device descriptor can be modified on request; contact a Texas Instruments
representative for details.
Table 3. Device Description
USB revision
2.0 compliant
Device class
0x00 (device-defined interface level)
Device subclass
0x00 (not specified)
Device protocol
0x00 (not specified)
Max packet size for end-point 0
8 bytes
Vendor ID
0x08BB (default value, can be modified)
Product ID
0x29B0 / 0x29B2 (default value, can be modified)
Device release number
1.0 (0x0100)
Number of configurations
1
Vendor strings
String #1 (see Table 5)
Product strings
String #2 (see Table 5)
Serial number
Not supported
The configuration descriptor contains the information described in Table 4. The configuration descriptor can be
modified on request; contact a Texas Instruments representative for details.
Table 4. Configuration Descriptor
Interface
Four interfaces
Power attribute
0x80 (Bus powered, no remote
wakeup)
Max power
0x32 (100 mA. Default value, can be
modified)
The string descriptor contains the information described in Table 5. The string descriptor can be modified on
request; contact a Texas Instruments representative for details.
Table 5. String Descriptor
#0
0x0409
#1
Burr-Brown from TI (default value, can be modified)
#2
USB Audio CODEC (default value, can be modified)
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DEVICE CONFIGURATION
Figure 31 illustrates the USB audio function topology. The PCM2900B/2902B has four interfaces. Each interface
consists of alternative settings.
End-Point #0
Default End-Point
FU
Analog Out
End-Point #2
(IF #1)
IT
TID1
OT
TID2
Audio Streaming Interface
UID3
Analog In
End-Point #4
(IF #2)
IT
TID4
OT
TID5
Audio Streaming Interface
Standard Audio Control Interface (IF #0)
End-Point #5
(IF #3)
HID Interface
PCM2900B/2902B
M0024-03
Figure 31. USB Audio Function Topology
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Interface #0
Interface #0 is defined as the control interface. Alternative setting #0 is the only possible setting for interface #0.
Alternative setting #0 describes the standard audio control interface. The audio control interface consists of a
single terminal. The PCM2900B/2902B has the following five terminals:
• Input terminal (IT #1) for isochronous-out stream
• Output terminal (OT #2) for audio analog output
• Feature unit (FU #3) for DAC digital attenuator
• Input terminal (IT #4) for audio analog input
• Output terminal (OT #5) for isochronous-in stream
Input terminal #1 is defined as a USB stream (terminal type 0x0101). Input terminal #1 can accept two-channel
audio streams consisting of left and right channels. Output terminal #2 is defined as a speaker (terminal type
0x0301). Input terminal #4 is defined as a microphone (terminal type 0x0201). Output terminal #5 is defined as a
USB stream (terminal type 0x0101). Output terminal #5 can generate two-channel audio streams composed of
left and right channel data. Feature unit #3 supports the following sound control features:
• Volume control
• Mute control
The built-in digital volume controller can be manipulated by an audio class specific request from 0 dB to –64 dB
in 1-dB steps. Changes are made by incrementing or decrementing by one step (1 dB) for every 1/fS time interval
until the volume level has reached the requested value. Each channel can be set for different values. The master
volume control is not supported. A request to the master volume is stalled and ignored. The built-in digital mute
controller can be manipulated by an audio class specific request. A master mute control request is acceptable. A
request to an individual channel is stalled and ignored.
Interface #1
Interface #1 is the audio streaming data-out interface. Interface #1 has five alternative settings listed in Table 6.
Alternative setting #0 is the zero bandwidth setting. All other alternative settings are operational settings.
Table 6. Interface #1 Alternative Settings
ALTERNATIVE
SETTING
DATA FORMAT
00
TRANSFER
MODE
SAMPLING RATE
(kHz)
32, 44.1, 48
Zero Bandwidth
01
16-bit
Stereo
Twos complement (PCM)
Adaptive
02
16-bit
Mono
Twos complement (PCM)
Adaptive
32, 44.1, 48
03
8-bit
Stereo
Twos complement (PCM)
Adaptive
32, 44.1, 48
04
8-bit
Mono
Twos complement (PCM)
Adaptive
32, 44.1, 48
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Interface #2
Interface #2 is the audio streaming data-in interface. Interface #2 has the 19 alternative settings listed in Table 7.
Alternative setting #0 is the zero bandwidth setting. All other alternative settings are operational settings.
Table 7. Interface #2 Alternative Settings
ALTERNATIVE
SETTING
TRANSFER
MODE
DATA FORMAT
00
SAMPLING RATE
(kHz)
Zero Bandwidth
01
16-bit
Stereo
Twos complement (PCM)
Asynchronous
48
02
16-bit
Mono
Twos complement (PCM)
Asynchronous
48
03
16-bit
Stereo
Twos complement (PCM)
Asynchronous
44.1
04
16-bit
Mono
Twos complement (PCM)
Asynchronous
44.1
05
16-bit
Stereo
Twos complement (PCM)
Asynchronous
32
06
16-bit
Mono
Twos complement (PCM)
Asynchronous
32
07
16-bit
Stereo
Twos complement (PCM)
Asynchronous
22.05
08
16-bit
Mono
Twos complement (PCM)
Asynchronous
22.05
09
16-bit
Stereo
Twos complement (PCM)
Asynchronous
16
0A
16-bit
Mono
Twos complement (PCM)
Asynchronous
16
0B
8-bit
Stereo
Twos complement (PCM)
Asynchronous
16
0C
8-bit
Mono
Twos complement (PCM)
Asynchronous
16
0D
8-bit
Stereo
Twos complement (PCM)
Asynchronous
8
0E
8-bit
Mono
Twos complement (PCM)
Asynchronous
8
0F
16-bit
Stereo
Twos complement (PCM)
Synchronous
11.025
10
16-bit
Mono
Twos complement (PCM)
Synchronous
11.025
11
8-bit
Stereo
Twos complement (PCM)
Synchronous
11.025
12
8-bit
Mono
Twos complement (PCM)
Synchronous
11.025
Interface #3
Interface #3 is the interrupt data-in interface. Alternative setting #0 is the only possible setting for interface #3.
Interface #3 consists of the HID consumer control device and reports the status of these three key parameters:
• Mute (0xE209)
• Volume up (0xE909)
• Volume down (0xEA09)
End-Points
The PCM2900B/2902B has the following four end-points:
• Control end-point (EP #0)
• Isochronous-out audio data stream end-point (EP #2)
• Isochronous-in audio data stream end-point (EP #4)
• HID end-point (EP #5)
The control end-point is a default end-point. The control end-point is used to control all functions of the
PCM2900B/2902B by a standard USB request and an USB audio class specific request from the host. The
isochronous-out audio data stream end-point is an audio sink end-point, which receives the PCM audio data. The
isochronous-out audio data stream end-point accepts the adaptive transfer mode. The isochronous-in audio data
stream end-point is an audio source end-point, which transmits the PCM audio data. The isochronous-in audio
data stream end-point uses asynchronous transfer mode. The HID end-point is an interrupt-in end-point. HID
end-point reports HID0, HID1, and HID2 pin status every 32 ms.
The human interface device (HID) pins are defined as consumer control devices. The HID function is designed
as an independent end-point from both isochronous-in and -out end-points. Therefore, the result obtained from
the HID operation depends on the host software. Typically, the HID function is used as the primary audio-out
device.
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Clock and Reset
The PCM2900B/2902B requires a 12-MHz (±500 ppm) clock for the USB and audio functions, which can be
generated by a built-in crystal oscillator with a 12-MHz crystal resonator. The 12-MHz crystal resonator must be
connected to XTI (pin 21) and XTO (pin 20) with one high (1-MΩ) resistor and two small capacitors, the
capacitance of which depends on the load capacitance of the crystal resonator. The external clock can be
supplied from XTI (pin 21). If the external clock is supplied, XTO (pin 20) must be left open. Because there is no
clock-disabling signal, it is not recommended to use the external clock supply. SSPND (pin 28) is unable to use
clock disabling.
The PCM2900B/2902B has an internal power-on reset circuit, which triggers automatically when VBUS (pin 3)
exceeds 2.5 V typical (2.7 V to 2.2 V). Approximately 700 µs is required until internal reset release.
Digital Audio Interface (PCM2902B)
The PCM2902B employs both S/PDIF input and output. Isochronous-out data from the host are encoded to the
S/PDIF output and the DAC analog output. Input data are selected as either S/PDIF or ADC analog input. When
the device detects an S/PDIF input and successfully locks the received data, the isochronous-in transfer data
source is automatically selected from S/PDIF itself; otherwise, the data source is selected to ADC analog input.
This feature is a customer option. It is the responsibility of the user to implement this feature.
Supported Input/Output Data (PCM2902B)
The following data formats are accepted by the S/PDIF input and output. All other data formats are unable to use
S/PDIF.
• 48-kHz 16-bit stereo
• 44.1-kHz 16-bit stereo
• 32-kHz 16-bit stereo
Any mismatch of the sampling rate between the input S/PDIF signal and the host command is not acceptable.
Any mismatch of the data format between the input S/PDIF signal and the host command may cause unexpected
results, with the following exceptions:
• Recording in monaural format from stereo data input at the same data rate
• Recording in 8-bit format from 16-bit data input at the same data rate
A combination of these two conditions is not acceptable.
For playback, all possible data rate sources are converted to 16-bit stereo format at the same source data rate.
Channel Status Information (PCM2902B)
The channel status information is fixed as consumer application, PCM mode, copyright, and digital/digital
converter. All other bits are fixed as 0's except for the sample frequency, which is set automatically according to
the data received through the USB.
Copyright Management (PCM2902B)
Isochronous-in data are affected by the serial copy management system (SCMS). When receiving digital audio
data that are indicated as original data in the control bit, input digital audio data transfer to the host. If the data
are indicated as first generation or higher, the transferred data are routed to the analog input.
Digital audio data output is always encoded as original with SCMS control.
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INTERFACE SEQUENCE
Power On, Attach, and Playback Sequence
The PCM2900B/2902B is ready for setup when the reset sequence has finished and the USB bus is attached.
After connection has been established by setup, the PCM2900B/2902B is ready to accept USB audio data. While
waiting, the audio data (idle state) and analog output are set to bipolar zero (BPZ).
When receiving the audio data, the PCM2900B/2902B stores the first audio packet, which contains 1-ms audio
data, into the internal storage buffer. The PCM2900B/2902B starts playing the audio data when detecting the
next start of frame (SOF) packet, as illustrated in Figure 32.
5 V (Typ)
VBUS (Pin 3)
2.5 V (Typ)
0V
Bus Reset
st
1 Audio Data
Set Configuration
2
nd
Audio Data
Bus Idle
D+/D–
SOF
SOF
SOF
SSPND
BPZ
VOUTL
VOUTR
700 ms
Device Setup
Internal Reset
Ready for Setup
1 ms
Ready for Playback
T0055-02
Figure 32. Initial Sequence
Play, Stop, and Detach Sequence
When the host finishes or aborts playback, the PCM2900B/2902B stops playing after the last audio data have
played, as shown in Figure 33.
VBUS (Pin 3)
Audio Data
Audio Data
Last Audio Data
D+/D–
SOF
SOF
SOF
SOF
SOF
VOUTL
VOUTR
Detach
1 ms
T0056-02
Figure 33. Play, Stop, and Detach Sequence
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Record Sequence
The PCM2900B/2902B starts the audio capture into the internal memory after receiving the SET_INTERFACE
command, as shown in Figure 34.
Audio Data
SET_INTERFACE
IN Token
Audio Data
Audio Data
IN Token
IN Token
D+/D–
SOF
SOF
SOF
SOF
SOF
VINL
VINR
1 ms
T0259-01
Figure 34. Record Sequence
Suspend and Resume Sequence
The PCM2900B/2902B enters the suspend state after it sees a constant idle state on the USB bus
(approximately 5 ms), as shown in Figure 35. While the PCM2900B/2902B enters the suspend state, SSPND
flag (pin 28) is asserted. The PCM2900B/2902B wakes up immediately upon detecting a non-idle state on the
USB bus.
Idle
D+/D–
SSPND
Active
5 ms
Suspend
Active
T0057-02
Figure 35. Suspend and Resume Sequence
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25
Not Recommended For New Designs
PCM2900B
PCM2902B
SLES229 – DECEMBER 2008 ........................................................................................................................................................................................... www.ti.com
APPLICATION INFORMATION
PCM2900B TYPICAL CIRCUIT CONNECTION 1
Figure 36 illustrates a typical circuit connection for a high-performance application. The circuit illustrated is for
information only. The entire board design should be considered to meet the USB specification as a
USB-compliant product.
1.5 kW ´ 3
1.5 kW
PCM2900B
22 W
D+
22 W
D–
1 D+
SSPND
28
2
D–
VDDI
27
3
VBUS
DGND
26
4
DGNDU
TEST1
25
5
HID0
TEST0
24
6
HID1
VCCXI
23
7
HID2
AGNDX
22
8
SEL0
XTI
21
9
SEL1
XTO
20
10
VCCCI
VCCP2I
19
AGNDP
18
2.2 W
VBUS
1 mF
GND
IC1
IN OUT GND ADJ EN
5
3
4
1
2
C13
D1
C4
+
27 kW
C6
3.6 V–
3.85 V
+
12 MHz
C7
11
AGNDC
12
VINL
VCCP1I
17
13
VINR
VOUTL
16
14
VCOM
VOUTR
15
13 kW
+
C5
1 MW
C1
C9
C10
C3
C2
+
MUTE/
Power
Down
C8
+
C11
+
C12
LPF,
Amp
LPF,
Amp
S0264-03
NOTE: C1, C2: 10 µF
C3, C4, C7, C8, C13: 1 µF (These capacitors must be less than 2 µF.)
C5, C6: 10 pF to 33 pF (depending on crystal resonator)
C9, C10, C11, C12: The capacitance may vary depending on design.
IC1: REG103xA-A (TI) or equivalent. Analog performance may vary depending on IC1.
D1: Schottky barrier diode (VF ≤ 350 mV at 10 mA, IR ≤ 2 µA at 4 V)
Figure 36. Bus-Powered Configuration for High-Performance Application
26
Submit Documentation Feedback
Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): PCM2900B PCM2902B
Not Recommended For New Designs
PCM2900B
PCM2902B
www.ti.com ........................................................................................................................................................................................... SLES229 – DECEMBER 2008
PCM2902B TYPICAL CIRCUIT CONNECTION 1
Figure 37 illustrates a typical circuit connection for a high-performance application. The circuit illustrated is for
information only. The entire board design should be considered to meet the USB specification as a
USB-compliant product.
1.5 kW ´ 3
1.5 kW
PCM2902B
22 W
D+
22 W
D–
1 D+
SSPND
28
2
D–
VDDI
27
3
VBUS
DGND
26
4
DGNDU
DOUT
25
5
HID0
DIN
24
6
HID1
VCCXI
23
7
HID2
AGNDX
22
8
SEL0
XTI
21
9
SEL1
XTO
20
10
VCCCI
VCCP2I
19
AGNDP
18
2.2 W
VBUS
1 mF
GND
IC1
IN OUT GND ADJ EN
5
3
4
1
2
C13
D1
C4
+
27 kW
C6
3.6 V–
3.85 V
+
12 MHz
11
AGNDC
12
VINL
VCCP1I
17
13
VINR
VOUTL
16
14
VCOM
VOUTR
15
C2
+
MUTE/
Power
Down
C7
13 kW
+
C5
1 MW
C1
C9
C10
C3
C8
+
C11
+
C12
LPF,
Amp
LPF,
Amp
S0264-04
NOTE: C1, C2: 10 µF
C3, C4, C7, C8, C13: 1 µF (These capacitors must be less than 2 µF.)
C5, C6: 10 pF to 33 pF (depending on crystal resonator)
C9, C10, C11, C12: The capacitance may vary depending on design.
IC1: REG103xA-A (TI) or equivalent. Analog performance may vary depending on IC1.
D1: Schottky barrier diode (VF ≤ 350 mV at 10 mA, IR ≤ 2 µA at 4 V)
Figure 37. Bus-Powered Configuration for High-Performance Application
Submit Documentation Feedback
Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): PCM2900B PCM2902B
27
Not Recommended For New Designs
PCM2900B
PCM2902B
SLES229 – DECEMBER 2008 ........................................................................................................................................................................................... www.ti.com
PCM2900B TYPICAL CIRCUIT CONNECTION 2
Figure 38 illustrates a typical circuit connection for a simple application. The circuit illustrated is for information
only. The entire board design should be considered to meet the USB specification as a USB-compliant product.
1.5 kW ´ 4
PCM2900B
22 W
D+
22 W
D–
1 D+
SSPND
28
2
D–
VDDI
27
3
VBUS
DGND
26
4
DGNDU
TEST1
25
5
HID0
TEST0
24
6
HID1
VCCXI
23
7
HID2
AGNDX
22
8
SEL0
XTI
21
9
SEL1
XTO
20
10
VCCCI
VCCP2I
19
11
AGNDC
AGNDP
18
12
VINL
VCCP1I
17
13
VINR
VOUTL
16
14
VCOM
VOUTR
15
2.2 W
VBUS
1 mF
GND
C3
C4
C5
1 MW
C6
12 MHz
C1
+
C9
C10
+
+
C2
+
C7
MUTE/
Power
Down
C8
+
C11
+
C12
LPF,
Amp
LPF,
Amp
S0265-03
NOTE: C1, C2: 10 µF
C3, C4, C7, C8: 1 µF (These capacitors must be less than 2 µF.)
C5, C6: 10 pF to 33 pF (depending on crystal resonator)
C9, C10, C11, C12: The capacitance may vary depending on design.
In this case, the analog performance of the ADC may be degraded.
Figure 38. Bus-Powered Configuration
28
Submit Documentation Feedback
Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): PCM2900B PCM2902B
Not Recommended For New Designs
PCM2900B
PCM2902B
www.ti.com ........................................................................................................................................................................................... SLES229 – DECEMBER 2008
PCM2902B TYPICAL CIRCUIT CONNECTION 2
Figure 39 illustrates a typical circuit connection for a simple application. The circuit illustrated is for information
only. The emtire board design should be considered to meet the USB specification as a USB-compliant product.
1.5 kW ´ 4
PCM2902B
22 W
D+
22 W
D–
1 D+
SSPND
28
2
D–
VDDI
27
3
VBUS
DGND
26
4
DGNDU
DOUT
25
5
HID0
DIN
24
6
HID1
VCCXI
23
7
HID2
AGNDX
22
8
SEL0
XTI
21
9
SEL1
XTO
20
10
VCCCI
VCCP2I
19
11
AGNDC
AGNDP
18
12
VINL
VCCP1I
17
13
VINR
VOUTL
16
2.2 W
VBUS
1 mF
GND
C3
C4
C5
1 MW
C6
12 MHz
C1
+
C9
C10
+
+
C2
+
14
VCOM
VOUTR
15
C7
MUTE/
Power
Down
C8
+
C11
+
C12
LPF,
Amp
LPF,
Amp
S0265-04
NOTE: C1, C2: 10 µF
C3, C4, C7, C8: 1 µF (These capacitors must be less than 2 µF.)
C5, C6: 10 pF to 33 pF (depending on crystal resonator)
C9, C10, C11, C12: The capacitance may vary depending on design.
In this case, the analog performance of the ADC may be degraded.
Figure 39. Bus-Powered Configuration
OPERATING ENVIRONMENT
For current information on the PCM2900B/2902B operating environment, see the Updated Operating
Environments for PCM270X, PCM290X Applications application report, SLAA374.
Submit Documentation Feedback
Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): PCM2900B PCM2902B
29
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
PCM2900BDB
NRND
SSOP
DB
28
50
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-25 to 85
PCM2900B
PCM2900BDBR
NRND
SSOP
DB
28
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-25 to 85
PCM2900B
PCM2902BDB
NRND
SSOP
DB
28
50
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-25 to 85
PCM2902B
PCM2902BDBR
NRND
SSOP
DB
28
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-25 to 85
PCM2902B
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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