PCM78

® PCM78P 16-Bit Audio ANALOG-TO-DIGITAL CONVERTER FEATURES q LOW COST/HIGH PERFORMANCE 16-BIT AUDIO A/D CONVERTER q FAST 5µs MAX CONVERSION TIME (4µs typ) q VERY LOW THD+N ( typ –88dB at FS; max –82dB) q ±3V INPUT RANGE q TWO SERIAL OUTPUT MODES PROVIDE VERSATILE INTERFACING q COMPLETE WITH INTERNAL REFERENCE AND CLOCK IN 28-PIN PLASTIC DIP q ±5V TO ±15V SUPPLY RANGE (600mW Power Dissipation) APPLICATIONS q DSP DATA ACQUISITION q TEST INSTRUMENTATION q SAMPLING KEYBOARD SYNTHESIZERS q DIGITAL AUDIO TAPE q BROADCAST AUDIO PROCESSING q TELECOMMUNICATIONS DESCRIPTION The PCM78P is a low-cost 16-bit analog-to-digital converter which is specifically designed and tested for dynamic applications. It features very fast, low distortion performance (4µs/–88dB THD+N typical) and is complete with internal clock and reference circuitry. The PCM78P is packaged in a reliable, lowcost 28-pin plastic DIP and data output is available in user-selectable serial output formats. The PCM78P is ideal for digital audio tape (DAT) recorders. Many similar applications such as digital signal processing and telecom applications are equally well served by the PCM78P. The PCM78P uses a SAR technique. Analog and digital portions are efficiently partitioned into a highspeed, bipolar section and a low-power CMOS section. The PCM78P has been optimized for excellent dynamic performance and low cost. Audio Input 16-bit D/A Converter – Comp + Convert Command 16-bit SAR + Timing Control Internal Clock Circuit Serial Output 1 Serial Output 2 Clock Output Status External Clock International Airport Industrial Park • Mailing Address: PO Box 11400 • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706 Tel: (520) 746-1111 • Twx: 910-952-1111 • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 © 1989 Burr-Brown Corporation PDS-989A Printed in U.S.A. October, 1993 SPECIFICATIONS ELECTRICAL At TC = +25°C, +VDD = +5V, and ±VCC = ±12V, and one minute warm-up in convection environment, unless otherwise noted. PCM78P PARAMETER RESOLUTION INPUT/OUTPUT ANALOG INPUT Input Range Input Impedance DIGITAL INPUT/OUTPUT Logic Family Logic Level: VIH VIL VOH VOL Data Format Convert Command Pulse Width CONVERSION TIME DYNAMIC CHARACTERISTICS SIGNAL-TO-NOISE RATIO (SNR)(2) f = 1kHz (0dB) f = 10kHz (0dB) TOTAL HARMONIC DISTORTION(5) f = 1kHz (0dB) f = 19kHz (0dB) f = 10kHz (0dB) f = 90kHz (0dB) TOTAL HARMONIC DISTORTION + NOISE(6) f = 1kHz (0dB) f = 1kHz (–20dB) f = 1kHz (–60dB) f = 19kHz (0dB) f = 10kHz (0dB) f = 90kHz (0dB) TRANSFER CHARACTERISTICS ACCURACY Gain Error Bipolar Zero Error Differential Linearity Error Integral Linearity Error Missing Codes DRIFT Gain Bipolar Zero POWER SUPPLY SENSITIVITY +VCC –VCC +VDD POWER SUPPLY REQUIREMENTS Voltage Range: +VCC –VCC +VDD Current: +VCC –VCC +VDD Power Dissipation TEMPERATURE RANGE Specification Storage Operating 0 –50 –25 +70 +100 +85 °C °C °C +4.75 –4.75 +4.75 +VCC = +12V –VCC = –12V +VDD = +5V ±VCC = ±12V +15 –21 +7 575 +15.6 –15.6 +5.25 V V V mA mA mA mW 0° C to +70°C 0° C to +70°C ±2 ±20 ±0.002 ±0.003 None ±25 ±4 ±0.008 ±0.003 ±0.003 % mV % of FSR(7) % of FSR 14 Bits(8) ppm/°C ppm of FSR/°C %FSR/%V CC %FSR/%V CC %FSR/%V DD fS = 200kHz/TCONV = 4µs(3) BW = 20kHz BW = 100kHz fS = 200kHz/T CONV = 4µs BW = 20kHz BW = 20kHz BW = 100kHz BW = 100kHz fS = 200kHz/T CONV = 4µs BW = 20kHz BW = 20kHz BW = 20kHz BW = 20kHz BW = 100kHz BW = 100kHz 90 80 –91 –90 –90 –89 –88 –74 –34 –87 –82 –81 –82 –68 dB(4) dB dB dB dB dB dB dB dB dB dB dB –3 1.5 TTL Compatible CMOS +2 +5.5 0 +0.8 +2.4 +0.4 Serial BOB or BTC (1) Negative Edge 25 50 4 5 +3 V kΩ CONDITIONS MIN TYP MAX 16 UNITS Bits IIH = +40µA IIL = –100µA IOH = 2TTL Loads IOL = 2TTL Loads V V V V ns µs NOTES: (1) When convert command is high, converter is in a halt/reset mode. Actual conversion begins on negative edge. See detailed text on timing for convert command description when using external clock. (2) Ratio of Noise rms/Signal rms. (3) f = input frequency; fS = sample frequency (PCM78P and SHC702 in combination); BW = bandwidth of output (based on FFT or actual analog reconstruction using a 20kHz low-pass filter). (4) Referred to input signal level. (5) Ratio of Distortion rms/Signal rms. (6) Ratio of Distortion rms + Noise rms/Signal rms. (7) FSR: Full-Scale Range = 6Vp-p. (8) Typically no missing Codes at 14-bit resolution. ® PCM78 2 PIN ASSIGNMENTS PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 NAME Analog In –VCC MSB Adjust +VDD No Connection Comparator Common MSB BTC/BOB Select Status Clock Out R1C1 R2C2 SOUT2 +VDD SOUT1 External Clock Int/Ext Clock Select Short Cycle Convert Command SOUT2 Latch SOUT2 Clock Digital Common +VCC VPOT Reference Decouple Analog Common Reference Out Speed Up I/O I I I I — I O I O O I I O I O I I I I I I I I O I I O I DESCRIPTION Analog Signal Input (1.5kΩ impedance). Analog power supply (–5V to –15V). Internal adjustment point to allow adjustment of MSB major carry. Power connection for comparator (+5V). No internal connection. Comparator common connection. Connect to ground. Parallel output of bit 1 (MSB) inverted. Two’s complement (open) or straight binary (grounded) data output format selection. Output signal held high until conversion is complete. Internal clock output generated from RC network on pins 11 and 12 (also present when external clock is used lagging external clock by ~24ns and same duty cycle). RC connection point used to generate internal clock. Sets clock high time. See text for details. RC connection point used to generate internal clock. Sets clock low time. See text for details. Internal shift register containing the previous conversion result. (Alternate latched data output mode). Power connection for +5V logic supply. Primary real-time data output synchronized to clock out. External clock input point (internal clock must be disabled). Selects either internal or external clock mode (low = internal; open = external). Terminates conversion at less than 16 bits (open for 16-bit mode). See text for details. Starts conversion process (can optionally be generated internally). Latches previous conversion result for readout (must be issued with the SOUT2 clock to initiate latch and an internal convert command). Used to read out internally latched data from previous conversion. Digital grounding pin. Analog supply connection (+5V to +15V). Voltage output (~2.5V) for optional adjustment of MSB transition. Reference decoupling point. Analog grounding pin. 2V reference out. Should not be used except as shown in connection diagram. Connection point for a capacitor to speed reference settling. See text for details. NOTE: Analog and digital commons are connected internally. INPUT/OUTPUT RELATIONSHIPS DIGITAL OUTPUT ANALOG INPUT +2.999908V –3.000000V 0.000000V –0.000092V CONDITION + Full Scale –Full Scale Bipolar Zero Zero-1 LSB BTC 7FFF Hex 8000 Hex 0000 Hex FFFF Hex BOB FFFF Hex 0000 Hex 8000 Hex 7FFF Hex ABSOLUTE MAXIMUM RATINGS +VCC to Analog Common ......................................................... 0 to +16.5V –VCC to Analog Common ......................................................... 0 to –16.5V –VDD to Analog Common .............................................................. 0 to +7V Analog Common to Digital Common ................................................. ±0.5V Logic Inputs to Digital Common ................................. –0.3V to VDD + 0.5V Analog Inputs to Analog Common .................................................. ±16.5V Lead Temperature (soldering, 10s) ................................................ +300°C Stresses above these ratings may permanently damage the device. PACKAGE INFORMATION MODEL PCM78P PACKAGE 28-Pin Plastic DIP PACKAGE DRAWING NUMBER(1) 215 NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix D of Burr-Brown IC Data Book. The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. ® 3 PCM78 TYPICAL PERFORMANCE CURVES At TA = +25°C, VCC = ±15V, unless otherwise noted. BPZ ERROR vs TEMPERATURE 10mV 9mV 8mV BIPOLAR GAIN ERROR as % FSR 25°C; N = 33 UNITS 18 16 14 BPZ Error (mV) Number of Units 7mV 6mV 5mV 4mV 3mV 2mV 1mV 0 –25 0 25 Temperature (°C) 70 125 12 10 8 6 4 2 0 –0.35 –0.40 –0.45 –0.50 –0.55 –0.60 % FSR PSRR at +FS INPUT 0.012 0.010 0.008 0.006 0.004 0.008 0.012 –VCC 0.01 –VCC PSRR at –FS INPUT %/% %/% 0.002 0 –0.002 –0.004 –0.006 –0.008 –0.010 –25 +VCC 0.006 +VCC 0.004 VDD 0.002 0 VDD 0 25 Temperature (°C) 70 125 –25 0 25 Temperature (°C) 70 125 VREF vs TEMP 2.002 2.000 1.998 21 20 19 I SS vs SUPPLY VOLTAGE –VCC Current (mA) V REF (V) 1.996 1.994 1.992 1.99 1.988 –25 0 25 Temperature (°C) 70 125 18 17 16 15 14 4 6 8 10 12 14 16 Supply Voltage (V) +VCC ® PCM78 4 TYPICAL PERFORMANCE CURVES (CONT) At TA = +25°C, VCC = ±15V, unless otherwise noted. INTEGRAL NONLINEARITY at –25°C 7.00 6.00 5.00 4.00 1.40 1.20 1.00 DIFFERENTIAL NONLINEARITY at –25°C LSB 3.00 2.00 1.00 0.00 –1.00 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Major Carry Bit Number LSB 0.80 0.60 0.40 0.20 0.00 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Major Carry Bit Number INTEGRAL NONLINEARITY at 0°C 5.00 4.00 3.00 LSB LSB 1.40 1.20 1.00 0.80 0.60 0.40 0.20 0.00 DIFFERENTIAL NONLINEARITY at 0°C 2.00 1.00 0.00 –1.00 –2.00 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Major Carry Bit Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Major Carry Bit Number INTEGRAL NONLINEARITY at 25°C 5.00 4.00 3.00 1.40 1.20 1.00 DIFFERENTIAL NONLINEARITY at 25°C LSB 1.00 0.00 –1.00 –2.00 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Major Carry Bit Number LSB 2.00 0.80 0.60 0.40 0.20 0.00 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Major Carry Bit Number ® 5 PCM78 TYPICAL PERFORMANCE CURVES (CONT) At TA = +25°C, VCC = ±15V, unless otherwise noted. Histograms done with conversion time = 8µs. INTEGRAL NONLINEARITY at 70°C 7.00 6.00 5.00 LSB LSB 4.00 3.00 2.00 DIFFERENTIAL NONLINEARITY at 70°C 1.80 1.60 1.40 1.20 1.00 0.80 0.60 0.40 1.00 0.00 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Major Carry Bit Number 0.20 0.00 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Major Carry Bit Number INTEGRAL NONLINEARITY at 125°C 3.00 2.00 1.00 0.00 –1.00 LSB DIFFERENTIAL NONLINEARITY at 125°C 2.50 2.00 1.50 LSB –2.00 –3.00 –4.00 –5.00 –6.00 –7.00 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Major Carry Bit Number 1.00 0.50 0.00 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Major Carry Bit Number INTEGRAL NONLINEARITY ERROR (to 14-Bit LSB) 1.50 1.00 0.50 Differential DIFFERENTIAL NONLINEARITY ERROR (to 14-Bit LSB) 2.00 1.50 1.00 0.00 LSB 0.50 0.00 –0.50 –1.00 –8192 –0.50 –1.00 –1.50 –2.00 –8192 –4096 0.000 BIN 4096 8192 –4096 0.000 BIN 4096 8192 ® PCM78 6 TYPICAL PERFORMANCE CURVES (CONT) At TA = +25° C, VCC = ±15V, unless otherwise noted. Histograms done with Conversion Time = 8µs. SPECTRAL RESPONSE, fIN ≈ 1kHz 0 –20 –40 Magnitude (dB) SPECTRAL RESPONSE, fIN ≈ 20kHz 0 –60 –80 –100 –120 –140 0 25 Magnitude (dB) Input Frequency 976.6Hz Fund: –0.07dB 6th: –135.02dB 2nd: –87.80dB THD: –87.10dB 3rd: –97.43dB SNR: 81.05dB 4th: –102.35dB SINAD: 80.09dB 5th: –107.86dB –20 –40 –60 –80 –100 –120 –140 Input Frequency 19970.7Hz Fund: –0.08dB 6th: –101.44dB 2nd: –92.21dB THD: –88.12dB 3rd: –91.59dB SNR: 79.25dB 4th: –101.23dB SINAD: 78.72dB 5th: –109.32dB 50 Frequency (kHz) 75 100 0 25 50 Frequency (kHz) 75 100 SPECTRAL RESPONSE, fIN ≈ 1kHz 0 –20 –40 Magnitude (dB) SPECTRAL RESPONSE, fIN ≈ 20kHz 0 –60 –80 –100 –120 –140 0 25 Magnitude (dB) Fund: 2nd: 3rd: 4th: 5th: Input Frequency 976.6Hz –20.07dB 6th: –110.06dB –108.36dB THD: –76.75dB –100.44dB SNR: 61.79dB –111.52dB SINAD: 61.65dB –102.06dB –20 –40 –60 –80 –100 –120 –140 Input Frequency 19970.7Hz Fund: –19.94dB 6th: –107.32dB 2nd: –105.69dB THD: –72.81dB 3rd: –95.90dB SNR: 61.60dB 4th: –106.71dB SINAD: 61.28dB 5th: –97.57dB 50 Frequency (kHz) 75 100 0 25 50 Frequency (kHz) 75 100 SPECTRAL RESPONSE, fIN ≈ 1kHz 0 –20 –40 Magnitude (dB) 0 SPECTRAL RESPONSE, fIN ≈ 20kHz Input Frequency 19970.7Hz –59.96dB 6th: –110.11dB –109.09dB THD: –41.60dB –124.49dB SNR: 21.93dB –116.40dB SINAD: 21.88dB –112.18dB –60 –80 –100 –120 –140 0 25 Magnitude (dB) Input Frequency 976.6Hz Fund: –60.06dB 6th: –106.00dB 2nd: –109.18dB THD: –42.15dB 3rd: –108.31dB SNR: 21.73dB 4th: –134.66dB SINAD: 21.69dB 5th: –114.73dB –20 –40 –60 –80 –100 –120 –140 Fund: 2nd: 3rd: 4th: 5th: 50 Frequency (kHz) 75 100 0 25 50 Frequency (kHz) 75 100 ® 7 PCM78 TYPICAL PERFORMANCE CURVES (CONT) At TA = +25°C, VCC = ±15V, unless otherwise noted. THEORY OF OPERATION The PCM78P is a successive approximation A/D converter; this type of converter is well suited to high speed and resolution. The accuracy of a successive approximation converter is described by the transfer function shown in Figure 1. All successive-approximation A/ D converters have an inherent quantization error of ±1/2LSB. The remaining errors in the A/ D converter are combinations of analog errors due to the linear circuitry, matching and tracking properties of the ladder and scaling networks, power supply rejection, and reference errors. In summary, these errors consist of initial errors including Gain, Offset, Linearity, Differential Linearity, and Power Supply Sensitivity. Gain drift over temperature rotates the line (Figure 1) about zero, and Offset drift shifts the line left or right over the operating temperature range. Total Harmonic Distortion + Noise (THD+N) is a measure of the magnitude and distribution of the Linearity Error, Differential Linearity Error, and Noise, as well as quantization errors. The THD+N specification is most useful in audio or dynamic signal processing applications. To be useful, THD+N should be specified for both high level and low level input signals. This error is unadjustable and is the most meaningful indicator of A/ D converter accuracy for dynamic applications. DYNAMIC RANGE Dynamic range is a measure of the ratio of the smallest signals the converter can resolve to the full scale range and is usually expressed in decibels. The theoretical dynamic range of a converter is approximately 6 x n, where n is the number of bits of resolution. A 16-bit converter would thus have a theoretical dynamic range of 96dB. The actual useful dynamic range is limited by noise and linearity errors and is therefore somewhat less than the theoretical limit. THD+N vs CONVERSION TIME (0dB) 0.008 THD+N (%) 0.007 0.006 0.005 2 4 6 Convert Time (µs) 8 10 THD+N vs CONVERSION TIME (–20dB) 0.051 0.050 0.049 0.048 0.047 0.046 0.045 2 4 6 Convert Time (µs) 8 10 THD+N (%) All Bits On 0111…1111 Digital Output (BTC Code)* 0111…1110 0000…0010 0000…0001 0000…0000 1111…1111 1111…1110 1000…0001 1000…0000 All Bits Off Offset Error –1/2LSB Gain Error THD+N vs CONVERSION TIME (–60dB) 5.2 5.0 THD+N (%) +1/2LSB 4.8 EIN On 4.6 Analog Input () –FSR 2 EIN Off ( +FSR –1LSB 2 ) 4.4 2 4 6 Convert Time (µs) 8 10 *See Input/Output Relationship Table for code definitions. FIGURE 1. Input vs Output for Ideal Bipolar A/D Converter. ® PCM78 8 B&K Digital Oscillator Sync SHC702 PCM78 Serial-To-Parallel Convert Command IEEE-488 Communication Timing 0 –20 Signal Level (dB) –40 –60 –80 –100 –120 0.0 Digital Distortion Analyzer Software DataPhysics Corp 25 50 Frequency (kHz) 75 100 HP-330 Scientific Computer FIGURE 2. Block Diagram of Distortion Test Circuit. DISCUSSION OF SPECIFICATIONS TOTAL HARMONIC DISTORTION Evaluating distortion specifications can be a difficult task, as distortion is often specified in different ways. Total Harmonic Distortion (THD) is defined as the ratio of the square root sum of the squares of the value of rms harmonics to the value of the rms fundamental and is expressed in percent or dB. Note that this measurement only includes energy present in those frequencies which would contain harmonics, and therefore is less than Total Harmonic Distortion plus Noise. The Total Harmonic Distortion plus Noise (THD+N) is defined as the ratio of the square root of the sum of the squares of the value of the rms harmonics and rms noise to the value of the rms fundamental and is expressed in percent or dB. This is the most meaningful measurement of a dynamic converter’s performance because it includes all energy present in the signal that is not fundamental. A block diagram of the test circuit used to measure the THD and THD+N of the PCM78 is shown in Figure 2. This digital system is capable of differentiating harmonic energy and noise; conventional distortion analyzers which operate on a tracking notch filter principle cannot distinguish this energy, and therefore only measure THD+N. Unfortunately, in the past, these systems were used for measuring distortion performance of converters, and the distortion was often simply specified as “THD”, when in fact it was really THD+N. For this reason, it is often confusing to compare specifications of converters unless one knows exactly what was being measured. If we assume that the error due to the test circuit of Figure 2 is negligible, then the rms value of the PCM78 error referred to the input can be shown to be 1N ∑ E L (i) + E Q (i) + E N (i) N i =1 E rms THD+N = [ ] 2 X 100% where N is the number of samples, EL(i) is the linearity error at each sample, EQ(i) is the quantization error at each B&K Digital Oscillator Sync SHC702 PCM78 Serial-To-Parallel Convert Command 64k Memory Timing 2 1 Error (LSB) 0 –1 HP-330 Scientific Computer 0 1024 2048 Codes 3072 4095 IEEE-488 –2 FIGURE 3. Block Diagram of Histogram Test. ® 9 PCM78 MSB Adjust S/H Amplifier DUT PCM78P Latch 74LS164 74LS273 Status A BSC D 16-Bit DAC Low-Pass Filter Toko Model 298BLR-002N or PCM11 or Equivalent Attenuation (dB) Deglitcher LOW-PASS FILTER CHARACTERISTICS 0 20 Convert Command S/H Control Latch Enable Deglitcher Control Programmable Gain Amp Shibasoku AG16A or Equivalent 40 60 80 100 120 1 10 Frequency (MHz) 100 Audio Oscillator Shibasoku AG16A or Equivalent Timing Control Logic Distortion Tester FIGURE 4. Production Distortion + Noise Test System Block Diagram. For the PCM78 the test sampling frequency was chosen to be 200kHz, near the PCM78’s fastest rate of conversion. The test frequencies used vary within the audio range, and are stepped in amplitude from 0dB, to –20dB, to –60dB. 50ns Reference Clock A(S/H) B (CC) S (Status) 1234 (Clock) 500ns C (Data Latch) D (Deglitcher Control) 8.5µs 15 16 17 In manufacturing the PCM78, the test system shown in Figure 4 is used to test for guaranteed THD+N. ACCURACY VS CONVERSION TIME AND INPUT SIGNAL LEVEL The relationship of THD vs input signal level and THD vs conversion time is shown is the typical curves. Slowing the conversion time to more than 8µs results in little added benefit in terms of THD+N. For applications which are not as concerned with dynamic performance but require DC accuracy and linearity, it is best to use the PCM78 at the longest conversion time possible for the system requirements. Slowing the PCM78 to 8µs-10µs conversion time results in a substantial improvement in linearity. The typical curves show DNL and INL plots for a typical device, at an 8µs conversion time. Due to the segmented architecture of the internal DAC used in the successive approximation conversion technique, significant differential linearity errors occur near bits 3 and 4. Allowing more settling time for the DAC (by slowing the conversion speed) will improve this differential linearity error and give equivalent performance to more costly DCspecified 12-bit to 14-bit A/D converters.