PT4842N

PT4840 Series—48V 65-W Triple Output Isolated DC/DC Converter for DSL Applications SLTS142C - DECEMBER 2000 -REVISED SEPTEMBER 2002 Features • DSL Triple Outputs (Independantly Regulated) • Input Voltage Range: 36V to 75V • 1500VDC Isolation • On/Off Control • Current Limit • Short Circuit Protection (All Outputs) Description • • • • Fixed Frequency Operation Over-Temperature Shutdown Under-Voltage Lockout Space Saving Package: 1.9 sq. in. PCB Area (suffix N) • Solderable Copper Case • Safety Approvals: UL60950 CSA 22.2 950 VDE EN60950 Ordering Information The PT4840 Excalibur™ power modules are a series of isolated tripleoutput DC/DC converters that operate from a standard (–48V) central office supply. Rated for up to 65W, these regulators are appropriate for powering both analog and mixedsignal circuitry. A typical application is a chip-set for an ADSL/DSL line card. The output voltage combinations offered by the PT4840 series provide power for a low-voltage processor core, the associated digital circuitry, and analog support circuitry. The PT4840 series incorporates many features to simplify system integration. These include a flexible On/Off control, over-temperature protection, and an input undervoltage lock-out. All outputs are current limited and short-circuit protected. In addition, the lowvoltage outputs for processor core and digital circuitry meet the powerup and power-down sequencing requirements of popular DSP ICs. The PT4840 series is housed in a space-saving solderable case. The module requires no external heat sink and can occupy as little as 1.97 in2 of PCB area. PT4841o = +15/+3.3/+1.5V (65W) PT4842o = +12/+3.3/+1.8V (62W) PT Series Suffix (PT1234 x ) Case/Pin Configuration Vertical Horizontal SMD Vo2 Adjust Vo3 Adjust +VIN 1 17 Vo2adj Vo1 +VIN 11 PT4841 +15VDC COUT1 COM 12,13 4 3 EN 1 Vo2 Vo3 –VIN 2 DSL/ADSL IC Chip Set EN 2 CIN –VIN 15,16 +3.3VDC 22,23 +1.5VDC COUT3 COUT2 COM 18–20 Cin = Optional Cout = Optional; See specifications EN1 & EN2 pins: See On/Off Enable Logic For technical support and more information, see inside back cover or visit www.ti.com Package Code N A C (EKD) (EKA) (EKC) (Reference the applicable package code drawing for the dimensions and PC layout) Typical Application 21 Vo3adj Order Suffix PT4840 Series—48V 65-W Triple Output Isolated DC/DC Converter for DSL Applications SLTS142C - DECEMBER 2000 -REVISED SEPTEMBER 2002 Environmental Specifications Characteristics Symbols Conditions Min Typ Max Units Operating Temperature Range Over-Temperature Protection Solder Reflow Temperature Storage Temperature Mechanical Shock Ta OTP Treflow Ts Over Vin Range Case temperature Surface temperature of module pins or case — Per Mil-STD-883D, Method 2002.3 1 msec, ½ Sine, mounted Mil-STD-883D Method 2007.2 Suffix N 20-2000 Hz Suffix A, C Vertical/Horizontal Meets UL 94V-O –40 100 — –40 — — — — 85 (i) — 215 (ii) 125 °C °C °C °C — — — — 500 10 (iii) 20 (iii) 90 — — — — G’s Mechanical Vibration Weight Flammability — — G’s grams Notes: (i) See SOA curves or consult factory for appropriate derating. (ii) During solder reflow of SMD package version do not elevate the module case, pins, or internal component temperatures above a peak of 215°C. For further guidance refer to the application note, “Reflow Soldering Requirements for Plug-in Power Surface Mount Products,” (SLTA051). (iii) Only the case pins on through-hole pin configurations (N & A) must be soldered. For more information see the applicable package outline drawing. Pin Configuration On/Off Enable Logic Pin Function Pin Function Pin Function 1 +Vin 10 Pin Not Present 18 COM 2 –Vin 11 +Vo1 19 COM 3 EN 1 12 COM 20 4 EN 2 13 COM 21 5 TEMP 14 Pin Not Present 22 +Vo3 6 Do Not Connect 15 +Vo2 23 +Vo3 7 Do Not Connect 16 +Vo2 24 Pin Not Present 8 Pin Not Present 17 Vo2 adjust 25 Do Not Connect 26 Do Not Connect 9 Pin Not Present Note: Shaded functions indicate those pins that are at primary-side potential. Pin 3 Pin 4 Output Status 1 × Off COM 0 1 On Vo3 adjust × 0 Off Notes: Logic 1 =Open collector Logic 0 = –Vin (pin 2) potential For positive Enable function, connect pin 3 to pin 2 and use pin 4. For negative Enable function, leave pin 4 open and use pin 3. Pin Descriptions +Vin: The positive input supply for the module with respect to –Vin. When powering the module from a –48V telecom central office supply, this input is connected to the primary system ground. –Vin: The negative input supply for the module, and the 0VDC reference for the EN 1, EN 2, and TEMP inputs. When powering the module from a +48V supply, this input is connected to the 48V(Return). EN 1: The negative logic input that activates the module output. This pin is referenced to –Vin. A low-level voltage at this pin enables the module’s outputs, and a high impedance impedance disables the module’s outputs. If not used, the pin must be connected to –Vin. EN 2: The positive logic input that activates the module output. This pin is referenced to –Vin. A high impedance at this pin enables the module’s outputs. If not used, the pin should be left open circuit. TEMP: This pin produces an output signal that tracks a temperature that is approximately the module’s metal case. The output voltage is referenced to –Vin and rises approximately 10mV/°C from an intital value of 0.1VDC at –40°C. The signal is available whenever the module is supplied with a valid input voltage, and is independant of the enable logic status. (Note: A load impedance of less than 1MΩ will adversly affect the module’s over-temperature shutdown threshold. Use a high-impedance input when monitoring this signal.) Vo 1: The highest regulated output voltage, which is referenced to the COM node. The output may be used to power analog support circuitry. Vo 2: The regulated output that is designed to power logic or I/O circuitry. It is referenced to the COM node. Vo 3: The low-voltage regulated output that provides power for a micro, processor, ASIC, or DSP core, and is referenced to the COM node. COM: The secondary return reference for the module’s three regulated output voltages. It is DC isolated from the input supply pins. Vo2 Adjust: Using a single resistor, this pin allows Vo2 to be adjusted higher or lower than the preset value. If not used, this pin should be left open circuit. Vo3 Adjust: Using a single resistor, this pin allows Vo3 to be adjusted higher or lower than the preset value. If not used, this pin should be left open circuit. For technical support and more information, see inside back cover or visit www.ti.com PT4841—48V 65-W Triple Output Isolated DC/DC Converter for DSL Applications PT4841 Electrical Specifications SLTS142C - DECEMBER 2000 -REVISED SEPTEMBER 2002 (Unless otherwise stated, the operating conditions are:- Ta =25°C, V in =48V, and Io n =0.5Ionmax) Characteristics Symbols Conditions Output Power Po Each output: Output Current Io Vo1 ( 15V) Vo2 (3.3V) Vo3 (1.5V) Total (all three outputs) Io1 ( 15V) Io2 (3.3V) Io3 (1.5V) Maximum (Io2 + Io3) Input Voltage Range Set-Point Voltage Vin Vo Vo1 Vo2 Vo3 Vo1 Vo2/Vo3 Min PT4841 Typ Max — — — — 0 0 0 — 36 — — — — — — — — 15 3.2 1.45 — — — — — — ±10 — — — — — — — — — — — 15.2 3.3 1.5 ±0.5 ±0.8 0.1 0.2 — — — — 85 50 20 20 30 5 — 4 16 41 (1) 20 (1) 10.5 (1) 65 (1) 2.7 6 (2) 7 (2) 11 (2) 75 — — — — — 0.5 0.5 1.0 15.75 (3) 3.4 (3) 1.55 (3) — 100 (4) 50 (4) 50 (4) — — — — — Temperature Variation Regtemp –40°C ≤Ta ≤+85°C, Io =Iomin Line Regulation Load Regulation Cross Regulation Total Output Voltage Variation Regline Regload Regcross ∆Vo tol All outputs, Over Vin range All outputs, 0≤Io≤Iomax Any one output vs. other outputs Includes set-point, line, load, –40°C ≤Ta ≤+85°C Efficiency Vo Ripple/Noise (0 to 20MHz bandwidth) η Vn Po =Pomax Co1/Co2/Co3 =10µF Transient Response 0.1A/µs load step, 50% to 75% Iomax Vo over/undershoot Output Adjust Range Current Limit Threshold ttr Vos Voadj ILIM Over Current Shutdown Delay Switching Frequency tsd ƒs Time period prior to latched shutdown Over Vin and Io ranges — 450 200 500 Under Voltage Lockout Von Voff Vin increasing Vin decreasing — — Enable Control (pins 2 & 3) High-Level Input Voltage Low-Level Input Voltage Low-Level Input Current Standby Input Current Vo1 Vo2 Vo3 Vo1 Vo2 Vo3 Vo2 / Vo3 Io1 Io2 + Io3 W A A V V %Vo %Vo %Vo %Vo V % mVpp µSec %Vo %Vo A ms kHz 34 32 — — V — — 0.16 70 (6) 0.8 (6) 0.25 V mA mA Referenced to –Vin (pin 2) VIH VIL IIL Vin =75V 4.0 –0.2 — Iin standby pins 2 & 4 connected — 8 10 — Cint — 2 External Output Capacitance Co1 Co2 Co3 Vtemp 0 0 0 — — 1500 — 10 — — — 0.1 (8) 1.5 (8) — 1500 — Primary/Secondary Isolation W — 550 (5) Internal Input Capacitance Temperature Sense Units Output voltage at temperatures:- V iso C iso R iso Notes: (1) (2) (3) (4) (5) (6) –40°C 100°C (3) 330 5,000 10,000 — — — — — µF (7) (7) µF (7) V V pF MΩ The sum total power delivered from all three regulated outputs, Vo1, Vo2, and Vo3, cannot exceed 65 watts. The sum-total current from outputs Vo2, and Vo3 cannot exceed 11ADC. Limits are guaranteed by design. The ripple and noise is measured with a 10µF tantalum capacitor across each output. After latched shutdown, the module may be reset cycling the input power. The Enable inputs (pins 3 & 4) have internal pull-ups. Leaving pin 4 open-circuit and connecting pin 3 to –V in allows the the converter to operate when input power is applied. The maximum open-circuit voltage is 5.1V. (7) Ultra-low ESR capacitors, such as organic or polymer aluminum electrolytic types, may cause instability. For more information refer to the application note regarding capacitor selection. (8) Voltage output at “TEMP” pin is defined by the equation:- VTEMP = 0.5 + 0.01·T, where T is the sensed temperature in degrees centigrade. See pin descriptions for more information. For technical support and more information, see inside back cover or visit www.ti.com Typical Characteristics PT4841—48V 65-W Triple Output Isolated DC/DC Converter for DSL Applications SLTS142C - DECEMBER 2000 -REVISED SEPTEMBER 2002 PT4841 Performance Characteristics PT4841 Safe Operating Areas (See Note A) Efficiency vs Output Power (See Note B) PT4841 SOA vs Output Load @Vin =48V 100 90 80 Ambient Temperature (°C) 90 Efficiency - % VIN 80 36V 48V 75V 70 60 Airflow 70 300LFM 200LFM 100LFM Nat conv 60 50 40 30 50 20 0 20 40 60 80 100 0 20 % Load (All Outputs) 40 60 80 100 % Load (All Outputs) Power Dissipation vs Output Power PT4841 SOA vs Output Load @Vin =36V 15 90 Pd - Watts VIN 9 75V 48V 36V 6 3 Ambient Temperature (°C) 80 12 Airflow 70 300LFM 200LFM 100LFM Nat conv 60 50 40 30 0 20 0 20 40 60 80 100 0 20 % Load (All Outputs) 40 60 80 100 % Load (All Outputs) PT4841 SOA vs Output Load @Vin =60V 90 Ambient Temperature (°C) 80 Airflow 70 300LFM 200LFM 100LFM Nat conv 60 50 40 30 20 0 20 40 60 80 100 % Load (All Outputs) Note A: All Characteristic data in the above graphs has been developed from actual products tested at 25°C. This data is considered typical data for the ISR. Note B: SOA curves represent operating conditions at which the internal components are at or below the manufacturer’s maximum rated operating temperatures. For technical support and more information, see inside back cover or visit www.ti.com PT4842—48V 65-W Triple Output Isolated DC/DC Converter for DSL Applications PT4842 Specifications SLTS142C - DECEMBER 2000 -REVISED SEPTEMBER 2002 (Unless otherwise stated, the operating conditions are:- T a =25°C, V in =48V, and Io n =0.5Io nmax) Characteristics Symbols Conditions Output Power Po Each output: Vo1 ( 12V) Vo2 (3.3V) Vo3 (1.8V) Total (all three outputs) Output Current Io1 ( 12V) Io2 (3.3V) Io3 (1.8V) Io Maximum (Io2 + Io3) Current Limit Threshold Over Current Shutdown Delay Input Voltage Range Io1 Io2 + Io3 ILIM Min PT4842 Typ Max — — — — 0 0 0 — — — — — — — — — — — 4 16 32.4 20 12.6 62 2.7 6 7 11 — — Units (1) (1) (1) (1) (2) (2) (2) W W A A A A tsd Vin Time period prior to latched shutdown — 36 200 — — 75 ms V Under Voltage Lockout Von Voff Vin increasing Vin decreasing — — 34 32 — — V Internal Input Capacitance Output Voltage Cint Vo Voadj Regline Regload Regcross Vn All outputs, Over Vin range All outputs, 0≤Io≤Iomax Any one output vs. other outputs Cout =10µF tantalum capacitor ttr Vos η ƒs 25% load step Vo over/undershoot Po =Pomax Over Vin and Io ranges 2 12.0 3.3 1.8 — 0.1 0.2 — 45 20 20 30 5 84 500 — 12.36 3.4 1.86 — 1.0 1.0 1.0 100 50 50 — — — 550 µF Output Adjust Range Line Regulation Load Regulation Cross Regulation Vo Ripple/Noise (0 to 20MHz bandwidth) — 11.64 3.2 1.74 ±10 — — — — — — — — — 450 On Off Referenced to –Vin 0 2.4 — — 3 0.8 75 5 Input current in ‘Off’ state — 1500 — 10 — — 0 0 0 9 — 1500 — 0.1 1.5 — — — 15 — — — — — 330 5,000 10,000 Transient Response (3) (4) (5) Efficiency Switching Frequency On/Off Control Temperature Sense (7) Istby V iso C iso R iso Vtemp External Output Capacitance (8) Cout Primary/Secondary Isolation Vo1 ( 12V) Vo2 (3.3V) Vo3 (1.5V) Vo2 / Vo3 Vo1 ( 12V) Vo2 (3.3V) Vo3 (1.5V) Logic ‘0’ Logic ‘1’ Open cct. voltage Output voltage at temperatures:- Notes: (1) (2) (3) (4) (5) (6) (7) –40°C 100°C Co1 Co2 Co3 V %Vo %Vo %Vo %Vo mVpp µSec %Vo % kHz (6) V mA V pF MΩ V µF The sum total power delivered from all three regulated outputs, Vo1, Vo2, and Vo3, cannot exceed 62 watts. The sum-total current from outputs Vo2, and Vo3 cannot exceed 11ADC. After latched shutdown, the module may be reset by cycling the input power. The ripple and noise is measured with a 10µF tantalum capacitor across each output. The transient response is measured with a 25% load step from Io =0.5Iomax, and di/dt =0.2A/µs. Pins 3 & 4 are diode protected and can be connected to +Vin . Voltage output at “TEMP” pin is defined by the equation:- VTEMP = 0.5 + 0.01·T, where T is the sensed temperature in degrees centigrade. See pin descriptions for more information. (8) Ultra-low ESR capacitors, such as organic or polymer aluminum electrolytic types, may cause instability. For more information, refer to the application note regarding capacitor selection. For technical support and more information, see inside back cover or visit www.ti.com Typical Characteristics PT4842—48V 65-W Triple Output Isolated DC/DC Converter for DSL Applications SLTS142C - DECEMBER 2000 -REVISED SEPTEMBER 2002 PT4842 Performance Characteristics PT4842 Safe Operating Areas (See Note A) Efficiency vs Output Power (See Note B) PT4842 SOA vs Output Load @Vin =48V 100 90 80 Ambient Temperature (°C) 90 Efficiency - % VIN 80 36V 48V 75V 70 60 Airflow 70 300LFM 200LFM 100LFM Nat conv 60 50 40 30 50 20 0 20 40 60 80 100 0 20 % Load (All Outputs) 40 60 80 100 % Load (All Outputs) Power Dissipation vs Output Power PT4842 SOA vs Output Load @Vin =36V 15 90 Pd - Watts VIN 9 75V 48V 36V 6 3 Ambient Temperature (°C) 80 12 Airflow 70 300LFM 200LFM 100LFM Nat conv 60 50 40 30 0 20 0 20 40 60 80 100 0 20 % Load (All Outputs) 40 60 80 100 % Load (All Outputs) PT4842 SOA vs Output Load @Vin =60V 90 Ambient Temperature (°C) 80 Airflow 70 300LFM 200LFM 100LFM Nat conv 60 50 40 30 20 0 20 40 60 80 100 % Load (All Outputs) Note A: All Characteristic data in the above graphs has been developed from actual products tested at 25°C. This data is considered typical data for the ISR. Note B: SOA curves represent operating conditions at which internal components are at or below manufacturer’s maximum rated operating temperatures. For technical support and more information, see inside back cover or visit www.ti.com Application Notes PT4840 Series Operating Features of the PT4840 Triple-Output DC/DC Converters Over-Current Protection Primary-Secondary Isolation The current limit function of the PT4840 series of triple-output DC/DC converters is divided into two zones. These are the high-voltage output Vo1, and the two low-voltage outputs (combined) Vo2/Vo3. The PT4840 series of DC/DC converters incorporate electrical isolation between the input terminals (primary) and the output terminals (secondary). All converters are production tested to a withstand voltage of 1500VDC. The isolation complies with UL60950 and EN60950, and the requirements for operational isolation. This allows the converter to be configured for either a positive or negative input voltage source. A load fault applied to Vo1 will cause this output voltage to drop. A drop in Vo1 (to less than 10V) will also cause outputs Vo2 and Vo3 to simultaneously turn off. Load faults applied to either Vo2 or Vo3 will cause both these outputs to drop, but in this case Vo1 will be unaffected. Each protection zone incorporates a latch-off time-out period of approximately 200ms. A transient or momentary fault lasting less than this period will allow the prompt recovery of all affected outputs. Faults applied for longer than this period will cause the affected zone to latch off. Faults applied to Vo2 or Vo3 results in the latch off of both these outputs; Vo1 being unaffected, whereas the latch off of Vo 1 will shut down all three outputs. Recovery from a latched shutdown condition requires the removal and corresponding re-application of input power to the converter. Over-Temperature Protection The PT4840 DC/DC converter series have an internal temperature sensor, which monitors the temperature of the module’s metal case. If the case temperature exceeds a nominal 110°C the converter will shut down. The converter will automatically restart when the sensed temperature returns to about 100°C. The analog voltage generated by the sensor is also made available at the ‘TEMP’ output (pin 5), and can be monitored by the host system for diagnostic purposes. Consult the ‘Pin Descriptions’ section of the data sheet for more information on this feature. The regulation control circuitry for these modules is located on the secondary (output) side of the isolation barrier. Control signals are passed between the primary and secondary sides of the converter via a proprietory magnetic coupling scheme. This eliminates the use of opto-couplers. The data sheet ‘Pin Descriptions’ and ‘Pin-Out Information’ provides guidance as to which reference (primary or secondary) that must be used for each of the external control signals. Input Current Limiting The converter is not internally fused. For safety and overall system protection, the maximum input current to the converter must be limited. Active or passive current limiting can be used. Passive current limiting can be a fast acting fuse. A 125-V fuse, rated no more than 10A, is recommended. Active current limiting can be implemented with a current limited “Hot-Swap” controller. Under-Voltage Lock-Out The Under-Voltage Lock-Out (UVLO) circuit prevents operation of the converter whenever the input voltage to the module is insufficient to maintain output regulation. The UVLO has approximately 2V of hysterisis. This is to prevent oscillation with a slowly changing input voltage. Below the UVLO threshold the module is off and the enable control inputs, EN1 and EN2 are inoperative. For technical support and more information, see inside back cover or visit www.ti.com Application Notes PT4840 Series Using the On/Off Enable Controls on the PT4840 Series of Triple Output DC/DC Converters The PT4840 (48V input) series of 65-W, triple-output DC/DC converters incorporate two output enable controls. EN1 (pin 3) is the Negative Enable input, and EN2 (pin 4) is the Positive Enable input. Both inputs are electrically referenced to -Vin (pin 2) on the primary or input side of the converter. A pull-up resistor is not required, but may be added if desired. Voltages of up to 70V can be safely applied to the either of the Enable pins. pin 3 in order to enable the outputs of the converter. An example of this configuration is detailed in Figure 2. Note: The converter will only produce and output voltage if a valid input voltage is applied to ±Vin. Figure 2; Negative Enable Configuration DC/DC Module 4 3 Automatic (UVLO) Power-Up EN 2 EN 1* BSS138 Connecting EN1 (pin 3) to -Vin (pin 2) and leaving EN2 (pin 4) open-circuit configures the converter for automatic power up. (See data sheet “Typical Application”). The converter control circuitry incorporates an “Under Voltage Lockout” (UVLO) function, which disables the converter until the minimum specified input voltage is present at ±Vin. (See data sheet Specifications). The UVLO circuitry ensures a clean transition during power-up and power-down, allowing the converter to tolerate a slowrising input voltage. For most applications EN1 and EN2, can be configured for automatic power-up. Positive Output Enable (Negative Inhibit) To configure the converter for a positive enable function, connect EN1 (pin 3) to -Vin (pin 2), and apply the system On/Off control signal to EN2 (pin 4). In this configuration, a low-level input voltage (-Vin potential) applied to pin 4 disables the converter outputs. Figure 1 is an example of this configuration. 1 =Outputs On –VIN 2 –Vin On/Off Output Voltage Sequencing The Vo2 and Vo3 low-voltage outputs from the PT4840 series of DC/DC converters are internally sequenced to meet the power-up requirements of popular microprocessor and DSP chipsets. Figure 3 shows the waveforms from a PT4841 after power is applied to the input of the converter. During power-up, the Vo1 reaches its output regulation voltage first, followed the Vo2 and Vo3 voltages. The Vo2 and Vo3 voltage waveforms typically track within 0.4V prior to Vo2 reaching regulation. The waveforms were measured with resistive loads of 2A, 3A, and 3A, at Vo1, Vo2, and Vo3 respectively. The input source voltage was 48-VDC. The converter typically produces a fully regulated output within 25ms. Figure 3; Vo1, Vo2, Vo3 Power-Up Sequence Figure 1; Positive Enable Configuration DC/DC Module 4 3 BSS138 Vo1 (5V/Div) EN 2 Vo2 (1V/Div) EN 1* 1 =Outputs Off Vo3 (1V/Div) –VIN 2 –Vin HORIZ SCALE: 2ms/Div Negative Output Enable (Positive Inhibit) To configure the converter for a negative enable function, EN2 (pin 4) is left open circuit, and the system On/Off control signal is applied to EN1 (pin 3). A low-level input voltage (-Vin potential) must then be applied to During turn-off, all outputs drop rapidly due to the discharging effect of actively switched rectifiers. The voltage at Vo 2 remains higher than Vo3 during this period. The discharge time is typically 100µs, but will vary with the amount of external load capacitance. For technical support and more information, see inside back cover or visit www.ti.com Application Notes PT4840 Series Optional Output Capacitors; Vo1 (Table 1) PT4840 Input/ Output Filter Capacitance Selection for Excalibur™ Triple-Ouput DC/DC Converters The ESR of the 330µF output capacitor for Vo1 (+15V) must be ≥40mΩ. Electrolytic capacitors have minimal effect on ripple at frequencies greater than 200kHz but excellent low-frequency transient response. At the ripple frequency, ceramic decoupling capacitors improve the response to fast transients and reduce any high-frequency noise components during higher current excursions. General Requirements The capacitors on the input bus are optional but may be required to insure dynamic response to load transients. The suggested capacitors on the input bus include ceramic noise attenuation components. The PT4840 series has an internal 1µH input inductor. This inductor provides an effective input differential noise filter when 1µF ceramic capacitors are connected across the input terminals. This low impedance filter has an attenuation factor of typically 15dB. The preferred capacitor part numbers are identified in the Table 1. The table identifies vendors with acceptable ESR and ripple current (rms) ratings. The suggested minimum quantities for Vo1 are identified. Tantalum capacitors, rated 30V or greater with an equivalent ESR of ≥40mΩ, are also recommended for Vo1. The output capacitors are all optional and may be used to optimize dynamic and transient load performance. The maximum capacitance allowed for each bus is given in the electrical specification table on p.3. Optional Output Capacitors; Vo2 & Vo3 (Table 2) The combined ESR of the output capacitors selected for Vo2 and Vo3 (lower bus voltages) must be ≥10mΩ. Low ESR electrolytic capacitors have minimal effect on ripple at frequencies greater than 200kHz but excellent lowfrequency transient response. Above the ripple frequency, ceramic decoupling capacitors improve the response to fast transients and reduce any high-frequency noise components during higher current excursions. The preferred lower ESR type capacitor part numbers for Vo2 and Vo3 are identified in Table 2. The table identifies vendors with acceptable ESR and ripple current (rms) ratings. The tantalum and Oscon® type capacitors have both low ESR and stable characteristics. These are recommended for Vo2 and Vo3 in applications where the temperature range extends below 0°C. Input Capacitors The input capacitors are all optional. The 33µF/100V electrolytic capacitor should have a minimum ripple current 400mA. Ripple current and 775mA 7.3L×5.7W ×4.0H 3 1 T495X226M035AS C1825C1055RAC Sprague: Tantalum 594D X7R Ceramic 35V 50V 33 1 0.200Ω 0.006Ω 896mA >775 7.2L×6W 4.1W 1 1 594D336X0035R2T VJ1825Y105MXAÑ Table 2; Output Capacitors for Vo2, and Vo3 (See Note B) Capacitor Vendor/ Component Series Capacitor Characteristics, Low Voltage Bus Selection (