PTB48600AAH

Not Recommended for New Designs PTB48600 —48-V Input 85 W Dual Complementary-Output DC/DC Converter for DSL SLTS239 JANUARY 2005 Features • Dual Complementary Outputs (±5 V) • Input Voltage Range: 36 V to 75 V • On/Off Enable for Sequencing • 1500 VDC Isolation • Over-Current Protection • Over-Temperature Shutdown • Under-Voltage Lockout • • • • Temp Range: –40 to +85°C Fixed Frequency Operation Synchronizes with PTB4850x Powers line driver ICs for AC-7 and other xDSL chipsets • Safety Approvals: (Pending) EN60950 UL/cUL60950 Description Pin Configuration The PTB48600A is one of a series of isolated DC/DC converter modules that provide a pair of complementary supply voltages for powering line-driver ICs in xDSL telecom applications. These modules operate from a standard telecom (-48 V) central office supply and can provide up to a 85 W of power in a balanced load configuration. The A-suffix module (±5 V) is designed to power the line driver ICs for the AC-7 ADSL chipset. It will also power any other applications that require a complementary supply with relatively balanced loads. The two compliementary outputs can also be configured as a single output of twice the voltage magnitude. As an example, the outputs of a PTB48600A can be adjusted up to ±6 V, and configured as a single 12-V output. The PTB48600 includes an output “on/off” enable control, output current limit, over-temperature protection, and input under-voltage lockout (UVLO). The control inputs, “Enable” and “Sync In,” are compatible with the “EN Out” and “Sync Out” signals of the PTB4850x DC/DC converter. This allows the power-up and switching frequency of a PTB48600 module to be directly controlled from a PTB48500. Together the PTB48500 and PTB48600 converters meet all the system power and sequencing requirements of the AC-7 ADSL chipset. The PTB48600 employs double-sided surface mount construction. The package options include both through-hole and surface mount pin configurations. Pin 1 2 3 4 5 6 7 8 Function +VI Sync In Enable * –V I +VO COM VO Adjust –VO Shaded functions indicate signals that are referenced to –Vin. * Denotes negative logic: Open = Outputs Off –Vin = Normal operation Stand-Alone Application Complementary Output & Load PTB48600 +VI 1 2 3 +VI +VO 4 +VO L O A D Sync In ±VO Adj Enable COM –VI 5 7 6 COM OR L O A D –VI –VO For technical support and further information visit http://power.ti.com 8 Single-Ended Output & Load –VO L O A D Not Recommended for New Designs PTB48600 —48-V Input 85 W Dual Complementary-Output DC/DC Converter for DSL SLTS239 JANUARY 2005 Ordering Information Base Pt. No. (PTB4860❒xxx) Output Voltage (PTB48600❒xx) Package Options (PT48600A❒❒) Order Prefix PTB48600xxx Code A Code AH AS Description Basic Model Voltage ±5 V Description Horiz. T/H SMD, Standard (2) Pkg Ref. (1) (ERT) (ERU) Notes: (1) Reference the applicable package reference drawing for the dimensions and PC board layout (2) “Standard” option specifies 63/37, Sn/Pb pin solder material. Pin Descriptions +VI : The positive input supply for the module with respect to –VI. When powering the module from a –48 V telecom central office supply, this input is connected to the primary system ground. ±VO Adjust: Using a single resistor, this pin allows the magnitude of both ‘+VO’ and ‘–VO’ to be adjusted together, either higher or lower than their preset value. If not used, this pin should be left open circuit. –VI: The negative input supply for the module, and the 0 VDC reference for the ‘Enable*’, and ‘Sync In’ signals. When the module is powered from a +48-V supply, this input is connected to the 48-V Return. Enable*: This is an open-collector (open-drain) negative logic input that enables the module output. This pin is referenced to -V I. A logic ‘0’ at this pin enables the module’s outputs, and a high impedance disables the outputs. If this feature is not used the pin should be connected to –VI. Note: Connecting this input directly to the “EN Out” pin of the PTB4850x enables the output voltages from both converters (PTB4850x and PTB48600) to power up in sequence. +VO: The positive output supply voltage, which is referenced to the ‘COM’ node. The voltage at ‘+VO’ has the same magnitude, but is the complement to that at ‘-VO’. –VO: The negative output supply voltage, which is referenced to the ‘COM’ node. The voltage at ‘-VO’ has the same magnitude, but is the complement to that at ‘+VO’. COM: The secondary return reference for the module’s regulated output voltages. This node is dc isolated from the input supply pins. Environmental and General Specifications Sync In: This pin is used when the PTB48600 and PTB4850x DC/DC converter modules are used together. Connecting this pin to the ‘Sync Out’ of the PTB4850x module allows the PTB48600 to be synchronized to the same switch conversion frequency as the PTB4850x. (Unless otherwise stated, all voltages are with respect to –VI) Characteristics Symbols Conditions Min Typ Max Units Input Voltage Range Isolation Voltage Capacitance Resistance Operating Temperature Range Over-Temperature Protection VI 36 1500 — 10 –40 — — 48 — 1500 — — 115 (i) 10 TREFLOW TS –40 — — — — — — 20 2.5 500 250 35 75 — — — +85 — — 235 (ii) 125 — — — — — VDC V pF MΩ °C Solder Reflow Temperature Storage Temperature Mechanical Vibration Over output load range Input–output/input–case Input to output Input to output Over Vin Range Shutdown threshold Hysterisis Surface temperature of module body or pins — Mil-STD-883D, Method 2007.2 20-2000 Hz Per Mil-STD-883D, Method 2002.3 1 msec, ½ Sine, mounted TA OTP Mechanical Shock Weight Flammability — — T/H SMD T/H SMD °C °C °C G’s G’s grams Meets UL 94V-O Notes: (i) This parameter is defined by design (ii) During reflow of SMD package version do not elevate peak temperature of the module, pins or internal components above the stated maximum. For technical support and further information visit http://power.ti.com Not Recommended for New Designs PTB48600 —48-V Input 85 W Dual Complementary-Output DC/DC Converter for DSL Specifications SLTS239 JANUARY 2005 (Unless otherwise stated, TA =25°C, VI =48 V, C I =0 µF, ±CO =0 µF, |+I O | = |–IO |, and |±I O | =0.5 |±I O | max) PTB48600A Characteristic Symbol Conditions Min Typ Max Units Output Power Output Current Output Load Imbalance Output Voltage PO |±IO | |+IO | – |–IO | |±VO | 0 0 0 4.75 (2) — — — 5 85 (1) 8.5 (2) 1 (3) 5.25 (2) W A A V Temperature Variation ∆RegTEMP ∆RegLINE ∆RegLOAD η ±VR — — — — — — ±1 ±1 ±0.1 ±0.2 85 20 — — ±0.4 ±0.4 — 30 (4) %Vo Line Regulation Load Regulation Efficiency Vo Ripple (pk-pk) Total output power from ±VO Over VI range, |+IO | – |–IO | ≤ 0.1 A |+IO | ≥0.1 A, |–IO | ≥ 0.1 A Inlcudes set-point, line, |+IO | – |–IO | ≤ 0.1 A –40 ≤TA ≤+85°C –40 ≤TA ≤ +85°C, |±IO| =0.1 A +VO –VO Over VI range, balanced load ±VO Over ±IO range, balanced load ±VO %Vo %Vo % mVpp Transient Response tTR ∆VTR |±IO| trip — — 30 ±1 — — µs %Vo 9 10 12 A — — 3.31 440 — — 16 10 — 470 (5) 33 32 — — 6 500 — — A % V kHz V +3.6 –0.2 — — 6 — 0 2.8 — — — 2 10 3 — — +75 (6) +0.8 –1 — 22 — 5,000 (7) — V Over Current Threshold Short Circuit Current Output Voltage Adjust Range Switching Frequency Under-Voltage Lockout |±VO | adj ƒS VI on VI off On/Off Enable (pin 3) Input High Voltage Input Low Voltage Input Low Current Standby Input Current Start-up Time Internal Input Capacitance External Output Capacitance Reliability VIH VIL IIL II standby tON CI ±CO MTBF Notes: (1) (2) (3) (4) (5) (6) 20 MHz bandwidth, CO =10 µF tantalum capacitor 0.1 A/µs load step, 50% to 75% ±IOmax |±VO | over/undershoot VI =36 V, |+IO| = |–IO|, reset followed by auto-recovery Continuous over-current trip, |±IO |PK |+IO | = |–IO | Duty |+VO | and |–VO | adjust simulataneously Over VI and IO ranges VI increasing VI decreasing Referenced to –VI (pin 4) pin 3 open circuit |±IO | =1 A, |±VO | rising 0 to 0.95 |±VO | typ Capacitance from either output to COM Per Telcordia SR-332 50% stress, TA =40°C, gnd benign mA mA ms µF µF 106 Hrs See Safe Operating Area curves or contact the factory for the appropriate derating. Under balanced load conditions, load current flowing out of +VO is balanced to within ±0.1 A of that flowing into –VO. A load imbalance is the difference in current flowing from +VO to –VO. The module can operate with a higher imbalance but with reduced specifications. Output voltage ripple is measured with a 10 µF tantalum capacitor connected from +V O (pin 5) or –VO (pin 8), to COM (pin 6). This is the free-running frequency. The module can be made to synchronize with the PTB48500 when both modules are used together in a system. The On/Off Enable (pin 3) has an internal pull-up and may be controlled with an open-collector (or open-drain) transistor. The input is diode protected and may be connected to +V I. The open-circuit voltage is 5 V max. If it is left open circuit the converter will operate when input power is applied. (7) Electrolytic capacitors with very low equivalent series resistance (ESR) may induce instability when used on the output. Consult the factory before using capacitors with organic, or polymer-aluminum type electrolytes. For technical support and further information visit http://power.ti.com Not Recommended for New Designs Typical Characteristics PTB48600 —48-V Input 85 W Dual Complementary-Output DC/DC Converter for DSL SLTS239 JANUARY 2005 PTB48600A Characteristic Data @VIN =48 V Safe Operating Area PTB48600A (See Notes A) Efficiency vs Load Current (See Note B) (See Note C) Balanced Load, VI =48 VDC (See Note B) 90 90 Efficiency - % VI 36 V 48 V 60 V 72 V 70 60 50 Ambient Temperature – °C 80 80 Airflow 70 400LFM 200LFM 100LFM Nat conv 60 50 40 30 40 20 0 2 4 6 8 0 |±IO| – Balanced Output Current – A 1.5 3 4.5 6 7.5 |±IO| – Output Current – A Power Dissipation vs Load Current (See Note B) PD – Power Dissipation – W 20 16 VI 72 V 60 V 48 V 36 V 12 8 4 0 0 1.5 3 4.5 6 7.5 |±IO| – Balanced Output Current – A Cross Regulation, ∆|+VO| vs |–IO|, with |+IO| = 1 A ±|+VO| – Output Voltage – mV 400 200 0 -200 -400 0 1.5 3 4.5 6 7.5 |-IO| – Output Current – A Cross Regulation, ∆|–VO| vs |+IO|, with |–IO| = 1 A ±|-VO| – Output Voltage – mV 400 200 0 -200 -400 0 1.5 3 4.5 6 7.5 |+IO| – Output Current – A Note A: Characteristic data has been developed from actual products tested at 25°C. This data is considered typical data for the converter. Note B: Under a balanced load, current flowing out of +Vo is equal to that flowing into –Vo. Note C: SOA curves represent the conditions at which internal components are at or below the manufacturer’s maximum operating temperatures. Derating limits apply to modules soldered directly to a 4 in. × 4 in. double-sided PCB with 1 oz. copper. For technical support and further information visit http://power.ti.com Not Recommended for New Designs Application Notes PTB48600 Adjusting the Output Voltages of the PTB48600 Series of DC/DC Converters The PTB48600 DC/DC converter produces a balanced pair of complementary output voltages. They are identified +VO and -VO, respectively. The magnitude of both output voltages can be adjusted together as a pair, higher or lower. The adjustment method uses a single external resistor. 1 The value of the resistor determines the adjustment magnitude, and its placement determines whether the magnitude is increased or decreased. The resistor values can be calculated using the appropriate formula (see below). The formula constants are given in Table 1-1. The placement of each resistor is as follows. Adjust Up: To increase the magnitude of both output voltages, place a resistor R1 between ±VO Adj (pin 7) and the -VO (pin 8) voltage rail; see Figure 1-1(a). Figure 1-1a PTB48600 +VO Calculation of Resistor Adjust Values The value of the adjust resistor is calculated using one of the following equations. Use the equation for R1 to adjust up, or (R2) to adjust down. R1 [Adjust Up] = (R2) [Adjust Down] = Where: VO VA VR RO RS = = = = = VR R O 2 (VA – VO ) – RS kΩ Ro (2 VA – VR ) – RS kΩ 2 (VO – VA ) Magitude of the original ±VO Magnitude of the adjusted voltage The reference voltage from Table 1-1 The resistance value in Table 1-1 The series resistance from Table 1-1 +VO 5 Table 1-1 ADJUSTMENT RANGE AND FORMULA PARAMETERS ±VO Adj 7 Series Pt. No. 6 VO (nom) VA (min) VA (max) VR RO (kΩ) Ω) RS (kΩ COM R1 Adjust Up –VO 8 –VO Adjust Down: To decrease the magnitude of both output voltages, add a resistor (R2), between ±VO Adj (pin 7) and the +VO (pin 5) voltage rail; see Figure 1-1(b). PTB48600A 5V 3.31 V 6V 2.495 V 7.5 9.09 Notes: 1. A 0.05-W rated resistor may be used. The tolerance should be 1%, with a temperature stability of 100 ppm/°C or better. Place the resistor in either the R1 or (R2) location, as close to the converter as possible. 2. Never connect capacitors to the ±VO Adj pin. Capacitance added to this pin can affect the stability of the regulated output. Figure 1-1b PTB48600 +VO +VO 5 (R2) Adj Down ±VO Adj 7 6 COM 8 –VO For technical support and further information visit http://power.ti.com –VO Not Recommended for New Designs Application Notes PTB48600 & PTB4850x Configuring the PTB48600 & PTB4850x DC/DC Converters for DSL Applications Power-Up Sequencing The desired power-up sequence for the AC7 supply voltages requires that the two logic-level voltages from the PTB4850x converter rise to regulation prior to the two complementary voltages that power the transceiver ICs. This sequence cannot be guaranteed if the PTB4850x and PTB48600 are allowed to power up independently, especially if the 48-V input voltage rises relatively slowly. To ensure the desired power-up sequence, the “EN Out” pin of the PTB4850x is directly connected to the activelow “Enable” input of the PTB48600 (see Figure 2-1). This allows the PTB4850x to momentarily hold off the outputs from the PTB48600 until the logic-level voltages have risen first. Figure 2-2 shows the power-up waveforms of all four supply voltages from the schematic of Figure 2-1. When operated as a pair, the PTB48600 and PTB4850x converters are specifically designed to provide all the required supply voltages for powering xDSL chipsets. The PTB4850x produces two logic voltages. They include a 3.3-V source for logic and I/O, and a low-voltage for powering a digital signal processor core. The PTB48600 produces a balanced pair of complementary supply voltages that is required for the xDSL transceiver ICs. When used together in these types of applications, the PTB4850x and PTB48600 may be configured for power-up sequencing, and also synchronized to a common switch conversion frequency. Figure 2-1 shows the required cross-connects between the two converters to enable these two features. Figure 2-2; Power-Up Sequencing Waveforms Switching Frequency Synchronization Unsynchronized, the difference in switch frequency introduces a beat frequency into the input and output AC ripple components from the converters. The beat frequency can vary considerably with any slight variation in either converter’s switch frequency. This results in a variable and undefined frequency spectrum for the ripple waveforms, which would normally require separate filters at the input of each converter. When the switch frequency of the converters are synchronized, the ripple components are constrained to the fundamental and higher. This simplifies the design of the output filters, and allows a common filter to be specified for the treatment of input ripple. VCCIO (1 V/Div) VCORE (1 V/Div) +VTCVR (5 V/Div) –VTCVR (5 V/Div) HORIZ SCALE: 10 ms/Div Figure 2-1; Example of PTB4850x & PTB48600 Modules Configured for DSL Applications –48 V RTN VO2 Adj +VI + Input Filter –48 V – PTB4850xA VO 1 VCCIO VO 2 VCORE Enable –VI COM EN Out Sync Out Sync In ±VO Adj +VI +VO +VTCVR PTB48600A COM Enable –VI –VO –VTCVR For technical support and further information visit http://power.ti.com PACKAGE OPTION ADDENDUM www.ti.com 19-Dec-2019 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) PTB48600AAH NRND ThroughHole Module ERT 8 9 RoHS (In Work) & non-Green SN N / A for Pkg Type -40 to 85 PTB48600AAZ NRND Surface Mount Module ERU 8 9 RoHS (In Work) & non-Green SNAGCU Level-3-260C-168 HR -40 to 85 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of