PTH03010Y
PTH05010Y
PTH12010Y
www.ti.com
SLTS223A – MARCH 2004 – REVISED OCTOBER 2005
15-A NON-ISOLATED DDR/QDR
MEMORY BUS TERMINATION MODULES
FEATURES
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•
•
•
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VTT Bus Termination Output
(Output Tracks the System VREF)
15 A Output Current (12 A for 12-V Input)
3.3-V, 5-V or 12-V Input Voltage
DDR and QDR Compatible
On/Off Inhibit (for VTT Standby)
Undervoltage Lockout
Operating Temperature: –40°C to 85°C
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Efficiencies up to 91%
Output Overcurrent Protection
(Nonlatching, Auto-Reset)
62 W/in3 Power Density
Safety Agency Approvals
UL/cUL60950, EN60950, VDE
Point-of-Load Alliance (POLA™) Compatible
Nominal Size
1.37 in x 0.62 in
(34,8 mm x 15,75 mm)
DESCRIPTION
The PTHxx010Y are a series of ready-to-use switching regulator modules from Texas Instruments designed
specifically for bus termination in DDR and QDR memory applications. Operating from either a 3.3-V, 5-V or 12-V
input, the modules generate a VTT output that will source or sink up to 15 A of current (12 A for 12-V input) to
accurately track their VREF input. VTT is the required bus termination supply voltage, and VREF is the reference
voltage for the memory and chipset bus receiver comparators. VREF is usually set to half the VDDQ power supply
voltage.
Both the PTHxx010Y series employs an actively switched synchronous rectifier output to provide state-of-the-art
stepdown switching conversion. The products are small in size (1.37 in × 0.62 in), and are an ideal choice where
space, performance, and high efficiency are desired, along with the convenience of a ready-to-use module.
Operating features include an on/off inhibit and output over-current protection (source mode only). The on/off
inhibit feature allows the VTT bus to be turned off to save power in a standby mode of operation. To ensure tight
load regulation, an output remote sense is also provided. Package options include both throughhole and surface
mount configurations.
STANDARD APPLICATION
V IN
V REF
V DDQ
1k
1%
1
10
9
8
1k
1%
V TT
Con
hf−Ceramic
(Top View)
2
Q1
BSS138
(Optional)
6
3
4
5
Co1
Low−ESR
(Required)
Co2
Ceramic
(Optional)
V TTTermination Island
CIN
(Required)
Standby
7
PTHxx010Y
SSTL−2
Bus
GND
CIN = Required Capacitor; 470 µF (3.3 ± 5 V Input), 560 µF (12 V Input).
Co1 = Required Low-ESR Electrolyitic Capacitor; 470 µF (3.3 ± 5 V Input), 940 µF (12 V Input).
Co2 = Ceramic Capacitance for Optimum Response to a 3 A (± 1.5 A) Load Transient; 200 µF (3.3 ± 5 V Input), 400 µF (12 V Input).
Con = Distributed hf-Ceramic Decoupling Capacitors for VTT bus; as Recommended for DDR Memory Applications.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
POLA is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2004–2005, Texas Instruments Incorporated
PTH03010Y
PTH05010Y
PTH12010Y
www.ti.com
SLTS223A – MARCH 2004 – REVISED OCTOBER 2005
ORDERING INFORMATION
PTHXX010Y (Base Part Number)
Input Voltage
Part Number
3.3 V
5V
12 V
(1)
(2)
(3)
(4)
(1)
DESCRIPTION
Pb – free and
RoHS
(3)
Mechanical Package
(2)
PTH03010YAH
Horizontal T/H
Yes
PTH03010YAS
Standard SMD
No
(4)
EUH
EUJ
EUJ
PTH03010YAZ
Optional SMD
Yes
(3)
PTH05010YAH
Horizontal T/H
Yes
(3)
EUH
PTH05010YAS
Standard SMD
No
(4)
EUJ
EUJ
PTH05010YAZ
Optional SMD
Yes
(3)
PTH12010YAH
Horizontal T/H
Yes
(3)
EUH
PTH12010YAS
Standard SMD
No
(4)
EUJ
PTH12010YAZ
Optional SMD
Yes
(3)
EUJ
Add T to end of part number for tape and reel on SMD packages only.
Reference the applicable package reference drawing for the dimensions and PC board layout.
Lead (Pb) –free option specifies Sn/Ag pin solder material.
Standard option specifies 63/37, Sn/Pb pin solder material.
ENVIRONMENTAL AND ABSOLUTE MAXIMUM RATINGS
voltages are with respect to GND
UNIT
VREF
Control input voltage
TA
Operating temperature
range
Over VIN range
Twave
Wave solder temperature
Surface temperature of module body or pins
(5 seconds)
Treflow
Solder reflow temperature
Surface temperature of module body or pins
Ts
–0.3 V to Vin+03 V
2
260°C
(2)
PTHXX010YAS
235°C
(2)
PTHXX010YAZ
260°C
(2)
Storage temperature
–40°C to 125°C
Per Mil-STD-883D, Method 2002.3 1 msec, 1/2 Sine, mounted
500 G
Mechanical vibration
Mil-STD-883D, Method 2007.2 20-2000 Hz
20 G
Flammability
(2)
PTHXX010YAH
Mechanical shock
Weight
(1)
–40°C to 85°C (1)
3.7 grams
Meets UL 94V-O
For operation below 0°C the external capacitors must bave stable characteristics, use either a low ESR tantalum, Os-Con, or ceramic
capacitor.
During soldering of package version, do not elevate peak temperature of the module, pins or internal components above the stated
maximum.
PTH03010Y
PTH05010Y
PTH12010Y
www.ti.com
SLTS223A – MARCH 2004 – REVISED OCTOBER 2005
ELECTRICAL SPECIFICATIONS
TA = 25°C; nominal VIN; VREF = 1.25 V; CIN, CO1, and CO2 = typical values; and IO = IOmax (unless otherwise stated)
PARAMETER
TEST CONDITIONS
IO
Output current
Over ∆VREF range
VIN
Input voltage range
Over IO range
∆VREF
Tracking range for VREF
|VTT– VREF|
Tracking tolerance to VREF
Over line, load and temperature
η
Efficiency
Io = 10 A
Vr
Vo Ripple (pk-pk)
20 MHz bandwidth
Io trip
ttr
Overcurrent threshold
Load transient response
Vtr
Reset, followed by auto recovery
15 A/µs load step, from –1.5 A to
1.5 A
Under-voltage lockout
VIN Dncreasing
Inhibit control (pin 4)
Input high voltage
VIH
Inhibit control (pin 4)
Input low voltage
IIL inhibit
Inhibit control (pin 4)
Input low curent
Pin to GND
IIN inh
Input standby current
Inhibit (pin 3) to GND
Switching frequency
CIN
External input capacitance
Over VIN and IO ranges
Capacitance value: Nonceramic
CO1, CO2
External output capacitance
Capacitance value: Ceramic
(1)
(2)
(3)
(4)
(5)
(6)
Reliability
MAX
UNIT
±15 (1)
A
±12 (1)
PTH03010Y
2.95
PTH05010Y
4.5
5.5
PTH12010Y
10.8
13.2
0.55
1.8
V
–10
10
mV
3.65
PTH03010Y
88%
PTH05010Y
88%
PTH12010Y
85%
PTH03010Y/PTH05010Y
27.5
20
A
20
30
VO over/undershoot
30
40
PTH03010Y
2.45
2.8
PTH05010Y
4.3
4.45
PTH12010Y
9.5
10.4
PTH03010Y
2.0
2.40
PTH05010Y
3.4
3.7
PTH12010Y
8.8
9
µsec
VIN–0.5
Open (2)
–0.2
0.6
10
V
V
mA
250
300
350
PTH12010Y
200
250
300
PTH03010Y/PTH05010Y
470 (3)
PTH12010Y
560 (3)
PTH03010Y/PTH05010Y
470 (4)
8200 (5)
PTH12010Y
940 (4)
6600 (5)
kHz
µF
PTH03010Y/PTH05010Y
200 (4)
300
PTH12010Y
400 (4)
600
6
V
µA
PTH03010Y/PTH05010Y
4 (6)
mV
V
130
Per Bellcore TR-332 50 % stress, TA = 40°C, ground benign
V
mVpp
Recovery time
Equiv. series resistance (non-ceramic)
MTBF
TYP
0
PTH12010Y
Referenced to GND
VIL
fs
MIN
PTH12010Y
VIN Increasing
UVLO
PTH03010Y/PTH05010Y
µF
µF
mΩ
106 Hrs
Rating is conditional on the module being directly soldered to a 4-layer PCB with 1 oz. copper. See the SOA curves or contact the
factory for appropriate derating.
This control pin has an internal pull-up to the input voltage VIN. If it is left open-circuit the module will operate when input power is
applied. A small low-leakage (
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