PTH12010W, PTH12010L
www.ti.com
SLTS205G – JUNE 2003 – REVISED FEBRUARY 2007
12-A, 12-V INPUT NON-ISOLATED WIDE-OUTPUT
ADJUST POWER MODULE
FEATURES
APPLICATIONS
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Up to 12-A Output Current
12-V Input Voltage
Wide-Output Voltage Adjust
(1.2 V to 5.5 V)/(0.8 V to 1.8 V)
Efficiencies up to 94%
200 W/in3 Power Density
On/Off Inhibit
Output Voltage Sense
Prebias Startup
Undervoltage Lockout
Auto-Track™ Sequencing
Margin Up/Down Controls
Output Overcurrent Protection
(Nonlatching, Auto-Reset)
Operating Temperature: –40°C to 85°C
Safety Agency Approvals:
UL/IEC/CSA-22.2 60950-1
Point of Load Alliance (POLA™) Compatible
Complex Multivoltage, Multiprocessor
Systems
Nominal Size = 1.37 in x 0.62 in
(34,8 mm x 15,75 mm)
DESCRIPTION
The PTH12010 series of non-isolated power modules that are small in size but big on performance and
flexibility. The high output current, compact footprint, and industry-leading features offers system designers a
versatile module for powering complex multi-processor digital systems.
The series employs double-sided surface mount construction and provides high-performance step-down power
conversion for up to 12 A of output current. The output voltage of the W-suffix parts can be set to any value over
the range, 1.2 V to 5.5 V. The L-suffix devices have an adjustment range of 0.8 V to 1.8 V. The output voltage is
set using a single external resistor.
This series includes Auto-Track™ sequencing. Auto-Track simplifies the task of supply voltage sequencing in a
power system by enabling modules to track each other, or any external voltage, during power up and power
down.
Other operating features include an on/off inhibit, output voltage adjust (trim), margin up/down controls, and the
ability to start up into an existing output voltage or prebias. For improved load regulation, an output voltage
sense is also provided. A nonlatching overcurrent trip serves as load fault protection.
Target applications include complex multivoltage, multiprocessor systems that incorporate the industry’s
high-speed TMS320™ DSP family, microprocessors, and bus drivers.
For start-up into a non-prebiased output, review page 14 in the Application Information section.
For start-up into a prebiased output, review page 18 in the Application Information section.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Auto-Track, TMS320 are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2003–2007, Texas Instruments Incorporated
PTH12010W, PTH12010L
www.ti.com
SLTS205G – JUNE 2003 – REVISED FEBRUARY 2007
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
STANDARD APPLICATION
Track
Margin Down
Margin Up
1
10 9
8
7
PTH12010x
(Top View)
2
VI
VO
6
3
4
5
VOSense
CI
RSET, 1 %
(Required)
+
Inhibit
CO
330 mF
(Optional)
+
560 mF
(Required)
GND
GND
A.
L
O
A
D
RSET = Required to set the output voltage to a value higher than the lowest value (see the electrical characteristics
table for values).
ORDERING INFORMATION
For the most current package and ordering information, see the Package Option Addendum at the end of this datasheet, or see
the TI website at www.ti.com.
ABSOLUTE MAXIMUM RATINGS
Voltages are with respect to GND
MIN
Vtrack
Track Input Voltage
TA
Operating Temperature
Range
Over VI Range
Twave
Wave solder
temperature
Surface temperature of module body or pins
(5 seconds)
Treflow
Solder reflow
temperature
Surface temperature of module body or pins
Tstg
Storage Temperature
(1)
(2)
(3)
2
VI + 0.3
V
85
°C
PTH12010WAH
260
(2)
PTH12010WAS
235
(2)
PTH12010WAZ
260
(2)
125
(3)
Per Mil-STD-883D, Method 2002.3, 1 msec, 1/2 Sine, mounted
Mechanical Vibration
Mil-STD-883D, Method 2007.2
20-2000 Hz
UNIT
(1)
–55
Weight
MAX
–0.3
–40
Mechanical Shock
Flammability
TYP
°C
°C
500
G
20
G
5
grams
Meets UL 94V-O
For operation below 0°C the external capacitors must have stable characteristics. Use either a low-ESR tantalum, Os-Con, or ceramic
capacitor.
During soldering of package version, do not elevate peak temperature of the module, pins or internal components above the stated
maximum.
The shipping tray or tape and reel cannot be used to bake parts at temperatures higher than 65°C.
Submit Documentation Feedback
PTH12010W, PTH12010L
www.ti.com
SLTS205G – JUNE 2003 – REVISED FEBRUARY 2007
ELECTRICAL CHARACTERISTICS
TA = 25°C, VI = 12 V, VO = 3.3 V, CI = 560 µF, CO = 0 µF, and IO = IO max (Unless otherwise stated)
PTH12010W
CHARACTERISTICS
CONDITIONS
Io
Output current
1.2 V ≤ Vo≤ 5.5 V
VI
Input voltage range
Over Io range
Vo tol
Set-point voltage tolerance
MIN
TYP
MAX
60 °C, 200 LFM airflow
0
12 (1)
25 °C, natural convection
0
12 (1)
10.8
UNIT
A
13.2
V
±2 (2)
%Vo
∆Regtemp Temperature variation
–40 °C < TA < 85 °C
±0.5
%Vo
∆Regline
Line regulation
Over VI range
±10
mV
∆Regload
Load regulation
Over Io range
±12
∆Regtot
Total output variation
Includes set-point, line, load, –40°C ≤ TA ≤ 85°C
∆Vadj
Output voltage adjust range
Over VI range
η
Efficiency
IO = 8 A
1.2
94
RSET = 2.0 kΩ, Vo = 3.3V
93
RSET = 4.32 kΩ, Vo = 2.5V
91
RSET = 11.5 kΩ, Vo = 1.8V
89
RSET = 24.3 kΩ, Vo = 1.5V
88
RSET = OPEN, Vo = 1.2V
86
VO ripple (peak-to-peak)
20-MHz bandwidth
Io trip
Overcurrent threshold
Reset, followed by auto-recovery
Transient response
1 A/µs load step,
50 to 100% Iomax,
CO= 330 µF
ttr
∆Vtr
VOmargin
Margin up/down adjust
IILmargin
Margin Control
(pins 9 &10)
IILtrack
Track input current (pin 8)
Pin to GND
dVtrack/dt
Track slew rate capability
CO≤ CO(max)
UVLO
Undervoltage lockout
VIH
All Vo
Inhibit control (pin 3)
IIL
A
Recovery Time
70
µSec
Vo over/undershoot
100
mV
±5
%
–8 (3)
Margin input current, Pin to GND
1
VI increasing
9.5
VI decreasing
8.8
Input low voltage, Referenced to GND
–0.2
Switching frequency
Over VI and Io ranges
CI
External input capacitance
(5)
(6)
(7)
(8)
(9)
0.5
0.24
fs
(3)
(4)
10.4
9
Open (4)
Inhibit (pin 3) to GND, Track (pin 8) open
Reliability
µA
–0.13 (4)
Input low current, Pin 3 to GND
MTBF
%
% VO
Input standby current
External output capacitance
300
nonceramic
0 (6)
ceramic
0
mA
V/ms
V
V
mA
10
mA
350
400
330 (7)
6,600 (8)
560 (5)
Capacitance value
V
1
II
CO
%Vo
20
Input high voltage, Referenced to GND
VIL
(1)
(2)
5.5
RSET = 280 Ω, Vo = 5V
Vr
mV
±3 (2)
kHz
µF
300
µF
Equivalent series resistance (nonceramic)
4 (9)
mΩ
Bellcore TR-332,50% stress,TA=40°C, GND benign
6.4
106 Hr
See SOA curves or consult factory for appropriate derating.
The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a
tolerance of 1%, with 100 ppm/°C (or better) temperature stability.
A small, low-leakage (