PTN78020A
www.ti.com
SLTS244A – APRIL 2005 – REVISED MAY 2005
25-W, WIDE-INPUT ADJUSTABLE POSITIVE-TO-NEGATIVE VOLTAGE
REGULATOR MODULE
FEATURES
APPLICATIONS
•
•
•
•
•
•
•
•
•
•
4-A Output Current
Wide-Input Voltage
(9 V to 29 V)
Wide-Output Voltage Adjust
(–15 V to –3 V)
High Efficiency (Up to 87%)
Output Current Limit
Overtemperature Shutdown
Undervoltage Lockout
Operating Temperature: –40°C to 85°C
Surface-Mount Package Available
General-Purpose, Industrial Controls,
HVAC Systems, Test and Measurement,
Medical Instrumentation, AC/DC Adaptors,
Vehicles, Marine, and Avionics
DESCRIPTION
The PTN78020A is a series of high-efficiency buck-boost-integrated switching regulators (ISR), that represent the
third generation in the evolution of high-performance power modules designed for industrial use. The wide-input
voltage range makes these modules suitable for a variety of applications that operate off 12–V, 24–V, and
tightly-regulated 28–V dc power. In new designs, they should be considered in place of the PT6640 and
PT78NR100 series of single in-line pin (SIP) products. The PTN78020A is smaller and lighter than its
predecessors, and has either similar or improved electrical performance characteristics. The caseless,
double-sided package has excellent thermal characteristics, and is compatible with TI's roadmap for RoHS and
lead-free compliance.
The PTN78020A operates over an input voltage range of 9 V to 29 V, and provides high-efficiency,
positive-to-negative voltage conversion for loads of up to 4 A. The output voltage is set using a single external
resistor, and may be adjusted to any value within the range, –15 V to –3 V.
STANDARD APPLICATION
1
7
VO
PTN78020A
(Top View)
VI
6
2
3
C1*
100 mF
Electrolytic
(Required)
GND
C2*
4x 4.7 mF
Ceramic
(Required)
4
L
O
A
D
5
RSET#
1 %, 0.05 W
(Required)
C3*
100 mF
(Required)
GND
*See the Application Information for capacitor recommendation.
#RSET is required to adjust the output voltage lower than -3 V. See the Application Information for values.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2005, Texas Instruments Incorporated
PTN78020A
www.ti.com
SLTS244A – APRIL 2005 – REVISED MAY 2005
These devices have limited built-in ESD protection. The leads should be shorted together or the device
placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
PTN78020 (Basic Model)
Output Voltage
–15 V to –3 V
(1)
(2)
(3)
Part Number
Description
Package Designator
PTN78020AAH
Horizontal T/H (Pb-free)
EUK-7
PTN78020AAS (1) (2)
Horizontal SMD (standard)
EUL-7
PTN78020AAZ (1) (3)
Horizontal SMD (Pb-free)
EUL-7
Add a T suffix for tape and reel option on SMD packages.
Standard option specifies Sn/Pb solder ball material.
Lead (Pb) - free option specifies Sn/Ag solder ball material.
ABSOLUTE MAXIMUM RATINGS
(1)
over operating free-air temperature range unless otherwise noted
all voltages with respect to GND
UNIT
TA
Operating free-air temperature
Solder reflow temperature
TS
Storage temperature
PO
Output power
(1)
Over VI range
Surface temperature of module body or
pins
–40°C to 85°C
Horizontal SMD (suffix AS)
235°C
Horizontal SMD (suffix AZ)
260°C
–40°C to 125°C
|VO| ≥ 12 V
25 W
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
VI
Input voltage
TA
Operating free-air temperature
MIN
MAX
UNIT
9
32 – |VO|
V
-40
85
°C
PACKAGE SPECIFICATIONS
PTN78020x (Suffix AH, AS, & AZ)
Weight
7.3 grams
Flammability
Meets UL 94 V-O
Mechanical shock
Per Mil-STD-883D, Method 2002.3, 1 ms, ½ sine,
mounted
Mechanical vibration
(1)
2
Qualification limit.
Mil-STD-883D, Method 2007.2, 20-2000 Hz
250 Gs
(1)
Horizontal SMD (suffix AS and AZ)
125 Gs
(1)
Horizontal T/H (suffix AH)
20 Gs
(1)
Horizontal SMD (suffix AS and AZ)
10 Gs
(1)
Horizontal T/H (suffix AH)
PTN78020A
www.ti.com
SLTS244A – APRIL 2005 – REVISED MAY 2005
ELECTRICAL CHARACTERISTICS
operating at 25°C free-air temperature, VI = 20 V, VO = –5 V, IO = IO (max), CI = 100 µF and 4x 4.7 µF, C O = 100 µF (unless
otherwise noted)
PARAMETER
IO
Output current
VI
Input voltage range
VO
VO (adj)
η
TEST CONDITIONS
TA = 25°C, natural convection airflow
Over IO range
MIN
VO = -3 V
0.1
4
(1)
0.1
2.1
(1)
VO = -15 V
0.1
1.67
(1)
VO = -3 V
9
29
(2)
VO = -5 V
9
27
(2)
VO = -12 V
9
20
(2)
VO = -15 V
9
17
(2)
-40°C to +85°C
Over VI range
-10
Load regulation
Over IO range
-10
Total output voltage variation
Includes set point, line, load
-40 < TA < 85°C
9 V ≤ VI ≤ (32 – |VO|) V
V
mV
mV
-3%
-15
VI = 12 V, RSET = 2 kΩ, VO = –12 V
86%
VI = 20 V, RSET = 28.7 kΩ, VO = –5 V
82%
VI = 24 V, RSET = 221 kΩ, VO = –3.3 V
(3)
-3
87%
∆VO = –50 mV
A
-0.5%
VI = 12 V, RSET = 100 Ω, VO = –15 V
Current limit threshold
UNIT
±2% (3)
Line regulation
20-MHz bandwidth
(1)
0.1
Temperature variation
Output voltage ripple
4
VO = -5 V
TA = 25°C
Output voltage adjust range
MAX
VO = -12 V
Set-point voltage tolerance
Efficiency
IO (LIM)
TYP
V
77%
1% VO
V(PP)
8.5
A
1 A/µs load step from 50% to 100%
IOmax
Transient response
FS
Switching frequency
Over VI and IO ranges
UVLO
Undervoltage lockout
VI increasing
CI
External input capacitance
CO
External output capacitance
Recovery time
200
VO over/undershoot
5
440
18.8
(4)
Nonceramic
100
(4)
100
(5)
10
(6)
Ceramic
Equivalent series resistance (nonceramic)
MTBF
(1)
(2)
(3)
(4)
(5)
(6)
Calculated reliability
Per Telcordia SR-332, 50% stress,
TA = 40°C, ground benign
660
5.5
Ceramic
Nonceramic
550
µs
%VO
V
µF
200
5.6
kHz
2,000
µF
mΩ
106 Hrs
The maximum output current is 4 A, or a maximum output power of 25 W, whichever is less.
The maximum input voltage is limited and defined to be (32 – |VO|) volts.
The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a
tolerance of 1% with 100 ppm/°C or better temperature stability.
A minimum 100-µF electrolytic and four 4.7-µF ceramic capacitors are required across the input (VI and GND) for proper operation.
Locate the ceramic capacitors close to the module.
100 µF of output capacitance is required for proper operation. See the application information for further guidance.
This is the typical ESR for all the electrolytic (nonceramic) capacitance. Use 17 mΩ as the minimum when using max-ESR values to
calculate.
3
PTN78020A
www.ti.com
SLTS244A – APRIL 2005 – REVISED MAY 2005
PIN ASSIGNMENT
1
7
PTN78020A
(Top View)
2
6
3
4
5
TERMINAL FUNCTIONS
TERMINAL
I/O
DESCRIPTION
1, 7
O
The negative output voltage power connection. It is also the reference for the VO Adjust control input. For
proper operation, pins 1 and 7 must be connected.
VI
2
I
The positive input voltage power node to the module, which is referenced to common GND.
N/C
3
VO Adjust
4
N/C
5
GND
6
NAME
NO.
VO
4
This pin is active and must be isolated from any electrical connection.
I
A 1% resistor must be connected between pin 4 and pin 7 to set the output voltage of the module lower
than -3 V. If left open-circuit, the output voltage defaults to -3 V. The temperature stability of the resistor
should be 100 ppm/°C (or better). The set-point range is -15 V to -3 V. The standard resistor value for a
number of common output voltages is provided in the application information.
This pin is active and must be isolated from any electrical connection.
I/O
The common ground connection for VI and VO power connections.
PTN78020A
www.ti.com
SLTS244A – APRIL 2005 – REVISED MAY 2005
TYPICAL CHARACTERISTICS (9-V INPUT) (1) (2)
VO = -15 V
VO = -12 V
80
75
70
65
60
VO = -3 V
VO = -5 V
55
50
45
40
0
1
2
3
300
VO = -15 V
250
200
150
100
VO = -5 V
50
VO = -3 V
0
4
0
IO - Output Current - A
2
1.5
VO = -5 V
1
0.5
0
VO = -3 V
0
1
2
3
4
IO - Output Current - A
TEMPERATURE DERATING
vs
OUTPUT CURRENT
TEMPERATURE DERATING
vs
OUTPUT CURRENT
TEMPERATURE DERATING
vs
OUTPUT CURRENT
100 LFM
Nat conv
50
40
90
80
200 LFM
70
100 LFM
60
Nat conv
50
40
VO = -12 V
30
VO = -5 V
1
2
IO - Output Current - A
Figure 4.
3
4
80
200 LFM
70
100 LFM
60
Nat conv
50
40
VO = -15 V
30
20
20
0
2.5
Figure 3.
200 LFM
60
3
4
90
70
VO = -15 V
3.5
Figure 2.
Ambient Temperature - oC
Ambient Temperature - oC
3
2
VO = -12 V
Figure 1.
80
30
(2)
1
5
4.5
4
IO - Output Current - A
90
(1)
VO = -12 V
Ambient Temperature - oC
Efficiency - %
90
85
POWER DISSIPATION
vs
OUTPUT CURRENT
PD - Power Dissipation - W
100
95
OUTPUT VOLTAGE RIPPLE
vs
OUTPUT CURRENT
VO - Output Voltage Ripple - mVPP
EFFICIENCY
vs
OUTPUT CURRENT
20
0
0.3 0.6
0.9
1.2
1.5
IO - Output Current - A
Figure 5.
1.8
2.1
0
0.4
0.8
1.2
IO - Output Current - A
1.6
Figure 6.
The electrical characteristic data has been developed from actual products tested at 25°C. This data is considered typical for the
converter. Applies to Figure 1, Figure 2, and Figure 3.
The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum
operating temperatures. Derating limits apply to modules soldered directly to a 100 mm x 100 mm, double-sided PCB with 2 oz. copper.
Applies to Figure 4, Figure 5, and Figure 6.
5
PTN78020A
www.ti.com
SLTS244A – APRIL 2005 – REVISED MAY 2005
TYPICAL CHARACTERISTICS (12-V INPUT) (1) (2)
VO = -15 V
VO = -12 V
80
75
70
65
60
VO = -5 V
VO = -3 V
55
50
45
40
0
1
2
3
4
300
VO = -12 V
250
200
150
100
50
VO = -3 V
0
0
1
IO - Output Current - A
VO = -3 V
0
1
2
3
4
IO - Output Current - A
TEMPERATURE DERATING
vs
OUTPUT CURRENT
TEMPERATURE DERATING
vs
OUTPUT CURRENT
Ambient Temperature - oC
Ambient Temperature - oC
1
0.5
0
TEMPERATURE DERATING
vs
OUTPUT CURRENT
50
Nat conv
40
90
80
200 LFM
70
100 LFM
60
Nat conv
50
40
VO = -12 V
30
VO = -5 V
1
2
IO - Output Current - A
Figure 10.
3
4
80
200 LFM
70
100 LFM
60
Nat conv
50
40
VO = -15 V
30
20
20
6
2
1.5
Figure 9.
100 LFM
0
3
2.5
Figure 8.
200 LFM
60
VO = -5 V
VO = -15 V
Figure 7.
80
70
VO = -12 V
3.5
4
90
30
(2)
3
2
5
4.5
4
IO - Output Current - A
90
(1)
VO = -5 V
VO = -15 V
Ambient Temperature - oC
Efficiency - %
90
85
POWER DISSIPATION
vs
OUTPUT CURRENT
PD - Power Dissipation - W
100
95
OUTPUT VOLTAGE RIPPLE
vs
OUTPUT CURRENT
VO - Output Voltage Ripple - mVPP
EFFICIENCY
vs
OUTPUT CURRENT
20
0
0.3
0.6
0.9
1.2
1.5
IO - Output Current - A
Figure 11.
1.8
2.1
0
0.4
0.8
1.2
1.6
IO - Output Current - A
Figure 12.
The electrical characteristic data has been developed from actual products tested at 25°C. This data is considered typical for the
converter. Applies to Figure 7, Figure 8, and Figure 9.
The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum
operating temperatures. Derating limits apply to modules soldered directly to a 100 mm x 100 mm, double-sided PCB with 2 oz. copper.
Applies to Figure 10, Figure 11, and Figure 12.
PTN78020A
www.ti.com
SLTS244A – APRIL 2005 – REVISED MAY 2005
TYPICAL CHARACTERISTICS (24-V INPUT) (1) (2)
OUTPUT VOLTAGE RIPPLE
vs
OUTPUT CURRENT
VO - Output Voltage Ripple - mVPP
EFFICIENCY
vs
OUTPUT CURRENT
90
VO = -5 V
Efficiency - %
80
70
60
VO = -3 V
50
40
0
1
2
3
140
120
100
VO = -5 V
80
60
40
VO = -3 V
20
0
4
0
1
2
3
Figure 13.
Figure 14.
POWER DISSIPATION
vs
OUTPUT CURRENT
TEMPERATURE DERATING
vs
OUTPUT CURRENT
5
4.5
4
4
IO - Output Current - A
90
Ambient Temperature - oC
PD - Power Dissipation - W
IO - Output Current - A
VO = -5 V
3.5
3
2.5
2
1.5
VO = -3 V
1
0.5
0
80
70
200 LFM
60
100 LFM
50
Nat conv
40
30
0
1
2
3
IO - Output Current - A
4
VO = -5 V
20
0
1
2
3
4
IO - Output Current - A
Figure 15.
(1)
(2)
Figure 16.
The electrical characteristic data has been developed from actual products tested at 25°C. This data is considered typical for the
converter. Applies to Figure 13, Figure 14, and Figure 15.
The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum
operating temperatures. Derating limits apply to modules soldered directly to a 100 mm x 100 mm, double-sided PCB with 2 oz. copper.
Applies to Figure 16.
7
PTN78020A
www.ti.com
SLTS244A – APRIL 2005 – REVISED MAY 2005
APPLICATION INFORMATION
Adjusting the Output Voltage of the PTN78020A Wide-Output Adjust Power Modules
General
A resistor must be connected directly between the VO Adjust control (pin 4) and the output voltage (pin 7) to set
the output voltage lower than –3 V. The adjustment range is from –15 V to –3 V. If pin 4 is left open, the output
voltage defaults to the highest value, –3 V.
Table 1 gives the standard resistor value for a number of common voltages, and with the actual output voltage
that the value produces. For other output voltages, the resistor value can either be calculated using the following
formula, or simply selected from the range of values given in Table 2. Figure 17 shows the placement of the
required resistor.
RSET = 54.9 kW ´
1.25 V
|VO| - 3 V
- 5.62 kW
Input Voltage Considerations
The PTN78020A is a buck-boost switching regulator. In order that the output remains in regulation, the input
voltage must not exceed the output by a maximum differential voltage.
Another consideration is the pulse width modulation (PWM) range of the regulator's internal control circuit. For
stable operation, its operating duty cycle should not be lower than some minimum percentage. This defines the
maximum advisable ratio between the regulator's input and output voltage magnitudes.
For satisfactory performance, the maximum operating input voltage range must be equal to (32 - |VO|) volts.
As an example, Table 1 gives the operating input voltage range for the common output bus voltages. In addition,
the Electrical Characteristics define the available output voltage adjust range for various input voltages.
Table 1. Standard Values of Rset for Common Output
Voltages
VO
(Required)
RSET
(Standard Value)
VO
(Actual)
Operating
VI Range
–15 V
100 Ω
–14.997 V
9 V to 17 V
–12 V
2 kΩ
–12.006 V
9 V to 20 V
–5 V
28.7 kΩ
–5.000 V
9 V to 27 V
–3.3 V
221 kΩ
–3.303 V
9 V to 28.7 V
VI
C1
2
+
C2
VI
VO
PTN78020A V 1, 7
O
GND
Adj
6
4
RSET
0.05 W
1%
+
GND
GND
(1)
A 0.05-W rated resistor may be used. The tolerance should be 1%, with a temperature stability of 100 ppm/°C (or
better). Place the resistor as close to the regulator as possible. Connect the resistor directly between pins 4 and 1
using dedicated PCB traces.
(2)
Never connect capacitors from VO Adjust to either GND or Vout. Any capacitance added to the VO Adjust pin affects
the stability of the regulator.
Figure 17. VO Adjust Resistor Placement
8
C3
PTN78020A
www.ti.com
SLTS244A – APRIL 2005 – REVISED MAY 2005
Table 2. Output Voltage Set-Point Resistor Values
VO Required
RSET
VO Required
RSET
VO Required
RSET
–15.0 V
99 Ω
–11.9 V
2.09 kΩ
–8.8 V
6.21 kΩ
–14.9 V
147 Ω
–11.8 V
2.18 kΩ
–8.6 V
6.63 kΩ
–14.8 V
196 Ω
–11.7 V
2.27 kΩ
–8.4 V
7.09 kΩ
–14.7 V
245 Ω
–11.6 V
2.36 kΩ
–8.2 V
7.58 kΩ
–14.6 V
296 Ω
–11.5 V
2.45 kΩ
–8.0 V
8.11 kΩ
–14.5 V
347 Ω
–11.4 V
2.55 kΩ
–7.8 V
8.68 kΩ
–14.4 V
400 Ω
–11.3 V
2.65 kΩ
–7.6 V
9.30 kΩ
–14.3 V
453 Ω
–11.2 V
2.75 kΩ
–7.4 V
9.98 kΩ
–14.2 V
507 Ω
–11.1 V
2.82 kΩ
–7.2 V
10.7 kΩ
–14.1 V
562 Ω
–11.0 V
2.96 kΩ
–7.0 V
11.5 kΩ
–14.0 V
619 Ω
–10.9 V
3.07 kΩ
–6.8 V
12.4 kΩ
–13.9 V
676 Ω
–10.8 V
3.18 kΩ
–6.6 V
13.4 kΩ
–13.8 V
734 Ω
–10.7 V
3.29 kΩ
–6.4 V
14.6 kΩ
–13.7 V
794 Ω
–10.6 V
3.41 kΩ
–6.2 V
15.8 kΩ
–13.6 V
854 Ω
–10.5 V
3.53 kΩ
–6.0 V
17.3 kΩ
–13.5 V
916 Ω
–10.4 V
3.65 kΩ
–5.8 V
18.9 kΩ
–13.4 V
979 Ω
–10.3 V
3.78 kΩ
–5.6 V
20.7 kΩ
–13.3 V
1.04 kΩ
–10.2 V
3.91 kΩ
–5.4 V
22.9 kΩ
–13.2 V
1.11 kΩ
–10.1 V
4.04 kΩ
–5.2 V
25.6 kΩ
–13.1 V
1.18 kΩ
–10.0 V
4.18 kΩ
–5.0 V
28.7 kΩ
–13.0 V
1.24 kΩ
–9.9 V
4.33 kΩ
–4.8 V
32.5 kΩ
–12.9 V
1.31 kΩ
–9.8 V
4.47 kΩ
–4.6 V
37.2 kΩ
–12.8 V
1.38 kΩ
–9.7 V
4.62 kΩ
–4.4 V
43.4 kΩ
–12.7 V
1.46 kΩ
–9.6 V
4.78 kΩ
–4.2 V
51.6 kΩ
–12.6 V
1.52 kΩ
–9.5 V
4.94 kΩ
–4.0 V
63.0 kΩ
–12.5 V
1.60 kΩ
–9.4 V
5.10 kΩ
–3.8 V
80.1 kΩ
–12.4 V
1.68 kΩ
–9.3 V
5.27 kΩ
–3.6 V
109 kΩ
–12.3 V
1.76 kΩ
–9.2 V
5.45 kΩ
–3.4 V
166 kΩ
–12.2 V
1.84 kΩ
–9.1 V
5.63 kΩ
–3.2 V
338 kΩ
–12.1 V
1.92 kΩ
–9.0 V
5.82 kΩ
–3.0 V
OPEN
–12.0 V
2.01 kΩ
–8.9 V
6.01 kΩ
9
PTN78020A
www.ti.com
SLTS244A – APRIL 2005 – REVISED MAY 2005
CAPACITOR RECOMMENDATIONS FOR THE PTN78020 WIDE-OUTPUT
ADJUST POWER MODULES
Input Capacitor
The minimum requirement for the input capacitance is 18.8-µF (4× 4.7-µF) ceramic capacitance, in either a X5R
or X7R temperature characteristic, and 100-µF of nonceramic capacitance. Ceramic capacitors should be located
within 0.5 inch (1,27 cm) of the regulator's input pins. Electrolytic capacitors must be used at the input in addition
to the required ceramic capacitance. The minimum ripple current rating for any nonceramic capacitance must be
at least 750 mA rms for output currents of 3 A or less. The ripple current rating of electrolytic capacitors is a
major consideration when they are used at the input. This ripple current requirement can be reduced by placing
more ceramic capacitors at the input, in addition to the minimum required 18.8-µF.
Tantalum capacitors are not recommended for use at the input bus, as none were found to meet the minimum
voltage rating of 2 × (maximum dc voltage + ac ripple). This voltage derating is standard practice for regular
tantalum capacitors to ensure reliability. Polymer-tantalum capacitors are more reliable, and are available with a
maximum rating of typically 20 V. These can be used with input voltages up to 16 V.
Output Capacitor
The minimum electrolytic capacitance required to ensure stability is a 100-µF capacitor. Either ceramic or
electrolytic-type capacitors can be used. The minimum ripple current rating for the nonceramic capacitance must
be at least 250 mA rms. The stability of the module and voltage tolerances is compromised if the capacitor is not
placed near the output bus pins. A high-quality, computer-grade electrolytic capacitor should be adequate. A
ceramic capacitor can be also be located within 0.5 inch (1,27 cm) of the output pin.
For applications with load transients (sudden changes in load current), the regulator response improves with
additional capacitance. Additional electrolytic capacitors should be located close to the load circuit. These
capacitors provide decoupling over the frequency range, 2 kHz to 150 kHz. Aluminum electrolytic capacitors are
suitable for ambient temperatures above 0°C. For operation below 0°C, tantalum or Os-Con-type capacitors are
recommended. When using one or more nonceramic capacitors, the calculated equivalent ESR should be no
lower than 10 mΩ (17 mΩ using the manufacturer's maximum ESR for a single capacitor). A list of recommended
capacitors and vendors are identified in Table 3.
Ceramic Capacitors
Above 150 kHz, the performance of aluminum electrolytic capacitors becomes less effective. To further reduce
the reflected input ripple current or the output transient response, multilayer ceramic capacitors must be added.
Ceramic capacitors have low ESR, and their resonant frequency is higher than the bandwidth of the regulator.
When placed at the output, their combined ESR is not critical as long as the total value of ceramic capacitance
does not exceed 200 µF.
Tantalum Capacitors
Tantalum-type capacitors may be used at the output, and are recommended for applications where the ambient
operating temperature can be less than 0°C. The AVX TPS, Sprague 593D/594/595, and Kemet
T495/T510/T520 capacitors series are suggested over many other tantalum types due to their rated surge, power
dissipation, and ripple current capability. As a caution, many general-purpose tantalum capacitors have
considerably higher ESR, reduced power dissipation, and lower ripple current capability. These capacitors are
also less reliable as they have lower power dissipation and surge current ratings. Tantalum capacitors that do not
have a stated ESR or surge current rating are not recommended for power applications. When specifying
Os-Con and polymer-tantalum capacitors for the output, the minimum ESR limit is encountered well before the
maximum capacitance value is reached.
Capacitor Table
The capacitor table, Table 3, identifies the characteristics of capacitors from vendors with acceptable ESR and
ripple current (rms) ratings. The recommended number of capacitors required at both the input and output buses
is identified for each capacitor type. This is not an extensive capacitor list. Capacitors from other vendors are
available with comparable specifications. Those listed are for guidance. The rms rating and ESR (at 100 kHz) are
critical parameters necessary to ensure both optimum regulator performance and long capacitor life.
10
PTN78020A
www.ti.com
SLTS244A – APRIL 2005 – REVISED MAY 2005
Designing for Load Transients
The transient response of the dc/dc converter has been characterized using a load transient with a di/dt of
1 A/µs. The typical voltage deviation for this load transient is given in the data sheet specification table using the
required value of output capacitance. As the di/dt of a transient is increased, the response of a converter's
regulation circuit ultimately depends on its output capacitor decoupling network. This is an inherent limitation of
any dc/dc converter once the speed of the transient exceeds its bandwidth capability. If the target application
specifies a higher di/dt or lower voltage deviation, the requirement can only be met with additional output
capacitor decoupling. In these cases, special attention must be paid to the type, value, and ESR of the
capacitors selected.
Table 3. Recommended Input/Output Capacitors
CAPACITOR CHARACTERISTICS
QUANTITY
WORKING
VOLTAGE
(V)
VALUE
(µF)
EQUIVALENT
SERIES
RESISTANCE
(ESR) (Ω)
85°C
MAXIMUM
RIPPLE
CURRENT
(mArms)
FC( Radial)
35
180
0.090
755
10 × 16
FK (SMD)
50
330
0.12
900
12,5 × 13,5
United Chemi-Con PXA (SMD)
16
150
0.026
3430
10 × 12,2
PS
25
100
0.020
4320
LXZ
35
220
0.090
760
MVZ (SMD)
25
470
0.090
670
10 × 10
Nichicon UWG (SMD)
35
330
0.15
670
10 × 10
1
F550 (Tantalum)
10
100
0.055
2000
7,7 × 4,3
N/R
HD
50
150
0.061
979
10 × 12,5
1
CAPACITOR VENDOR/
COMPONENT
SERIES
PHYSICAL
SIZE
(mm)
INPUT
BUS
OUTPUT
BUS
1
VENDOR
NUMBER
1
EEUFC1V331 (VI < 30 V)
(1)
1
EEVFK1H181Q
1
(1)
≤1
PXA16VC151MJ80TP (VI, |VO|
< 14 V)
10 × 12,5
1
(1)
≤1
25PS100M J12 (VI < 20 V)
10 × 12,5
1
(1)
1
LXZ35VB221M10X12LL
1
MVZ25VC471MJ10TP (VI < 20
V)
1
1
1
(2)
≤3
UWG1V331MNR1GS
(3)
1
F551A107MN (VO ≤ 5 V)
UHD1H151MHR
≤1
20SVP150M (VI ≤ 16 V)
≤1
20SP180M (VI ≤ 16 V)
Sanyo Os-Con SVP (SMD)
20
150
0.020
4300
10 × 12,7
1
(1)
SP
20
120
0.024
3110
8 × 10,5
1
(1)
20
100
0.085
1543
7,3 L × 4,3
W × 4,1 H
N/R
(2)
≤3
TPSV107M020R0085
(|VO| ≤ 10 V)
20
100
0.200
> 817
3225
N/R
(2)
≤3
TPSE107M020R0200
(|VO| ≤ 10 V)
Murata X5R Ceramic
6.3
100
0.002
>1000
3225
N/R
(2)
≤2
GRM32ER60J107M
(|VO| ≤ 5.5 V)
TDK X5R Ceramic
6.3
100
0.002
>1000
3225
N/R
(2)
≤2
C3225X5R0J107MT
(|VO| ≤ 5.5 V)
Murata X5R Ceramic
16
47
0.002
>1000
3225
4
≤4
GRM32ER61C476M
(|Vo| ~ VI ≤ 13.5 V)
Kemet X5R Ceramic
6.3
47
0.002
>1000
3225
N/R
(2)
≤4
C1210C476K9PAC
(|VO| ≤ 5.5 V)
TDK X5R Ceramic
6.3
47
0.002
>1000
3225
N/R
(2)
≤4
C3225X5R0J476MT
(|VO| ≤ 5.5 V)
Murata X5R Ceramic
6.3
47
0.002
>1000
3225
N/R
(2)
≤4
GRM42-2X5R476M6.3
(|VO| ≤ 5.5 V)
TDK X7R Ceramic
25
2.2
0.002
>1000
3225
≥8
(4)
1
C3225X7R1E225KT/MT
(|VO| ≤ 20 V)
Murata X7R Ceramic
25
2.2
0.002
>1000
3225
≥8
(4)
1
GRM32RR71E225K
(|VO| ≤ 20 V)
Kemet X7R Ceramic
25
2.2
0.002
>1000
3225
≥8
(4)
1
C1210C225K3RAC
(VI, |VO| ≤ 20 V)
AVX X7R Ceramic
25
2.2
0.002
>1000
3225
≥8
(4)
1
C12103C225KAT2A
(VI, |VO| ≤ 20 V)
AVX Tantalum TPS (SMD)
(1)
(2)
(3)
(4)
(1)
The voltage rating of the input capacitor must be selected for the desired operating input voltage range of the regulator. To operate the
regulator at a higher input voltage, select a capacitor with the next higher voltage rating.
Not recommended (N/R). The voltage rating does not meet the minimum operating limits in most applications.
The maximum voltage rating of the capacitor must be selected for the desired set-point voltage (VO ). To operate at a higher output
voltage, select a capacitor with a higher voltage rating.
The maximum rating of the ceramic capacitor limits the regulator operating input voltage to 20 V. Select a alternative ceramic
component to operate at a higher input voltage.
11
PTN78020A
www.ti.com
SLTS244A – APRIL 2005 – REVISED MAY 2005
Table 3. Recommended Input/Output Capacitors (continued)
CAPACITOR CHARACTERISTICS
QUANTITY
WORKING
VOLTAGE
(V)
VALUE
(µF)
EQUIVALENT
SERIES
RESISTANCE
(ESR) (Ω)
85°C
MAXIMUM
RIPPLE
CURRENT
(mArms)
Kemet X7R Ceramic
50
1.0
0.002
>1000
3225
1
C1210C105K5RAC
Murata X7R Ceramic
50
4.7
0.002
>1000
3225
≥4
1
GRM32ER71H475KA88L
TDK X7R Ceramic
50
2.2
0.002
>1000
3225
≥8
1
C3225X7R1H225KT
Murata X7R Ceramic
50
1.0
0.002
>1000
3225
CAPACITOR VENDOR/
COMPONENT
SERIES
PHYSICAL
SIZE
(mm)
INPUT
BUS
N/R
(2)
VENDOR
NUMBER
N/R
(2)
1
GRM32RR71H105KA01L
1
C3225X7R1H105KT
1
C330C105K5R5CA
1
RPER71H2R2KK6F03
TDK X7R Ceramic
50
1.0
0.002
>1000
3225
N/R
(2)
Kemet Radial Through-hole
50
1.0
0.002
>1000
5,08 × 7,62
× 9,14 H
N/R
(2)
Murata Radial Through-hole
50
2.2
0.004
>1000
10 H × 10
W×4D
12
OUTPUT
BUS
≥8
PTN78020A
www.ti.com
SLTS244A – APRIL 2005 – REVISED MAY 2005
Power-Up Characteristics
When configured per the standard application, the PTN78020A power module produces a regulated output
voltage following the application of a valid input source voltage. During power up, internal soft-start circuitry slows
the rate that the output voltage rises, thereby limiting the amount of in-rush current that can be drawn from the
input source. The soft-start circuitry introduces a short time delay (typically 5 ms – 10 ms) into the power-up
characteristic. This is from the point that a valid input source is recognized. Figure 18 shows the power-up
waveforms for a PTN78020A, operating from a 12-V input and with the output voltage adjusted to –5-V. The
waveforms were measured with a 3-A resistive load.
VI (5 V/div)
VO (2 V/div)
II (2 A/div)
t - Time = 5 ms/div
Figure 18. Power-Up Waveforms
Undervoltage Lockout
The undervoltage lockout (UVLO) circuit prevents the module from attempting to power up until the input voltage
is above the UVLO threshold. This prevents the module from drawing excessive current from the input source at
power up. Below the UVLO threshold, the module is held off.
Current Limit Protection
The PTN78020 modules protect against load faults with a continuous current limit characteristic. Under a load
fault condition, the output current cannot exceed the current limit value. Attempting to draw current that exceeds
the current limit value causes the module to progressively reduce its output voltage. Current is continuously
supplied to the fault until it is removed. On removal of the fault, the output voltage promptly recovers. When
limiting output current, the regulator experiences higher power dissipation, which increases its temperature. If the
temperature increase is excessive, the module overtemperature protection begins to periodically turn the output
voltage completely off.
Overtemperature Protection
A thermal shutdown mechanism protects the module's internal circuitry against excessively high temperatures. A
rise in temperature may be the result of a drop in airflow, a high ambient temperature, or a sustained current limit
condition. If the junction temperature of the internal control IC rises excessively the module turns itself off,
reducing the output voltage to zero. The module instantly restarts when the sensed temperature decreases by a
few degrees.
Overtemperature protection is a last-resort mechanism to prevent damage to the module. It should not be relied
on as permanent protection against thermal stress. Always operate the module within its temperature derated
limits, for the worst-case operating conditions of output current, ambient temperature, and airflow. Operating the
module above these limits, albeit below the thermal shutdown temperature, reduces the long-term reliability of
the module.
13
PTN78020A
www.ti.com
SLTS244A – APRIL 2005 – REVISED MAY 2005
Optional Input/Output Filters
Power modules include internal input and output ceramic capacitors in all of their designs. However, some
applications require much lower levels of either input reflected or output ripple/noise. This application describes
various filters and design techniques found to be successful in reducing both input and output ripple/noise.
Input/Output Capacitors
The easiest way to reduce output ripple and noise is to add one or more 1-µF ceramic capacitors, such as C5
shown in Figure 19. Ceramic capacitors should be placed close to the output power terminals. A single 1-µF
capacitor reduces the output ripple/noise by 10% to 30% for modules with a rated output current of less than 3 A.
(Note: C4 is required to improve the regulator transient response, and does not reduce output ripple and noise.)
Switching regulators draw current from the input line in pulses at their operating frequency. The amount of
reflected (input) ripple/noise generated is directly proportional to the equivalent source impedance of the power
source including the impedance of any input lines. The addition of C1, minimum 1-µF ceramic capacitor, near the
input power pins, reduces reflected conducted ripple/noise by 10% to 30%.
VI
2
C1
1 mF
50 V
C2
100 mF
Electrolytic
PTN78020A
VI
VO
GND
Adjust
6
4
C3*
4 x 4.7 mF
Ceramic
(Required)
VO
1, 7
#
RSET
C4
100 mF
(Required)
GND
C5
1 mF
Ceramic
GND
* See the specifications for required value and type.
# See the Application Information for suggested value and type.
Figure 19. Adding High-Frequency Bypass Capacitors to the Input and Output
π Filters
If a further reduction in ripple/noise level is required for an application, higher order filters must be used. A π (pi)
filter, employing a ferrite bead (Fair-Rite Pt. No. 2673000701 or equivalent) in series with the input or output
terminals of the regulator reduces the ripple/noise by at least 20 db (see Figure 20 and Figure 21). In order for
the inductor to be effective in reduction of ripple and noise-ceramic capacitors are required. (See Capacitor
Recommendations for the PTN78020A for additional information on vendors and component suggestions.)
These inductors plus ceramic capacitors form an excellent filter because of the rejection at the switching
frequency (650 kHz - 1 MHz). The placement of this filter is critical. It must be located as close as possible to the
input or output pins to be effective. The ferrite bead is small (12,5 mm × 3 mm), easy to use, low cost, and has
low dc resistance. Fair-Rite also manufactures a surface-mount bead (part number 2773021447), through hole
(part number 2673000701) rated to 5 A. 1-µH to 5-µH inductors can be used in place of the ferrite inductor bead.
14
PTN78020A
www.ti.com
SLTS244A – APRIL 2005 – REVISED MAY 2005
VI
L1
1 - 5 mH
2
PTN78020A
VI
GND
C2
100 mF
Electrolytic
(Required)
1, 7
VO
Adjust
6
C1
1 mF
Ceramic
VO
L2
1 - 5 mH
4
#
C3*
18.8 mF
Ceramic
(Required)
C4
100 mF
(Required)
RSET
GND
C5
1 mF
Ceramic
C6
†
GND
* See the specifications for required value and type.
# See the Application Information for suggested value and type.
† Recommended for applications with load transients.
Figure 20. Adding π Filters (IO ≤ 4 A)
45
40
Attenuation − dB
35
1 MHz
30
25
20
600 kHz
15
10
0
0.5
1
1.5
2
Load Current − A
2.5
3
Figure 21. π-Filter Attenuation vs. Load Current
15
PACKAGE OPTION ADDENDUM
www.ti.com
15-Mar-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
(3)
Device Marking
(4/5)
(6)
PTN78020AAH
ACTIVE
ThroughHole Module
EUK
7
20
RoHS (In Work)
& non-Green
SN
N / A for Pkg Type
-40 to 85
PTN78020AAS
ACTIVE
Surface
Mount Module
EUL
7
20
Non-RoHS
& non-Green
SNPB
Level-1-235C-UNLIM/
Level-3-260C-168HRS
-40 to 85
PTN78020AAZ
ACTIVE
Surface
Mount Module
EUL
7
20
RoHS (In Work)
& non-Green
SNAGCU
Level-3-260C-168 HR
-40 to 85
PTN78020AAZT
ACTIVE
Surface
Mount Module
EUL
7
200
RoHS (In Work)
& non-Green
SNAGCU
Level-3-260C-168 HR
-40 to 85
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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