REF102C

® REF 102 REF102 REF 102 Precision VOLTAGE REFERENCE FEATURES q +10V ±0.0025V OUTPUT q VERY LOW DRIFT: 2.5ppm/°C max q EXCELLENT STABILITY: 5ppm/1000hr typ q EXCELLENT LINE REGULATION: 1ppm/V max q EXCELLENT LOAD REGULATION: 10ppm/mA max q LOW NOISE: 5µVp-p typ, 0.1Hz to 10Hz q WIDE SUPPLY RANGE: 11.4VDC to 36VDC q LOW QUIESCENT CURRENT: 1.4mA max q PACKAGE OPTIONS: HERMETIC TO-99, PLASTIC DIP, SOIC Trim 5 V+ 2 APPLICATIONS q PRECISION-CALIBRATED VOLTAGE STANDARD q D/A AND A/D CONVERTER REFERENCE q PRECISION CURRENT REFERENCE q ACCURATE COMPARATOR THRESHOLD REFERENCE q DIGITAL VOLTMETERS q TEST EQUIPMENT q PC-BASED INSTRUMENTATION DESCRIPTION The REF102 is a precision 10V voltage reference. The drift is laser-trimmed to 2.5ppm/°C max (CM grade) over the industrial temperature range and 5ppm/°C max (SM grade) over the military temperature range. The REF102 achieves its precision without a heater. This results in low power, fast warm-up, excellent stability, and low noise. The output voltage is extremely insensitive to both line and load variations and can be externally adjusted with minimal effect on drift and stability. Single supply operation from 11.4V to 36V and excellent overall specifications make the REF102 an ideal choice for demanding instrumentation and system reference applications. R5 50k Ω R2 14k Ω R3 8k Ω – R1 22k Ω A1 + 6 V OUT R6 7k Ω R4 4k Ω DZ1 8 4 Noise Common Reduction International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111 Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 © 1989 Burr-Brown Corporation PDS-900E Printed in U.S.A. October, 1993 SPECIFICATIONS ELECTRICAL At TA = +25 °C and VS = +15V power supply, unless otherwise noted. REF102A, R PARAMETER OUTPUT VOLTAGE Initial vs Temperature (1) vs Supply (Line Regulation) vs Output Current (Load Regulation) vs Time M Package P, U Packages (2) Trim Range (3) Capacitive Load, max NOISE OUTPUT CURRENT INPUT VOLTAGE RANGE QUIESCENT CURRENT WARM-UP TIME (4) TEMPERATURE RANGE Specification REF102A, B, C REF102R, S T Specifications same as REF102A/R. NOTES: (1) The “box” method is used to specify output voltage drift vs temperature. See the Discussion of Performance section. (2) Typically 5ppm/1000hrs after 168hr powered stabilization. (3) Trimming the offset voltage affects drift slightly. See Installation and Operating Instructions for details. (4) With noise reduction pin floating. See Typical Performance Curves for details. (IOUT = 0) (To 0.1%) 15 CONDITIONS TA = 25°C MIN 9.99 TYP MAX 10.01 10 2 20 40 5 20 ±3 1000 (0.1Hz to 10Hz) +10, –5 +11.4 +36 +1.4 T 5 T T T T T T T T T T T T T T T T T MIN 9.995 REF102B, S TYP MAX 10.005 5 1 10 20 T MIN 9.9975 REF102C, M TYP MAX 10.0025 2.5 1 10 20 UNITS V ppm/°C ppm/V ppm/mA ppm/mA ppm/1000hr ppm/1000hr % pF µVp-p mA V mA µs VS = 11.4V to 36V IL = 0mA to +10mA IL = 0mA to –5mA TA = 25° –25 –55 +85 +125 T T T T T T °C °C The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. ® REF102 2 ORDERING INFORMATION PRODUCT REF102AU REF102AP REF102BP REF102AM REF102BM REF102CM REF102RM REF102SM PACKAGE 8-Pin SOIC 8-Pin Plastic DIP 8-Pin Plastic DIP Metal TO-99 Metal TO-99 Metal TO-99 Metal TO-99 Metal TO-99 TEMPERATURE RANGE –25°C to +85°C –25°C to +85°C –25°C to +85°C –25°C to +85°C –25°C to +85°C –25°C to +85°C –55°C to +125°C –55°C to +125°C MAX INITIAL ERROR (mV) ±10 ±10 ±5 ±10 ±5 ±2.5 ±10 ±5 MAX DRIFT (ppm/°C) ±10 ±10 ±5 ±10 ±5 ±2.5 ±10 ±5 PIN CONFIGURATIONS Top View NC V+ NC Com 1 2 3 4 8 7 6 5 DIP/SOIC Noise Reduction NC V OUT Trim ABSOLUTE MAXIMUM RATINGS Input Voltage ...................................................................................... +40V Operating Temperature P,U .................................................................................. –25°C to +85°C M ................................................................................... –55°C to +125°C Storage Temperature Range P,U .................................................................................. –40°C to +85°C M ................................................................................... –65°C to +150°C Lead Temperature (soldering, 10s) ................................................ +300°C (SOIC, 3s) ....................................................... +260°C Short-Circuit Protection to Common or V+ ............................... Continuous Top View Noise Reduction NC 1 V+ NC 2 3 4 Common 5 Trim 8 7 6 VOUT NC TO-99 PACKAGE INFORMATION PRODUCT REF102AU REF102AP REF102BP REF102AM REF102BM REF102CM REF102RM REF102SM PACKAGE 8-Pin SOIC 8-Pin Plastic DIP 8-Pin Plastic DIP Metal-TO-99 Metal-TO-99 Metal-TO-99 Metal-TO-99 Metal-TO-99 PACKAGE DRAWING NUMBER(1) 182 006 006 001 001 001 001 001 ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. ® 3 REF102 TYPICAL PERFORMANCE CURVES At TA = +25°C, VS = +15V, unless otherwise noted. POWER TURN-ON RESPONSE POWER TURN-ON RESPONSE with 1µF Cn VOUT FPO VOUT FPO FPO VIN VIN Time (5µs/div) Power Turn-On Time (10ms/div) Power Turn-On POWER SUPPLY REJECTION vs FREQUENCY 130 Power Supply Rejection (dB) LOAD REGULATION +1.5 Output Voltage Change (mV) 120 110 100 90 80 70 60 1 100 Frequency (Hz) 1k 10k +1.0 +0.5 0 –0.5 –1.0 –1.5 –5 0 +5 +10 Output Current (mA) RESPONSE TO THERMAL SHOCK +600 Output Voltage Change (µV) 1.6 QUIESCENT CURRENT vs TEMPERATURE Quiescent Current (mA) +300 1.4 0 1.2 –300 TA = +25°C –600 0 REF102CM Immersed in +85°C Fluorinert Bath TA = +85°C 1.0 0.8 15 30 Time (s) 45 60 –75 –50 –25 0 +25 +50 +75 +100 +125 Temperature (°C) ® REF102 4 TYPICAL PERFORMANCE CURVES (CONT) At TA = +25°C, VS = +15V, unless otherwise noted. TYPICAL REF102 REFERENCE NOISE 6 Noise Voltage (µV) 4 2 0 20Ω 2kΩ Oscilloscope FPO 100µF DUT 15.8kΩ – OPA27 + 8KΩ 2µF –2 –4 –6 Gain = 100V/V f –3dB = 0.1Hz and 10Hz Noise Test Circuit. Low Frequency Noise (1s /div) (See Noise Test Circuit) ® 5 REF102 THEORY OF OPERATION Refer to the diagram on the first page of this data sheet. The 10V output is derived from a compensated buried zener diode DZ1, op amp A1, and resistor network R1–R6. Approximately 8.2V is applied to the non-inverting input of A1 by DZ1. R1, R2, and R3 are laser-trimmed to produce an exact 10V output. The zener bias current is established from the regulated output voltage through R4. R5 allows usertrimming of the output voltage by providing for small external adjustment of the amplifier gain. Because the TCR of R5 closely matches the TCR of R1, R2 and R3 , the voltage trim has minimal effect on the reference drift. The output voltage noise of the REF102 is dominated by the noise of the zener diode. A capacitor can be connected between the Noise Reduction pin and ground to form a low-pass filter with R6 and roll off the high-frequency noise of the zener. INSTALLATION AND OPERATING INSTRUCTIONS BASIC CIRCUIT CONNECTION Figure 2 shows the proper connection of the REF102. To achieve the specified performance, pay careful attention to layout. A low resistance star configuration will reduce voltage errors, noise pickup, and noise coupled from the power supply. Commons should be connected as indicated being sure to minimize interconnection resistances. (1) 2 V+ + 1µF Tantalum 6 (2) REF102 RL 1 RL 2 RL 3 DISCUSSION OF PERFORMANCE The REF102 is designed for applications requiring a precision voltage reference where both the initial value at room temperature and the drift over temperature are of importance to the user. Two basic methods of specifying voltage reference drift versus temperature are in common usage in the industry—the “butterfly method” and the “box method.” The REF102 is specified with the more commonly used “box method.” The “box” is formed by the high and low specification temperatures and a diagonal, the slope of which is equal to the maximum specified drift. Since the shape of the actual drift curve is not known, the vertical position of the box is not exactly known either. It is, however, bounded by VUPPER BOUND and VLOWER BOUND (see Figure 1). Figure 1 uses the REF102CM as an example. It has a drift specification of 2.5ppm/°C maximum and a specification temperature range of –25°C to +85°C. The “box” height, V1 to V2, is 2.75mV. REF102BM VUPPER BOUND 4 (1) (2) NOTES: (1) Lead resistances here of up to a few ohms have negligible effect on performance. (2) A resistance of 0.1Ω in series with these leads will cause a 1mV error when the load current is at its maximum of 10mA. This results in a 0.01% error of 10V. FIGURE 2. REF102 Installation. OPTIONAL OUTPUT VOLTAGE ADJUSTMENT Optional output voltage adjustment circuits are shown in Figures 3 and 4. Trimming the output voltage will change the voltage drift by approximately 0.008ppm/°C per mV of trimmed voltage. In the circuit in Figure 3, any mismatch in TCR between the two sections of the potentiometer will also affect drift, but the effect of the ∆TCR is reduced by a factor of five by the internal resistor divider. A high quality potentiometer, with good mechanical stability, such as a cermet, should be used. The circuit in Figure 3 has a minimum trim range of ±300mV. The circuit in Figure 4 has less range but provides higher resolution. The mismatch in TCR between RS and the internal resistors can introduce some slight drift. This effect is minimized if RS is kept significantly larger than the 50kΩ internal resistor. A TCR of 100ppm/°C is normally sufficient. V+ + 1µF Tantalum VOUT 6 REF102 VTRIM 5 20k Ω Output Voltage Adjust +10V +10.00275 Output Voltage (V) V1 VNOMINAL +10.0000 V2 +9.99725 REF102BM VLOWER BOUND –25 0 +25 +50 Temperature (°C) +85 2.75mV Worst-case ∆VOUT for REF102CM 2 FIGURE 1. REF102CM Output Voltage Drift. 4 Minimum range (±300mV) and minimal degradation of drift. FIGURE 3. REF102 Optional Output Voltage Adjust. ® REF102 6 APPLICATIONS INFORMATION V+ + 1µF Tantalum VOUT 6 REF102 VTRIM 5 RS 1M Ω 4 REF102 6 2 High accuracy, extremely low drift, outstanding stability, and low cost make the REF102 an ideal choice for all instrumentation and system reference applications. Figures 6 through 14 show a variety of useful application circuits. +10V V+ (1.4V to 26V) 2 20k Ω Output Voltage Adjust Higher resolution, reduced range (typically ±25mV). 1.4mA < (5V –IL ) < 5.4mA RS 4 –10V Out RS –15V a) Resister Biased –10V Reference R1 2kΩ C1 1000pF 4 REF102 6 10V IL FIGURE 4. REF102 Optional Output Voltage Fine Adjust. OPTIONAL NOISE REDUCTION The high-frequency noise of the REF102 is dominated by the zener diode noise. This noise can be greatly reduced by connecting a capacitor between the Noise Reduction pin and ground. The capacitor forms a low pass filter with R6 (refer to the figure on the first page of the data sheet) and attenuates the high-frequency noise generated by the zener. Figure 5 shows the effect of a 1µF noise reduction capacitor on the high frequency noise of the REF102. R6 is typically 7kΩ so the filter has a –3dB frequency of about 22Hz. The result is a reduction in noise from about 800µVp-p to under 200µ Vp-p. If further noise reduction is required, use the circuit in Figure 14. V+ (1.4V to 26V) 2 OPA27 –10V Out b) Precision –10V Reference. See AB-004 for more detail FIGURE 6. –10V Reference Using a) Resistor or b) OPA27. NO CN CN = 1µF FIGURE 5. Effect of 1µF Noise Reduction Capacitor on Broadband Noise (f–3dB = 1MHz). ® 7 REF102 V+ 2 – V+ 220Ω +10V IL 2 2N2905 V+ REF102 6 OPA27 + 2 R1 = VCC – 10V IL (TYP) 6 4 REF102 6 IL +10V REF102 IL +10V 4 a) –20mA < IL < +20mA (OPA27 also improves transient immunity) b) –5mA < IL < +100mA 4 c) I L (MAX) = I L (TYP) +10mA I L (MIN) = I L (TYP) –5mA FIGURE 7. +10V Reference With Output Current Boosted to: a) ±20mA, b) +100mA, and c) IL (TYP) +10mA, –5A. +15V 28mA 2 6 357Ω 1/2W 28.5mA +5V 350 Ω Strain Gauge Bridge REF102 5 4 RG – 6 OPA27 + 3 2 10 – INA101 + 8 V OUT x100 –5V 357Ω 1/2W –15V FIGURE 8. Strain Gauge Conditioner for 350Ω Bridge. V+ 2 V+ 2 6 REF102 2 25kΩ 4 3 1 25kΩ 25kΩ INA105 25kΩ 6 5 +10V Out –10V Out REF102 6 R 4 – I OUT LOAD Can be connected to ground or –VS . OPA111 + IOUT = 10V , R ≥ 1kΩ R See AB-002 for more details and I Sink Circuit. See AB-005 for more details. FIGURE 9. ±10V Reference. ® FIGURE 10. Positive Precision Current Source. 8 REF102 31.4V to 56V 2 V+ 2 6 +10V REF102 6 +30V REF102 INA105 2 5 4 2 4 – 6 3 +5V REF102 6 +20V + 1 4 2 FIGURE 13. +5V and +10V Reference. REF102 6 +10V V+ 2 4 6 2kΩ NOTES: (1) REF102s can be stacked to obtain voltages in multiples of 10V. (2) The supply voltage should be between 10n + 1.4 and 10n + 26 where n is the number of REF102s. (3) Output current of each REF102 must not exceed its rated output current of +10, –5mA. This includes the current delivered to the lower REF102. REF102 (1) VOUT 1 R2 2k Ω 4 C2 V+ 2 1µF 2– 6 2kΩ OPA27 3+ R1 1k Ω FIGURE 11. Stacked References. V+ 2 +5V Out 4 REF102 (2) VOUT 2 +10V 6 REF102 2 INA105 5 4 C1 1µF VREF –5V Out V+ 2 2kΩ – 6 + 6 REF102 (N) VOUT N VREF = (VO1 + VO2 ....VOUT N N ) eN = 5µVp-p (f = 0.1Hz to 1Mhz) 1 3 4 N See AB-003 for more details. FIGURE 12. ±5V Reference. FIGURE 14. Precision Voltage Reference with Extremely Low Noise. ® 9 REF102