REF200

® REF 200 REF200 REF 200 DUAL CURRENT SOURCE/CURRENT SINK FEATURES q COMPLETELY FLOATING: No Power Supply or Ground Connections q HIGH ACCURACY: 100µA ±0.5% q LOW TEMPERATURE COEFFICIENT: ±25ppm/°C q WIDE VOLTAGE COMPLIANCE: 2.5V to 40V q ALSO INCLUDES CURRENT MIRROR APPLICATIONS q SENSOR EXCITATION q BIASING CIRCUITRY q OFFSETTING CURRENT LOOPS q LOW VOLTAGE REFERENCES q CHARGE-PUMP CIRCUITRY q HYBRID MICROCIRCUITS DESCRIPTION The REF200 combines three circuit building-blocks on a single monolithic chip—two 100µA current sources and a current mirror. The sections are dielectrically isolated, making them completely independent. Also, since the current sources are twoterminal devices, they can be used equally well as current sinks. The performance of each section is individually measured and laser-trimmed to achieve high accuracy at low cost. The sections can be pin-strapped for currents of 50µA, 100µA, 200µA, 300µA or 400µA. External circuitry can be used to obtain virtually any current. These and many other circuit techniques are shown in the Applications section of this Data Sheet. The REF200 is available in plastic 8-pin mini-DIP and SOIC packages. I1 High 8 I2 High 7 Substrate 6 Mirror In 5 100µA 100µA 1 I1 Low 2 I2 Low 3 Mirror Common 4 Mirror Out International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111 Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 © 1988 Burr-Brown Corporation PDS-851D Printed in U.S.A. October, 1993 SPECIFICATIONS ELECTRICAL At TA = +25°C, VS = 15V, unless otherwise noted. REF200AP, AU PARAMETER CURRENT SOURCES Current Accuracy Current Match Temperature Drift Output Impedance Noise Voltage Compliance (1%) Capacitance CURRENT MIRROR Gain Temperature Drift Impedance (output) Nonlinearity Input Voltage Output Compliance Voltage Frequency Response (–3dB) TEMPERATURE RANGE Specification Operating Storage CONDITION MIN TYP ±0.25 ±0.25 25 100 500 1 20 See Curves 10 MAX ±1 ±1 UNITS % % ppm/°C MΩ MΩ nAp-p pA/√Hz pF Specified Temp Range 2.5V to 40V 3.5V to 30V BW = 0.1Hz to 10Hz f = 10kHz TMIN to TMAX I = 100µA Unless Otherwise Noted 20 200 0.995 2V to 40V I = 0µA to 250µA 40 Transfer –25 –40 –40 1 25 100 0.05 1.4 See Curves 5 1.005 ppm/°C MΩ % V MHz +85 +85 +125 °C °C °C PIN CONFIGURATION Top View DIP/SOIC ABSOLUTE MAXIMUM RATINGS Applied Voltage ..................................................................... –6V to +40V Reverse Current ........................................................................... –350µA Voltage Between Any Two Sections ................................................. ±80V Operating Temperature ................................................... –40° C to +85°C Storage Temperature ..................................................... –40°C to +125°C Lead Temperature (soldering, 10s) .............................................. +300°C (SOIC 3s) ........................................................ +260°C I1 Low I2 Low Mirror Common Mirror Output 1 2 3 4 8 7 6 5 I1 High I2 High Substrate Mirror Input PACKAGE/ORDERING INFORMATION PACKAGE DRAWING NUMBER(1) 006 182 TEMPERATURE RANGE –25°C to +85°C –25°C to +85°C PRODUCT REF200AP REF200AU PACKAGE 8-Pin Plastic DIP 8-Pin SOIC ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. (2) Grade designation “A” may not be marked. Absence of grade designation indicates A grade. The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. ® REF200 2 TYPICAL PERFORMANCE CURVES At TA = +25°C, VS = +15V, unless otherwise noted. CURRENT SOURCE TYPICAL DRIFT vs TEMPERATURE 100.1 100 600 500 CURRENT SOURCE TEMPERATURE DRIFT DISTRIBUTION 501 454 Distribution of three production lots — 1284 Current Sources. 99.8 99.7 99.6 99.5 –50 –25 0 25 50 75 100 125 Drift specified by “box method” (See text) 85°C Quantity (Units) Current (µA) 99.9 400 300 200 117 100 0 0 2 5 5 86 66 30 15 6 0 1 1 10 15 20 25 30 35 40 45 50 55 60 65 Temperature Drift (ppm/°C) Temperature (°C) CURRENT SOURCE OUTPUT CURRENT vs VOLTAGE CURRENT SOURCE OUTPUT CURRENT vs VOLTAGE 100.5 100.4 100.3 100.2 101 100.8 100.6 100.4 Current (µA) 100.2 100 99.8 99.6 99.4 99.2 99 0 5 10 15 20 Voltage (V) 25 30 35 40 Current (µA) 100.1 100 99.9 99.8 99.7 99.6 99.5 0 1 2 3 25°C –55°C 125°C 4 5 Voltage (V) CURRENT SOURCE CURRENT NOISE (0.1Hz to 10Hz) 1000 900 CURRENT SOURCE REVERSE CURRENT vs REVERSE VOLTAGE Output Current (500pA/div) 800 12kΩ 7V Reverse Voltage Circuit Model 5kΩ Reverse Current (µA) 700 600 500 400 300 200 100 0 Safe Reverse Current Safe Reverse Voltage Time (500ms/div) 0 –2 –4 –6 –8 –10 –12 Reverse Voltage (V) ® 3 REF200 TYPICAL PERFORMANCE CURVES (CONT) At TA = +25°C, VS = +15V, unless otherwise noted. MIRROR GAIN ERROR vs CURRENT 5 4 3 2 Error (%) 1 0 –1 –2 –3 –4 –5 0.1 0.08 Nonlinearity (% of 250µA) 0.06 0.04 0.02 0 –0.02 –0.04 –0.06 –0.08 –0.01 MIRROR TRANSFER NONLINEARITY Data from Three Representative Units (Least-square fit) VO = 1.25V VO = 1V VO = 1.5V 10µA 100µA Mirror Current (A) 1mA 0 50 100 150 Current (µA) 200 250 MIRROR INPUT VOTAGE/OUTPUT COMPLIANCE VOLTAGE vs CURRENT 4 3 Input Voltage (V) 2 Input Voltage Output Compliance Voltage 1 0 1µA 10µA 100µA Current 1mA 10mA ® REF200 4 APPLICATIONS INFORMATION The three circuit sections of the REF200 are electrically isolated from one another using a dielectrically isolated fabrication process. A substrate connection is provided (pin 6), which is isolated from all circuitry. This pin should be connected to a defined circuit potential to assure rated DC performance. The preferred connection is to the most negative constant potential in your system. In most analog systems this would be –VS. For best AC performance, leave pin 6 open and leave unused sections unconnected. Drift performance is specified by the “box method,” as illustrated in the Current vs Temperature plot of the typical performance curves. The upper and lower current extremes measured over temperature define the top and bottom of the box. The sides are determined by the specified temperature range of the device. The drift of the unit is the slope of the diagonal—typically 25ppm/°C from –25°C to +85°C. If the current sources are subjected to reverse voltage, a protection diode may be required. A reverse voltage circuit model of the REF200 is shown in the Reverse Current vs Reverse Voltage curve. If reverse voltage is limited to less than 6V or reverse current is limited to less than 350µA, no protection circuitry is required. A parallel diode (Figure 2a) will protect the device by limiting the reverse voltage across the current source to approximately 0.7V. In some applications, a series diode may be preferable (Figure 2b) because it allows no reverse current. This will, however, reduce the compliance voltage range by one diode drop. Applications for the REF200 are limitless. Application Bulletin AB-165 shows additional REF200 circuits as well as other related current source techniques. A collection of circuits is shown to illustrate some techniques. Also, see AB-165A. 8,7 5 4 5kΩ 1kΩ 1kΩ 3 Current Mirror (Substrate) 8X Current Source (1 of 2) 4kΩ 12kΩ 6 1,2 FIGURE 1. Simplified Circuit Diagram. NOTE: All diodes = 1N4148. D1 D3 100µA Bidirectional Current Source 100µA D1 Bidirectional Current Source 100µA D4 (a) (b) D2 (c) D2 (d) FIGURE 2. Reverse Voltage Protection. ® 5 REF200 +VS 100µA IOUT 5 In 4 Out Mirror Com 3 100µA –VS 50µA FIGURE 3. 50µA Current Source. 200µA 100µA 100µA 300µA 100µA 100µA 400µA 100µA 100µA 5 In 4 Out Mirror Com 3 5 In 4 Out Mirror Com 3 Compliance = 4V (a) (b) Compliance = 4V (c) FIGURE 4. 200µA, 300µA, and 400µA Floating Current Sources. Compliance to Ground +VS +VS Compliance to –VS + 5V 50µA 27kΩ Compliance to –VS + 5.1V 50µA 50µA 100µA 5 In 4 Out Mirror Com 3 0.01µF 100µA 100kΩ 5 In 4 Out Mirror Com 3 100µA 5.1V 1N4689 5 In 4 Out Mirror Com 3 100µA –VS (a) –VS (b) –VS (c) FIGURE 5. 50µA Current Sinks. ® REF200 6 +VS 101 SERIES-CONNECTED CURRENT SOURCES CURRENT vs APPLIED VOLTAGE High 100µA 100µA 100µA 100µA/200µA Current (µA) 100µA 100 Low 5 In 4 Out Mirror Com 3 –VS 99 0 10 20 30 40 50 60 70 80 Applied Voltage (V) Compliance to –VS + 1.5V Provides 2X Higher Compliance Voltage FIGURE 6. Improved Low-Voltage Compliance. +VS FIGURE 7. 100µA Current Source—80V Compliance. +VS 100µA 100µA 0.01µF 33kΩ L o a d –VS (a) Compliance approximate to Gnd. HV compliance limited by FET breakdown. High +VS 5.1V 1N4689 100µA 100µA L o a d –VS (b) Compliance to +VS – 5V. 27kΩ L o a d 1N4148 1N4148 –VS 100µA 40kΩ 0.01µF (c) 100µA 40kΩ 0.01µF ± ± 0.01µF 40kΩ 100µA 0.01µF 40kΩ 100µA Low (d) Floating 200µA cascoded current source. 1N4148 1N4148 (e) Bidirectional 200µA cascoded current source. NOTES: (1) FET cascoded current sources offer improved output impedance and high frequency operation. Circuit in (b) also provides improved PSRR. (2) For current sinks (Circuits (a) and (b) only), invert circuits and use “N” channel JFETS. FIGURE 8. FET Cascode Circuits. ® 7 REF200 +VS Using Standard Potentiometer VIN RA 100µA VOUT RB +VS VIN Using Bourns Op Amp Trimpot RA 100µA ® RB VOUT Op Amp 51Ω To Other Amps 51Ω To Other Amps (1) Op Amp 2kΩ Linear 100Ω ® Bourns Trimpot (1) 100µA VOUT = VIN (–R B /RA ) Offset Adjustment Range = ±5mV –VS 100µA VOUT = –VIN (R B /RA ) Offset Adjustment Range = ±5mV –VS NOTE: (1) For N Op Amps, use Potentiometer Resistance = N • 100Ω. FIGURE 9. Op Amp Offset Adjustment Circuits. ® REF200 8 R2 +VS 100µA 0.01µF NOTE: (1) Burr Brown® OPA602 or OPA128 EXAMPLES (1) I OUT = N • 100µA R1 R1 (N • R2 ) R2 10MΩ 1MΩ 1kΩ IOUT 1nA 1µA 1mA Use OPA128 R1 (N • R 2 ) (1) 100 Ω 10kΩ 10kΩ I OUT = N • 100µA 0.01µF 100µA –VS (a) R2 (b) FEATURES: (1) Zero volts shunt compliance. (2) Adjustable only to values above reference value. +VS 100µA NOTE: Current source/sink swing to the “Load Return” rail is limited only by the op amp's input common mode range and output swing capability. Voltage drop across “R” can be tailored for any amplifier to allow swing to zero volts from rail. EXAMPLES R 1kΩ 1kΩ 100kΩ NR 4kΩ 9kΩ 9.9kΩ IOUT 500µA 1mA 10mA IO = (N +1) 100µA 0.01µF NR R OPA602 OPA602 0.01µF NR R IO = (N +1) 100µA 100µA Reference –VS (c) (d) IO = (N +1) 100µA 100µA OPA602 10pF IO = 100µA (N + 1). Compliance ≈ 3.5V with 0.1V across R. Max IO limited by FET. For IO = 1A, R = 0.1Ω, NR = 1kΩ. 0.01µF NR R (e) FIGURE 10. Adjustable Current Sources. ® 9 REF200 Cable Shield RTD ROFFSET INA110 Instrumentation Amplifier VOUT = Gain • 200µA • ∆ RTD 200µA Reference Current +VS 200µA Compensation Current 8 7 6 I 5 O A 1 B 2 3 4 C REF200 –VS FIGURE 11. RTD Excitation With Three Wire Lead Resistance Compensation. Triangle Output OPA602 C 2Vp-p Square Output R 10kΩ 2Vp-p Frequency = 1/4RC (Hz) Frequency = 25/C (Hz) (C is in µF and R = 10kΩ) 1N4148 1N4148 Bidirectional Current Source 1/2 REF200 1N4148 1N4148 FIGURE 12. Precision Triangle Waveform Generator. ® REF200 10 100kΩ VIN –10V ≤ VIN ≤ +10V C 100µA + Bridge (See Figure 12) 1/4 OPA404 1/4 OPA404 1/4 OPA404 100µA + Bridge (See Figure 12) VIN = +10V: 100% Duty Cycle VIN = 0V: 50% Duty Cycle VIN = –10V: 0% Duty Cycle 12Vp-p Duty Cycle Out 60kΩ FIGURE 13. Precision Duty-Cycle Modulator. For current source, invert circuitry and use P-Channel FET. IOUT IOUT 50kΩ 0.1µF For current source, invert circuitry and use P-Channel FET. Siliconix J109 50kΩ Siliconix J109 50kΩ 0.1µF 0.1µF 100µA 100µA 100µA –15V –15V FIGURE 14. Low Noise Current Sink. FIGURE 15. Low Noise Current Sink with Compliance Below Ground. ® 11 REF200 High 300µA High 400µA 100µA 20kΩ 0.01µF 100µA 100µA 20kΩ 0.01µF 2N5116 2N5116 2N4340 2N4340 0.01µF 5 In 27kΩ 4 Out Mirror Com 3 300µA Low 100µA 5 In Mirror Com 3 400µA Low (a) Regulation (15V to 30V = 0.000025%/V (10GΩ) 4 Out (a) Regulation (15V to 30V = 0.00003%/V (10GΩ) FIGURE 16. Floating 300µA and 400µA Cascoded Current Sources. +VS 100µA 10kΩ C 10kΩ VI OPA602 VO = –VI High Compliance 4V to 30V 25mA 100Ω 100µA 100Ω Diodes: 1N4148 or PWS740-3 Diode Bridge for reduced VOS . VO Rate Limit = 100µA/C 100µA –VS +VS –VS 100Ω 40.2Ω 100Ω FIGURE 17. Rate Limiter. 10kΩ Low NOTE: Each amplifier 1/4 LM324. Op amp power supplies are derived within the circuitry, and this quiescent current is included in the 25mA. FIGURE 18. 25mA Floating Current Source. ® REF200 12 +15V 100µA R (50kΩ) VI 1N4148 –10 –5 R (50kΩ) VO +10 +5 +5 +10 VI 10pF 1N4148 OPA602 VO –10 –5 For VI > –5V: VO = 0 For VI < –5V: VO = –VI – 5V (Dead to 100µA • R) R (50kΩ) VI R (50kΩ) VO +10 1N4148 +5 100µA 10pF 1N4148 –15V OPA602 VO –5 For VI < 5V: VO = 0 For VI > 5V: VO = 5V – VI (Dead to –100µA • R) –10 –5 +5 +10 VI –10 FIGURE 19. Dead-Band Circuit. +15V 100µA R (50kΩ) R (50kΩ) –10 –5 +5 +5 +10 VI VO +10 1N4148 10pF 1N4148 OPA602 10kΩ VI 10kΩ VO R (50kΩ) R (50kΩ) OPA602 10kΩ –5 For VI > 5V: VO = VI – 5V For VI < –5V: VO = VI + 5V (Dead to ±100µA • R) –10 1N4148 100µA 10pF 1N4148 –15V OPA602 FIGURE 20. Double Dead-Band Circuit. ® 13 REF200 +VS +VS 100µA 100µA VO = 100µV OPA602 VO = 1V 1Ω 0.01µF 10kΩ FIGURE 21. Low-Voltage Reference. FIGURE 22. Voltage Reference. VO +10 1kΩ +5 100µF OPA121 OPA121 VI 100µA with bridge (See Figure 2) R (50kΩ) –2.5V (R = 25kΩ) VO = V I (–5V < VI < 5V) VO = 5V (VI > 5V) VO = –5V (VI < –5V) (Bound = 100µA • R) +5V (R = 50kΩ) +7.5V (R = 75kΩ) VO –10 –5 +5 +7.5V (R = 75kΩ) +5V (R = 50kΩ) +2.5V (R = 25kΩ) +10 VI –5 –10 FIGURE 23. Bipolar Limiting Circuit. 1kΩ VO +10 +7.5V (R = 75kΩ) +5V (R = 50kΩ) +2.5V (R = 25kΩ) +5 +10 VI 100µF 1N4148 OPA121 VI OPA121 VO –10 –5 +5 100µA R (50kΩ) VO = V I (V I < 5V) VO = 5V (VI > 5V) (VLIMIT = 100µA • R) –5 –10 FIGURE 24. Limiting Circuit. ® REF200 14 +VS +5V 100µA 1kΩ 1/2 LM393 5V VO The Window 0 –VW 0.01µF (1) VCENTER(2) 0.01µF (1) +VW VI VCENTER (2) R(3) VO R (3) –VW , +VW = 100µA • R 1/2 LM393 VI 100µA –VS NOTES: (1) Capacitors optional to reduce noise and switching time. (2) Programs center of threshold voltage. (3) Programs window voltage. FIGURE 25. Window Comparator. +VS 100µA 100µA 1/2 OPA1013 1/2 OPA1013 +In PMI MAT03 –In –VS INA105 VO = +In – (–In) FIGURE 26. Instrumentation Amplifier with Compliance to –VS. ® 15 REF200