User's Guide
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REF6025EVM-PDK
This user's guide describes the characteristics, operation, and use of the REF6025EVM performance
demonstration kit (PDK). This kit is an evaluation platform for the REF6025,which is a high-precision
voltage reference with an integrated high-bandwidth buffer designed specifically to drive the REF pin of
the successive approximation register (SAR), analog-to-digital converter (ADC). On the REF6025EVM, the
REF6025 drives the reference of TI’s ADS8881 18-bit, 1-Msps true-differential input SAR ADC. This user's
guide includes complete circuit descriptions, schematic diagrams, and a bill of materials.
The REF6025EVM-PDK consists of two components, the REF6025EVM and the TI Precision Host
Interface (PHI) Controller. The PHI provides the hardware and the software for computer connectivity
through the universal serial bus (USB) interface.
The following related documents are available through the Texas Instruments web site at www.ti.com.
Related Documentation
Device
Literature Number
REF6025
SBOS708
ADS8881
SBAS547
THS4521
SBOS458
OPA333
SBOS351
LP38798
SNOSCT6
TPS7A4700
SLVU741
TPS78833
SLVU059
Microsoft, Windows are registered trademarks of Microsoft Corporation.
LabVIEW is a trademark of National Instruments.
All other trademarks are the property of their respective owners.
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1
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1
2
3
4
5
6
Contents
Overview ...................................................................................................................... 3
1.1
REF6025EVM-PDK Features ..................................................................................... 3
1.2
REF6025EVM Features............................................................................................ 3
EVM Analog Interface ...................................................................................................... 4
2.1
Onboard ADC Reference .......................................................................................... 4
2.2
ADC Analog Input Signal Path .................................................................................... 4
2.3
EVM Analog Input Options ........................................................................................ 5
2.4
Differential Input Signal Configuration ........................................................................... 5
2.5
ADC Differential Input Signal Driver .............................................................................. 6
2.6
Onboard DC Input Configuration ................................................................................. 7
Power Supplies .............................................................................................................. 8
REF6025EVM-PDK Initial Setup ........................................................................................... 8
4.1
Default Jumper Settings ........................................................................................... 8
4.2
EVM Graphical User Interface (GUI) Software Installation .................................................... 8
REF6025EVM-PDK Operation ........................................................................................... 11
5.1
EVM GUI Global Settings for ADC Configuration and Data Capture ....................................... 12
5.2
Time Domain Display Tool ....................................................................................... 13
5.3
Spectral Analysis Tool ............................................................................................ 13
5.4
Histogram Tool .................................................................................................... 14
Bill of Materials, PCB Layout, and Schematics......................................................................... 16
6.1
Bill of Materials .................................................................................................... 16
6.2
PCB Layout ........................................................................................................ 18
6.3
Schematic .......................................................................................................... 20
List of Figures
1
REF6025EVM Schematic Block Diagram ................................................................................ 4
2
Differential Input Example .................................................................................................. 6
3
Single-Ended Signal Example
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
............................................................................................. 6
REF6025 Software Installation Prompts .................................................................................. 9
Device Driver Installation Wizard Prompts ............................................................................... 9
REF6XXX EVM GUI Installation Final Step ............................................................................ 10
EVM-PDK Hardware Setup and LED Indicators ....................................................................... 11
Launch the EVM GUI Software........................................................................................... 11
EVM GUI Global Input Parameters ...................................................................................... 12
Time Domain Data Capture with Data Export Option ................................................................ 13
Spectral Analysis Tool ..................................................................................................... 14
Histogram Analysis Tool .................................................................................................. 15
REF6025EVM PCB Layer 1: Top Layer ................................................................................ 18
REF6025EVM PCB Layer 2: GND Plane ............................................................................... 18
REF6025EVM PCB Layer 3: Power Planes ............................................................................ 19
REF6025EVM PCB Layer 4: Bottom Layer............................................................................. 19
Schematic Diagram (Page 1) of the REF6025EVM PCB ............................................................. 20
Schematic Diagram (Page 2) of the REF6025EVM PCB ............................................................. 21
List of Tables
1
THS4521 vs THS4551 Comparison ....................................................................................... 5
2
Analog Input Options on the REF6025EVM
3
4
2
............................................................................. 5
DC Input Configuration ...................................................................................................... 7
REF6025EVM Bill of Materials .......................................................................................... 16
REF6025EVM-PDK
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Overview
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1
Overview
The REF6025EVM-PDK is a platform for evaluating the performance of the REF6025. The evaluation kit
includes the REF6025EVM board, the precision host interface (PHI) controller board, and a USB cable to
connect to computer to capture and analyze the data.
The REF6025EVM board includes the REF6025 and all the peripheral circuits and components necessary
to demonstrate the performance of the voltage reference.
The PHI board primarily serves three functions:
• Provides a communication interface from the EVM to the computer through a USB port
• Provides the digital input and output signals necessary to communicate with the REF6025EVM
• Supplies power to all active circuitry on the REF6025EVM board
Along with the REF6025EVM and the PHI controller boards, this demonstration kit includes an A-to-microB USB cable and the Quick Start guide to aid with the system setup.
1.1
REF6025EVM-PDK Features
The REF6025EVM-PDK includes the following features:
• Hardware and software required for diagnostic testing as well as accurate performance evaluation of
the REF6025 Voltage Reference
• USB powered - no external power supply is required
• PHI controller that provides a convenient interface to the EVM over a USB 2.0 (or higher) for power
delivery as well as digital input and output
• Easy-to-use evaluation software for Microsoft® Windows® 7, Windows 8, 64-bit operating systems
• The software suite includes graphical tools for data capture, histogram analysis, and spectral analysis.
It also has a provision for exporting data to a text file for post-processing.
1.2
REF6025EVM Features
The REF6025EVM includes the following features:
• Onboard 18-bit, 1-Msps, serial interface, true-differential input, SAR ADC
• Low-noise and low distortion ADC input drivers optimized to meet ADC performance
• Input common mode of 1.32 V generated onboard to allow uni-polar and bi-polar inputs
• Ultra-low noise low-dropout (LDO) regulator for jumper-selectable DC test signal generation
• Includes LDO to provide supply voltages to the ADC and drive circuits
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EVM Analog Interface
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EVM Analog Interface
Most SAR ADCs, and a few delta-sigma ADCs, switch binary-weighted capacitors onto the REF pin during
the conversion process. The magnitude of the capacitance switched onto the REF pin during each
conversion depends on the input signal to the ADC. In order to support this dynamic load and preserve
the ADC linearity, distortion, and noise performance, the output of the voltage reference must be buffered
with a low-output impedance (high-bandwidth) buffer.
The REF60xx family of voltage references have integrated low-output impedance buffers that enable the
user to directly drive the REF pin of a successive approximation register (SAR) analog-to-digital converter
(ADC), while preserving ADC linearity, distortion, and noise performance. In addition, the output voltage of
the REF60xx does not droop below 1 LSB (18-bit), even during the first conversion while driving the REF
pin of the ADS8881. This feature is extremely useful in burst-mode, event-triggered, equivalent-time
sampling, and variable-sampling-rate data-acquisition systems.
2.1
Onboard ADC Reference
The REF6025 generates the 2.5-V reference for the ADS8881. Unlike typical ADC reference
configurations, this EVM does not require any additional active circuitry to drive the ADC reference, since
the reference input signal path is entirely self-contained on the REF6025. Figure 1 illustrates the
schematic.
VDD
RLIM
REF6xxx
VIN
SS
OUT_S
VIN
EN
OUT_F
Buffer
RFILT
Bandgap Voltage
Reference
+
RESR
GND_F
FILT
GND_S
CL
CF
RF
VDD
R
R
RFLT
+
VIN
AIN+
GND
GND
CFLT
THS4521
VREF
ADS8881
ADS8881
AIN-
R
R
RF
RFLT
Copyright © 2016, Texas Instruments Incorporated
Figure 1. REF6025EVM Schematic Block Diagram
2.2
ADC Analog Input Signal Path
Figure 1 shows the signal path for the differential signal applied at the board inputs. The board input
impedance is 1-kΩ with 10-nF differential filtering that keeps noise in external cabling common. The
overall signal path bandwidth is limited to 1.6 MHz by the charge kickback filter formed from 4.99-Ω
resistors and a 10-nF capacitor between the amplifier output and ADC input.
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EVM Analog Interface
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The REF6025EVM uses THS4521 fully-differential amplifier to drive the ADC input. The THS4521 is a
very low power, fully-differential op amp with rail-to-rail output and an input common-mode range that
includes the negative rail. The amplifier is designed for low-power data acquisition systems where power
dissipation is a critical requirement. The amplifier provides exceptional AC performance that meets the
very low distortion and high slew rate required from the input driver.
The THD performance of this design can be further enhanced by replacing the THS4521 with the pincompatible THS4551, for a small current consumption penalty. Table 1 compares the performance with
these two amplifiers.
Table 1. THS4521 vs THS4551 Comparison
2.3
Parameter
THS4521
THS4551
HD2 at 100 KHz
–110 dB
–128 dB
HD3 at 100 KHz
–125 dB
–139 dB
Voltage noise density
4.6 nV/rtHz
3.2 nV/rtHz
Current consumption
1.14 mA
1.35 mA
EVM Analog Input Options
The REF6025EVM is designed to provide easy interface options to multiple analog sources. SMA
connectors allow input signals to be connected to the EVM through coaxial cables. In addition, 100-mil
headers provide a convenient option to either connect an external analog source or the configurable
onboard DC source. All analog inputs are buffered by the THS4521 high-speed fully-differential amplifier in
order to drive the ADS8881 ADC inputs. Use appropriate caution when handling these pins.
Table 2 lists the analog inputs:
Table 2. Analog Input Options on the REF6025EVM
Pin Number
100-mil
Header
Signal
J4
J1.2
A0(-)
Negative differential input. Ground this pin for single-ended signals.
J5
J3.2
A0(+)
Positive differential input or input for single-ended signals
2.4
Description
Differential Input Signal Configuration
The ADS8881 can convert differential signals with a common mode between 0 V and VREF, and the
THS4521 can condition a bipolar signal by changing its common mode. This REF6025EVM sets the
THS4521 output common mode to 1.35 V, which corresponds to VREF / 2 + 0.1 V. Thus, when a bipolar
differential signal with a common mode of 0 V is applied at the EVM inputs A0(–) and A0(+), the THS4521
shifts the common mode to 1.35 V. Figure 2 illustrates an input signal of 2.5-V differential with 0-V
common mode whose common mode is changed from 0 V to 1.35 V, to present a 5-V differential signal
while maintaining a 100-mV headroom from the amplifier power rails to ensure linear operation.
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..
.
1.25V
0V
J4
2.6V
-1.25V
A0(-)
1NŸ
1 J1
2
3
1NŸ
4.99
AINP
4.99
+
VOCM =+1.35V
3 J3
2
1
1.25V
THS4521
+
-
+2.5V
10000pF
-2.5V
4.99
AINN
..
.
0V
0.1V
AVDD
VDC
A0(+)
1.35V
4.99
J5
-1.25V
1NŸ
1NŸ
2.6V
1.35V
0.1V
Figure 2. Differential Input Example
2.5
ADC Differential Input Signal Driver
The THS4521 can condition a single-ended input signal to a differential signal allowing a 0 V to 5 V or
–2.5 V to 2.5 V input voltage range at the EVM input A0(+), as illustrated in Figure 3. Ground the EVM
A0(–) input for single-ended signals by inserting a shunt from J1.2 to J1.3.
A0(-)
..
.
J4
2.6V
1NŸ
1 J1
2
3
1NŸ
4.99
AINP
4.99
+
5V
3 J3
2
1
0V
or
+2.5V
0.1V
AVDD
VDC
A0(+)
1.35V
VOCM =+1.35V
THS4521
+
-
+2.5V
10000pF
-2.5V
4.99
AINN
..
.
4.99
J5
1NŸ
1NŸ
2.6V
1.35V
0.1V
0V
-2.5V
Figure 3. Single-Ended Signal Example
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2.6
Onboard DC Input Configuration
The REF6025EVM includes the low-noise, user-configurable TPS7A4700 LDO voltage regulator that can
be used to generate DC voltages at the inputs of the THS4521 without the need for an external source.
The TPS7A4700 includes an ANY-OUT mode, which starts with a base voltage of 1.4 V and control pins
allow the addition of binary-weighted voltages to generate the required voltage in steps of 100 mV, simply
by inserting shunts on the J7 header, as shown in Table 3.
Table 3. DC Input Configuration
J7.1-J7.2 (+100 mV)
J7.3-J7.4
(+200 mV)
J7.4-J7.5 (+400 mV)
J7.1-J7.2 (+800 mV)
1.4
Open
Open
Open
Open
1.5
Close
Open
Open
Open
1.6
Open
Close
Open
Open
1.7
Close
Close
Open
Open
1.8
Open
Open
Close
Open
1.9
Close
Open
Close
Open
2.0
Open
Close
Close
Open
2.1
Close
Close
Close
Open
2.2
Open
Open
Open
Close
2.3
Close
Open
Open
Close
2.4
Open
Close
Open
Close
2.5
Close
Close
Open
Close
VDC (in Volts)
CAUTION
Ensure that the DC voltage provided at the input of the THS4521 never
exceeds the 2.5 V VREF set by REF6025. To avoid damaging the ADS8881,
strictly use the jumper combinations listed in Table 3.
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Power Supplies
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Power Supplies
The PHI provides multiple power supplies to the EVM, derived from the USB supply of the computer.
The EEPROM and the digital section of the ADC are powered by two separate 3.3-V supplies generated
directly by the PHI. The REF6025 and analog input drive circuits are powered by the 5 V generated by the
LP38798 onboard the EVM, which is a low-noise linear regulator that uses the 5.5-V supply out of a
switching regulator on the PHI to generate a much cleaner 5-V output. The 3.3-V supply for the ADC is
generated by the TPS78833 on the EVM.
The power supply for each active component on the EVM is bypassed with a ceramic capacitor placed
close to that component. Additionally, the EVM layout uses thick traces or large copper fill areas, where
possible, between bypass capacitors and their loads to minimize inductance along the load current path.
4
REF6025EVM-PDK Initial Setup
This section explains the initial hardware and software setup procedure that must be completed for the
proper operation the REF6025EVM-PDK.
4.1
Default Jumper Settings
Upon unpacking, the EVM should have no jumper shunts installed. This is the correct setting for the
standard DC and AC tests to be conducted on the EVM.
4.2
EVM Graphical User Interface (GUI) Software Installation
The EVM GUI required to power up and evaluate the performance of the EVM must be installed on the
user’s computer. Download the latest version of the installer from the Tools and Software folder of the
REF6025.
The workstation used for the installation needs to be a Windows 7 or Windows 8, 64-bit computer with
USB 2.0 (or higher) ports and 1GB available of hard disk space. Login with an administrator account and
ensure the installation is “Run as administrator”. Read and accept the license agreements and follow the
on-screen instructions to complete the installation as shown in Figure 4.
CAUTION
Manually disable any anti-virus software running on the computer before
running the EVM GUI installer. Depending on the anti-virus settings, an error
message may appear or the installer .exe file may be deleted.
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Figure 4. REF6025 Software Installation Prompts
As a part of the REF6025 EVM GUI installation, a prompt with a Device Driver Installation appears on the
screen. Click Next to proceed.
Figure 5. Device Driver Installation Wizard Prompts
NOTE: A notice may appear on the screen stating that "Widows can’t verify the publisher of this
driver software"; Select Install this driver software anyway.
This software requires NI LabVIEW™ Run-Time Engine and my prompt for the installation of this software,
if it is not already installed. At the end of these installations, ensure the Create Desktop Shortcut and Run
REF6XXX EVM options are selected as Figure 6 shows.
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Figure 6. REF6XXX EVM GUI Installation Final Step
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5
REF6025EVM-PDK Operation
The following instructions are a step-by-step guide to connecting the REF6025EVM-PDK to the computer
and evaluating the performance of the REF6025:
1. Connect the REF6025EVM to the PHI. Install the two screws as indicated in Figure 7.
2. Use the provided USB cable to connect the PHI to the computer.
• LED D5 on the PHI lights up, indicating that the PHI is powered up.
• LEDs D1 and D2 on the PHI starts blinking to indicate that the PHI is booted up and is attempting
to communicate with the PC. The resulting LED indicators are shown in Figure 7.
Figure 7. EVM-PDK Hardware Setup and LED Indicators
3. Launch the REF6025EVM GUI software, as shown in Figure 8. The rate at which LED D2 blinks slows
down, indicating that the GUI is successfully communicating with the REF6025EVM-PDK.
Figure 8. Launch the EVM GUI Software
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5.1
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EVM GUI Global Settings for ADC Configuration and Data Capture
The REF6025EVM GUI provides high-level control over the ADS8881 functions, including interface
modes, sampling rate, and number of samples to be captured. With the REF6025EVM GUI, the
performance of the REF6025 under different ADC operating conditions can be evaluated.
Figure 9 identifies the input parameters of the GUI (as well as their default values) through which the
functionality of REF6025 can be exercised. These are global settings as they persist across the GUI tools
listed in the top left pane (or from one page to another).
Figure 9. EVM GUI Global Input Parameters
The host configuration options in this pane allow user-configuration of the host interface of the ADS8881.
In this pane, SCLK Frequency(Hz) and Sampling Rate(sps) can be selected. Using either of these two
parameters, the GUI computes the best achievable values for the other, considering the timing constraints
of the selected device mode.
A target SCLK frequency (in Hz) can be specified and the GUI will try to match this, as closely as
possible, by changing the PHI PLL settings. The achievable frequency may differ slightly from the selected
target value. Similarly, the sampling rate of the ADC can be adjusted by modifying the target sampling rate
argument (also in Hz). The achievable ADC sampling rate may differ from the target value, depending on
the applied SCLK frequency and the closest match achievable is displayed.
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5.2
Time Domain Display Tool
The Time Domain Display tool allows visualization of the ADC response to a given input signal. This tool
is useful for both studying the behavior and debugging any gross problems with the ADC, input drive, or
reference circuits.
The user can trigger a capture of the data of the selected number of samples from the ADS8881, as per
the host configuration settings using the capture button as indicated on Figure 10 . The sample indices are
on the x-axis and there are two y-axes showing the corresponding output codes as well as the equivalent
analog voltages based on the reference voltage driven by the REF6025. Switching pages to any of the
analysis tool described in Section 5.3 and Section 5.4, triggers calculations to be performed on the same
set of data.
Figure 10. Time Domain Data Capture with Data Export Option
5.3
Spectral Analysis Tool
This tool helps with the evaluation the dynamic performance of the REF6025EVM through FFT analysis of
the ADC output for time-varying inputs and computation of key dynamic range metrics (such as SNR,
THD, SFDR, SINAD, and ENOB).
The expected ADC input is a sinusoidal signal of peak-to-peak amplitude close to the ADC full-scale input
range (FSR). The RMS power of the input signal normalized to FSR is shown in the Signal Power (dB)
field and must be approximately –0.5 dBFS (or approximately 95% × FSR) to avoid input clipping.
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Figure 11. Spectral Analysis Tool
Finally, the FFT tool includes windowing options that are required to mitigate the effects of non-coherent
sampling (this discussion is beyond the scope of this document). The 7-Term Blackman Harris window is
the default option and has sufficient dynamic range to resolve the frequency components of up to a 24-bit
ADC. Note that the None option corresponds to not using a windowing function (or using a rectangular
window) and is not recommended.
5.4
Histogram Tool
Noise degrades ADC resolution and the histogram tool can be used to estimate effective resolution, which
is an indicator of the number of bits of ADC resolution losses resulting from noise generated by the
various sources connected to the ADC when measuring a DC signal. The cumulative effect of noise
coupling to the ADC output from sources such as the input drive circuits, the reference drive circuit, the
ADC power supply, and the ADC itself is reflected in the standard deviation of the ADC output code
histogram that is obtained by performing multiple conversions of a dc input applied to a given channel.
The histogram corresponding to a dc input is displayed on clicking on the Capture button as Figure 12
shows:
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Figure 12. Histogram Analysis Tool
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Bill of Materials, PCB Layout, and Schematics
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Bill of Materials, PCB Layout, and Schematics
This section contains the REF6025EVM bill of materials, PCB layout, and the EVM schematics.
6.1
Bill of Materials
Table 4 lists the REF6025EVM BOM.
Table 4. REF6025EVM Bill of Materials
Manufacturer Part Number
Manufacturer
Description
3
!PCB
Any
Printed Circuit Board
GRM21BR71A106KE51L
10
C1, C6, C8, C12, C24, C27,
C29, C30, C42, C45
Murata
CAP, CERM, 10uF, 10V, +/-10%, X7R, 0805
GRM188R71A105KA61D
8
C2, C4, C10, C13, C14, C16,
C17, C44
Murata
CAP, CERM, 1uF, 10V, +/-10%, X7R, 0603
GRM32ER71A476KE15L
1
C3
Murata
CAP, CERM, 47 µF, 10V, +/- 10%, X7R, 1210
06031C102JAT2A
1
C5
AVX
CAP, CERM, 1000 pF, 100V, +/- 5%, X7R, 0603
C0603X104K3RACTU
3
C7, C15, C18
Kemet
CAP, CERM, 0.1uF, 25V, +/-10%, X7R, 0603
C3216X5R1E476M160AC
2
C9, C34
TDK
CAP, CERM, 47 µF, 25 V, +/- 20%, X5R, 1206
593D106X9025C2TE3
1
C11
Vishay-Sprague
CAP, TA, 10 µF, 25 V, +/- 10%, 0.45 ohm, SMD
C0805C103F1GACTU
1
C19
Kemet
CAP, CERM, 0.01 µF, 100 V, +/- 1%, C0G/NP0, 0805
C1608C0G1E103J
2
C23, C43
TDK
CAP, CERM, 0.01 µF, 25 V, +/- 5%, C0G/NP0, 0603
GRM21BR71C475KA73L
1
C25
Murata
CAP, CERM, 4.7 µF, 16 V, +/- 10%, X7R, 0805
0805ZC105KAT2A
1
C26
AVX
CAP, CERM, 1 µF, 10 V, +/- 10%, X7R, 0805
GRM21BR71A475KA73L
1
C28
Murata
CAP, CERM, 4.7 µF, 10 V, +/- 10%, X7R, 0805
GMK316AB7106KL
1
C31
Taiyo Yuden
CAP, CERM, 10 µF, 35 V, +/- 10%, X7R, 1206
C1005X7R1H104K
1
C32
TDK
CAP, CERM, 0.1uF, 50V, +/-10%, C0G/NP0, 0402
GRM1885C1H102FA01J
1
C33
Murata
CAP, CERM, 1000 pF, 50 V, +/- 1%, C0G/NP0, 0603
06035A102KAT2A
1
C41
AVX
CAP, CERM, 1000 pF, 50 V, +/- 10%, C0G/NP0, 0603
1891
4
H1, H2, H3, H4
Keystone
3/16 Hex Female Standoff
9774050360R
2
H5, H6
Wurth Elektronik
ROUND STANDOFF M3 STEEL 5MM
PMSSS 440 0025 PH
4
H7, H8, H9, H10
B&F Fastener Supply
MACHINE SCREW PAN PHILLIPS 4-40
RM3X4MM 2701
2
H11, H12
APM HEXSEAL
Machine Screw Pan PHILLIPS M3
TSM-103-01-L-SV
3
J1, J3, J13
Samtec
Header, 100mil, 3x1, Gold, SMT
QTH-030-01-L-D-A
1
J2
Samtec
Header(Shrouded), 19.7mil, 30x2, Gold, SMT
5-1814832-1
2
J4, J5
TE Connectivity
SMA Straight PCB Socket Die Cast, 50 Ohm, TH
TSM-102-03-T-SV
1
J6
Samtec
Header, 2.54mm, 2x1, Tin, SMT
TSM-106-01-L-DV
1
J7
Samtec
Header, 2.54mm, 6x2, Gold, SMT
THT-14-423-10
1
LBL1
Brady
Thermal Transfer Printable Labels, 0.650" W x 0.200" H - 10,000 per roll
9
R2, R7, R8, R14, R16, R31,
R32, R37, R43
Vishay-Dale
RES, 0, 5%, 0.1 W, 0603
PA008
CRCW06030000Z0EA
16
Qty
Reference Designators
REF6025EVM-PDK
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Bill of Materials, PCB Layout, and Schematics
www.ti.com
Table 4. REF6025EVM Bill of Materials (continued)
Manufacturer Part Number
Manufacturer
Description
CRCW060310R0FKEA
Qty
1
R3
Reference Designators
Vishay-Dale
RES, 10.0, 1%, 0.1 W, 0603
ERJ-3RQFR22V
1
R4
Panasonic
RES, 0.22 ohm, 1%, 0.1W, 0603
CRCW060347K5FKEA
1
R5
Vishay-Dale
RES, 47.5 k, 1%, 0.1 W, 0603
CRCW060315K0FKEA
1
R6
Vishay-Dale
RES, 15.0 k, 1%, 0.1 W, 0603
RC0603FR-0747RL
3
R9, R10, R12
Yageo America
RES, 47.0, 1%, 0.1 W, 0603
ERJ-3RSFR10V
1
R11
Panasonic
RES, 0.1, 1%, 0.1 W, 0603
CRCW060320K0FKEA
2
R13, R15
Vishay-Dale
RES, 20.0 k, 1%, 0.1 W, 0603
CRCW040210K0FKED
2
R17, R33
Vishay-Dale
RES, 10.0k ohm, 1%, 0.063W, 0402
CRCW06031K00FKEA
5
R18, R19, R20, R21, R22
Vishay-Dale
RES, 1.00k ohm, 1%, 0.1W, 0603
CRCW06034R99FKEA
5
R23, R24, R25, R26, R44
Vishay-Dale
RES, 4.99, 1%, 0.1 W, 0603
RC0603FR-0716KL
1
R29
Yageo America
RES, 16.0 k, 1%, 0.1 W, 0603
RC0603FR-0718KL
1
R30
Yageo America
RES, 18.0 k, 1%, 0.1 W, 0603
CRCW06030000Z0EA
1
R42
Vishay-Dale
RES, 0, 5%, 0.1 W, 0603
5006
6
TP1, TP2, TP3, TP4, TP5,
TP6
Keystone
Test Point, Compact, Black, TH
5008
1
TP7
Keystone
Test Point, Compact, Orange, TH
5005
2
TP8, TP9
Keystone
Test Point, Compact, Red, TH
REF6025AIDGK
1
U1
Texas Instruments
High-Precision Voltage Reference with Integrated High-Bandwidth Buffer, DGK0008A
ADS8881IDGSR
1
U2
Texas Instruments
18-Bit, 1-MSPS, Serial Interface, microPower, Miniature, True-Differential Input, SAR Analog-to-Digital Converter,
DGS0010A
TPS78833DBVR
1
U3
Texas Instruments
Single Output Low Noise LDO, 150 mA, Fixed 3.3 V Output, 2.7 to 10 V Input, with Low IQ, 5-pin SOT-23 (DBV),
0 to 70 degC
THS4521IDGKR
1
U4
Texas Instruments
VERY LOW POWER, NEGATIVE RAIL INPUT, RAIL-TO-RAIL OUTPUT, FULLY DIFFERENTIAL AMPLIFIER,
DGK0008A
OPA333AIDBVR
1
U5
Texas Instruments
17 uA, MicroPower, Precision, Zero Drift CMOS Operational Amplifier, 1.8 to 5.5 V, -40 to 125 degC, 5-pin SOT23
(DBV0005A)
LP38798SD-ADJ/NOPB
1
U6
Texas Instruments
Ultra Low Noise, 800 mA Linear Voltage Regulator for RF/Analog Circuits, DNT0012B
BR24G32FVT-3AGE2
1
U7
Rohm
I2C BUS EEPROM (2-Wire), TSSOP-B8
TPS7A4700RGWR
1
U8
Texas Instruments
36V, 1-A, 4.17-µVRMS, RF LDO Voltage Regulator, RGW0020A
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REF6025EVM-PDK
Copyright © 2016, Texas Instruments Incorporated
17
Bill of Materials, PCB Layout, and Schematics
6.2
www.ti.com
PCB Layout
Figure 13 through Figure 16 illustrate the EVM PCB layout.
Figure 13. REF6025EVM PCB Layer 1: Top Layer
Figure 14. REF6025EVM PCB Layer 2: GND Plane
18
REF6025EVM-PDK
SBAU258 – February 2016
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Copyright © 2016, Texas Instruments Incorporated
www.ti.com
Bill of Materials, PCB Layout, and Schematics
Figure 15. REF6025EVM PCB Layer 3: Power Planes
Figure 16. REF6025EVM PCB Layer 4: Bottom Layer
SBAU258 – February 2016
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REF6025EVM-PDK
Copyright © 2016, Texas Instruments Incorporated
19
Bill of Materials, PCB Layout, and Schematics
6.3
www.ti.com
Schematic
Figure 17 and Figure 18 illustrate the EVM schematics.
1
2
3
4
5
6
EVM_REG_5V5
R42
0
R45
0
EVM_RAW_5V
J2
L1
TP8
8
7
SW
4
PG
GND
PAD
1
9
ILIM
GND
R34
10.0k
J13
C35
100pF
3
5
2
0
R35
845k
FB
EVM_RAW_5V
1
R7
2
VOUT
EN
C28
4.7µF
A
TP9
U6
VIN
6
C36
22µF
3
C37
22µF
C11
10µF
C31
10µF
C12
10µF
4
C23
GND
GND
GND
GND
IN
OUT
IN
OUT
IN[CP]
OUT[FB]
CP
SET
EN
6
GND[CP]
0.01µF
R36
200k
AVDD
5
GND
FB
GND
DAP
R8
12
0
11
C24
10µF
10
C25
4.7µF
C26
1µF
DIN
CONVST
9
R5
47.5k
8
R37
0
SCLK
RET_SCLK
7
13
R6
15.0k
LP38798SD-ADJ/NOPB
GND
TPS61252DSGR
GND
GND
GND
C41
1000pF
GND
GND
U3
TPS78833DBVR
GND
EVM_RAW_5V
C38
C1
10µF
6
GND
V+
V-
EVM_RAW_5V
R38
3
VIN
GND_S
2
EN
GND_F
7
3
SS
OUT_F
6
FILT
OUT_S
5
4
10.0k
5
2
U10
TLV3012AIDCKR
C39
0.1µF
B
GND
R39
25.5k
R1
0.22
R40
10.0
8
2
U5
OPA333AIDBVR
EN
3
EVM_ID_SDA
EVM_ID_SCL
EVM_PRSNT_N
C8
10µF
MP1
MP2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
GND
GND
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
GND
A
EVM_ID_PWR
MP3
MP4
GND
GND
GND
GND
C43
GND
QTH-030-01-L-D-A
GND
B
47µF
C2
1µF
0.01µF
GND
R2
GND
DIN
GND
GND
EVM_DVDD
TP7
2
16.0k
C13
1µF
R30
18.0k
1µF
10
5
GND
1
0.1µF
3
GND
GND
GND
4
C14
J4
1µF
1
GND
0
2
3
4
5
AVDD
R31
C
R19
R27
49.9
C21
1.00k
R21
R23
1.00k
4.99
EVM_DVDD
R13
20.0k
U2
EVM_DVDD
C4
C15
AVDD
DIN
DOUT
SCLK
CONVST
R15
20.0k
R12
9
7
8
6
47.0
R14
0
DOUT
REF
R10
47.0
SCLK
AINP
R43
0
RET_SCLK
R9
47.0
DVDD
AINN
GND
5
CONVST
ADS8881IDGSR
GND
0.01µF
AVDD
C
AVDD
0
C17
J1
C33
1000pF
GND
C27
10µF
TP1
GND
TP2
TP3
TP4
TP5
TP6
1µF
C18
GND
AVDD
1
2
3
C34
47µF
1
GND
R29
4
1.00k
R16
SR
C7
0.1µF
GND
1
C16
1µF
4
EVM_DVDD
AVDD
IN
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
0
3
R18
OUT
C6
10µF
C3
0
VREF/2
5
GND
C5
1000pF
GND
GND
GND
R4
0.22
GND
REF6025AIDGK
GND
GND
R3
GND
1
0.1µF
4
1
U1
AVDD
2
3
2
1
DOUT
R41
10.0k
EVM_REG_5V5
1.5µH
U9
EVM_RAW_5V
3
7
C20
GND
U8
11
9
7
5
3
1
EN
4
5
6
8
9
10
11
12
TSM-106-01-L-DV
D
SENSE
NR
6P4V2
6P4V1
3P2V
1P6V
0P8V
0P4V
0P2V
0P1V
4.99
0.01µF
VREF/2
R11
0.1
3
1
NC
NC
NC
NC
19
18
17
2
GND
PAD
7
21
C10
1µF
C9
47µF
GND
V+
VOCM
V-
5
GND
R25
4.99
C19
4
R26
4.99
0.01µF
GND
EVM_ID_PWR
10.0k
GND
EVM_RAW_5V
EVM_DVDD
EVM_ID_PWR
EVM_REG_5V5
C30
10µF
C45
10µF
A0
VCC
8
2
A1
WP
7
WP
GND
C29
10µF
4
J5
1
R32
0
R28
49.9
C22
0.01µF
R20
R22
R24
1.00k
1.00k
4.99
GND
GND
GND
SCL
6
EVM_ID_SCL
VSS
SDA
5
EVM_ID_SDA
J6
C40
0.1µF
C32
0.1µF
GND
GND
GND
GND
D
GND
GND
Copyright © 2016, Texas Instruments Incorporated
GND
GND
GND
Texas Instruments and/or its licensors do not warrant the accuracy or completeness of this specificati on or any information contained therein. Texas Instruments and/or its licensors do not
warrant that this design will meet the specifications, will be suitable for your application or fit for any particular purpose, or will operate in an implementation. Texas Instruments and/or its
licensors do not warrant that the design is product ion worthy. You should completely validate and test your design implementation to confirm the system f unctionality for your application.
2
A2
BR24G32FVT-3AGE2
GND
GND
1
1
3
C42
10µF
TPS7A4700RGWR
R17
10.0k
U7
C44
1µF
GND
EVM_ID_PWR
R33
U4
THS4521IDGKR
J3
14
2
6
13
R44
1
20
0.1µF
8
GND
OUT
OUT
3
2
1
IN
IN
2
3
4
5
J7
12
10
8
6
4
2
15
16
3
4
Orderable: REF6025EVM-PDK
TID #:
N/A
Number: PA008
Rev: A
SVN Rev: Version control disabled
Drawn By:
Engineer: Sandeep K
5
Designed for: Public Release
Project Title: REF6xxxEVM
Sheet Title:
Assembly Variant: 001
File: PA008_Schematic.SchDoc
Contact: http://www.ti.com/support
Mod. Date: 2/25/2016
Sheet: 1 of 2
Size: B
http://www.ti.com
© Texas Instruments 2016
6
Figure 17. Schematic Diagram (Page 1) of the REF6025EVM PCB
20
REF6025EVM-PDK
SBAU258 – February 2016
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Bill of Materials, PCB Layout, and Schematics
www.ti.com
1
2
H1
1891
A
FID1
FID2
FID3
PCB Number: PA008
PCB Rev: A
H2
H3
1891
1891
3
H7
H4
1891
H5
H6
9774050360R
9774050360R
PMSSS 440 0025 PH
H8
H9
H10
PMSSS 440 0025 PH
PMSSS 440 0025 PH
PMSSS 440 0025 PH
H12
RM3X4MM 2701
RM3X4MM 2701
PCB
LOGO
PCB
LOGO
PCB
LOGO
Pb-Free Symbol
FCC disclaimer
5
6
A
H11
Texas Instruments
4
Label Table
Variant
ZZ2
Assembly Note
These assemblies are ESD sensitive, ESD precautions shall be observed.
LBL1
Label Text
REF6025EVM-PDK
PCB Label
ZZ3
Assembly Note
These assemblies must be clean and free from flux a nd all contaminants. Use of no clean flux is not ac ceptable.
B
001
ZZ4
Assembly Note
These assemblies must comply with workmanship stand ards IPC-A-610 Class 2, unless otherwise specified.
Size: 0.65" x 0.20 "
ZZ1
Label Assembly Note
This Assembly Note is for PCB labels only
B
C
C
D
D
Copyright © 2016, Texas Instruments Incorporated
Texas Instruments and/or its licensors do not warrant the accuracy or completeness of this specificati on or any information contained therein. Texas Instruments and/or its licensors do not
warrant that this design will meet the specifications, will be suitable for your application or fit for any particular purpose, or will operate in an implementation. Texas Instruments and/or its
licensors do not warrant that the design is product ion worthy. You should completely validate and test your design implementation to confirm the system f unctionality for your application.
1
2
3
Orderable: REF6025EVM-PDK
TID #:
N/A
Number: PA008
Rev: A
SVN Rev: Version control disabled
Drawn By:
Engineer: Sandeep K
4
5
Designed for: Public Release
Project Title: REF6xxxEVM
Sheet Title:
Assembly Variant: 001
File: PA008A_Hardware.SchDoc
Contact: http://www.ti.com/support
Mod. Date: 2/16/2016
Sheet: 2 of 2
Size: B
http://www.ti.com
© Texas Instruments 2016
6
Figure 18. Schematic Diagram (Page 2) of the REF6025EVM PCB
SBAU258 – February 2016
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REF6025EVM-PDK
Copyright © 2016, Texas Instruments Incorporated
21
STANDARD TERMS AND CONDITIONS FOR EVALUATION MODULES
1.
Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, or
documentation (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms and conditions set forth herein.
Acceptance of the EVM is expressly subject to the following terms and conditions.
1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility
evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not
finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For
clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions
set forth herein but rather shall be subject to the applicable terms and conditions that accompany such Software
1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned,
or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production
system.
2
Limited Warranty and Related Remedies/Disclaimers:
2.1 These terms and conditions do not apply to Software. The warranty, if any, for Software is covered in the applicable Software
License Agreement.
2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM
to User. Notwithstanding the foregoing, TI shall not be liable for any defects that are caused by neglect, misuse or mistreatment
by an entity other than TI, including improper installation or testing, or for any EVMs that have been altered or modified in any
way by an entity other than TI. Moreover, TI shall not be liable for any defects that result from User's design, specifications or
instructions for such EVMs. Testing and other quality control techniques are used to the extent TI deems necessary or as
mandated by government requirements. TI does not test all parameters of each EVM.
2.3 If any EVM fails to conform to the warranty set forth above, TI's sole liability shall be at its option to repair or replace such EVM,
or credit User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the
warranty period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to
repair or replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall
be warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day
warranty period.
3
Regulatory Notices:
3.1 United States
3.1.1
Notice applicable to EVMs not FCC-Approved:
This kit is designed to allow product developers to evaluate electronic components, circuitry, or software associated with the kit
to determine whether to incorporate such items in a finished product and software developers to write software applications for
use with the end product. This kit is not a finished product and when assembled may not be resold or otherwise marketed unless
all required FCC equipment authorizations are first obtained. Operation is subject to the condition that this product not cause
harmful interference to licensed radio stations and that this product accept harmful interference. Unless the assembled kit is
designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must operate under the authority of
an FCC license holder or must secure an experimental authorization under part 5 of this chapter.
3.1.2
For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant:
CAUTION
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not
cause harmful interference, and (2) this device must accept any interference received, including interference that may cause
undesired operation.
Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to
operate the equipment.
FCC Interference Statement for Class A EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is
operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the instruction manual, may cause harmful interference to radio communications.
Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to
correct the interference at his own expense.
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
FCC Interference Statement for Class B EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential
installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance
with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference
will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which
can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more
of the following measures:
•
•
•
•
Reorient or relocate the receiving antenna.
Increase the separation between the equipment and receiver.
Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
Consult the dealer or an experienced radio/TV technician for help.
3.2 Canada
3.2.1
For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210
Concerning EVMs Including Radio Transmitters:
This device complies with Industry Canada license-exempt RSS standard(s). Operation is subject to the following two conditions:
(1) this device may not cause interference, and (2) this device must accept any interference, including interference that may
cause undesired operation of the device.
Concernant les EVMs avec appareils radio:
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation
est autorisée aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit
accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Concerning EVMs Including Detachable Antennas:
Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser)
gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type
and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for
successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types
listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated.
Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited
for use with this device.
Concernant les EVMs avec antennes détachables
Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et
d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage
radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope
rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le
présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le
manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne
non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de
l'émetteur
3.3 Japan
3.3.1
Notice for EVMs delivered in Japan: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 日本国内に
輸入される評価用キット、ボードについては、次のところをご覧ください。
http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page
3.3.2
Notice for Users of EVMs Considered “Radio Frequency Products” in Japan: EVMs entering Japan may not be certified
by TI as conforming to Technical Regulations of Radio Law of Japan.
If User uses EVMs in Japan, not certified to Technical Regulations of Radio Law of Japan, User is required by Radio Law of
Japan to follow the instructions below with respect to EVMs:
1.
2.
3.
Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal
Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for
Enforcement of Radio Law of Japan,
Use EVMs only after User obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to
EVMs, or
Use of EVMs only after User obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan
with respect to EVMs. Also, do not transfer EVMs, unless User gives the same notice above to the transferee. Please note
that if User does not follow the instructions above, User will be subject to penalties of Radio Law of Japan.
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【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて
いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの
措置を取っていただく必要がありますのでご注意ください。
1.
2.
3.
電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用
いただく。
実験局の免許を取得後ご使用いただく。
技術基準適合証明を取得後ご使用いただく。
なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。
上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ
ンスツルメンツ株式会社
東京都新宿区西新宿６丁目２４番１号
西新宿三井ビル
3.3.3
Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧くださ
い。http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
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4
EVM Use Restrictions and Warnings:
4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT
LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS.
4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling
or using the EVM, including without limitation any warning or restriction notices. The notices contain important safety information
related to, for example, temperatures and voltages.
4.3 Safety-Related Warnings and Restrictions:
4.3.1
User shall operate the EVM within TI’s recommended specifications and environmental considerations stated in the user
guide, other available documentation provided by TI, and any other applicable requirements and employ reasonable and
customary safeguards. Exceeding the specified performance ratings and specifications (including but not limited to input
and output voltage, current, power, and environmental ranges) for the EVM may cause personal injury or death, or
property damage. If there are questions concerning performance ratings and specifications, User should contact a TI
field representative prior to connecting interface electronics including input power and intended loads. Any loads applied
outside of the specified output range may also result in unintended and/or inaccurate operation and/or possible
permanent damage to the EVM and/or interface electronics. Please consult the EVM user guide prior to connecting any
load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative.
During normal operation, even with the inputs and outputs kept within the specified allowable ranges, some circuit
components may have elevated case temperatures. These components include but are not limited to linear regulators,
switching transistors, pass transistors, current sense resistors, and heat sinks, which can be identified using the
information in the associated documentation. When working with the EVM, please be aware that the EVM may become
very warm.
4.3.2
EVMs are intended solely for use by technically qualified, professional electronics experts who are familiar with the
dangers and application risks associated with handling electrical mechanical components, systems, and subsystems.
User assumes all responsibility and liability for proper and safe handling and use of the EVM by User or its employees,
affiliates, contractors or designees. User assumes all responsibility and liability to ensure that any interfaces (electronic
and/or mechanical) between the EVM and any human body are designed with suitable isolation and means to safely
limit accessible leakage currents to minimize the risk of electrical shock hazard. User assumes all responsibility and
liability for any improper or unsafe handling or use of the EVM by User or its employees, affiliates, contractors or
designees.
4.4 User assumes all responsibility and liability to determine whether the EVM is subject to any applicable international, federal,
state, or local laws and regulations related to User’s handling and use of the EVM and, if applicable, User assumes all
responsibility and liability for compliance in all respects with such laws and regulations. User assumes all responsibility and
liability for proper disposal and recycling of the EVM consistent with all applicable international, federal, state, and local
requirements.
5.
Accuracy of Information: To the extent TI provides information on the availability and function of EVMs, TI attempts to be as accurate
as possible. However, TI does not warrant the accuracy of EVM descriptions, EVM availability or other information on its websites as
accurate, complete, reliable, current, or error-free.
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6.
Disclaimers:
6.1 EXCEPT AS SET FORTH ABOVE, EVMS AND ANY WRITTEN DESIGN MATERIALS PROVIDED WITH THE EVM (AND THE
DESIGN OF THE EVM ITSELF) ARE PROVIDED "AS IS" AND "WITH ALL FAULTS." TI DISCLAIMS ALL OTHER
WARRANTIES, EXPRESS OR IMPLIED, REGARDING SUCH ITEMS, INCLUDING BUT NOT LIMITED TO ANY IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF ANY
THIRD PARTY PATENTS, COPYRIGHTS, TRADE SECRETS OR OTHER INTELLECTUAL PROPERTY RIGHTS.
6.2 EXCEPT FOR THE LIMITED RIGHT TO USE THE EVM SET FORTH HEREIN, NOTHING IN THESE TERMS AND
CONDITIONS SHALL BE CONSTRUED AS GRANTING OR CONFERRING ANY RIGHTS BY LICENSE, PATENT, OR ANY
OTHER INDUSTRIAL OR INTELLECTUAL PROPERTY RIGHT OF TI, ITS SUPPLIERS/LICENSORS OR ANY OTHER THIRD
PARTY, TO USE THE EVM IN ANY FINISHED END-USER OR READY-TO-USE FINAL PRODUCT, OR FOR ANY
INVENTION, DISCOVERY OR IMPROVEMENT MADE, CONCEIVED OR ACQUIRED PRIOR TO OR AFTER DELIVERY OF
THE EVM.
7.
USER'S INDEMNITY OBLIGATIONS AND REPRESENTATIONS. USER WILL DEFEND, INDEMNIFY AND HOLD TI, ITS
LICENSORS AND THEIR REPRESENTATIVES HARMLESS FROM AND AGAINST ANY AND ALL CLAIMS, DAMAGES, LOSSES,
EXPENSES, COSTS AND LIABILITIES (COLLECTIVELY, "CLAIMS") ARISING OUT OF OR IN CONNECTION WITH ANY
HANDLING OR USE OF THE EVM THAT IS NOT IN ACCORDANCE WITH THESE TERMS AND CONDITIONS. THIS OBLIGATION
SHALL APPLY WHETHER CLAIMS ARISE UNDER STATUTE, REGULATION, OR THE LAW OF TORT, CONTRACT OR ANY
OTHER LEGAL THEORY, AND EVEN IF THE EVM FAILS TO PERFORM AS DESCRIBED OR EXPECTED.
8.
Limitations on Damages and Liability:
8.1 General Limitations. IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, COLLATERAL, INDIRECT, PUNITIVE,
INCIDENTAL, CONSEQUENTIAL, OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF THESE
TERMS ANDCONDITIONS OR THE USE OF THE EVMS PROVIDED HEREUNDER, REGARDLESS OF WHETHER TI HAS
BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED
TO, COST OF REMOVAL OR REINSTALLATION, ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS
OR SERVICES, RETESTING, OUTSIDE COMPUTER TIME, LABOR COSTS, LOSS OF GOODWILL, LOSS OF PROFITS,
LOSS OF SAVINGS, LOSS OF USE, LOSS OF DATA, OR BUSINESS INTERRUPTION. NO CLAIM, SUIT OR ACTION SHALL
BE BROUGHT AGAINST TI MORE THAN ONE YEAR AFTER THE RELATED CAUSE OF ACTION HAS OCCURRED.
8.2 Specific Limitations. IN NO EVENT SHALL TI'S AGGREGATE LIABILITY FROM ANY WARRANTY OR OTHER OBLIGATION
ARISING OUT OF OR IN CONNECTION WITH THESE TERMS AND CONDITIONS, OR ANY USE OF ANY TI EVM
PROVIDED HEREUNDER, EXCEED THE TOTAL AMOUNT PAID TO TI FOR THE PARTICULAR UNITS SOLD UNDER
THESE TERMS AND CONDITIONS WITH RESPECT TO WHICH LOSSES OR DAMAGES ARE CLAIMED. THE EXISTENCE
OF MORE THAN ONE CLAIM AGAINST THE PARTICULAR UNITS SOLD TO USER UNDER THESE TERMS AND
CONDITIONS SHALL NOT ENLARGE OR EXTEND THIS LIMIT.
9.
Return Policy. Except as otherwise provided, TI does not offer any refunds, returns, or exchanges. Furthermore, no return of EVM(s)
will be accepted if the package has been opened and no return of the EVM(s) will be accepted if they are damaged or otherwise not in
a resalable condition. If User feels it has been incorrectly charged for the EVM(s) it ordered or that delivery violates the applicable
order, User should contact TI. All refunds will be made in full within thirty (30) working days from the return of the components(s),
excluding any postage or packaging costs.
10. Governing Law: These terms and conditions shall be governed by and interpreted in accordance with the laws of the State of Texas,
without reference to conflict-of-laws principles. User agrees that non-exclusive jurisdiction for any dispute arising out of or relating to
these terms and conditions lies within courts located in the State of Texas and consents to venue in Dallas County, Texas.
Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief
in any United States or foreign court.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2015, Texas Instruments Incorporated
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IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
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TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
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TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
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Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements
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In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to
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requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
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