SERDESUB-913ROS/NOPB

User’s Guide SNLU110 – Aug 2012 SERDESUB-913 User’s Guide Table of Contents TABLE OF CONTENTS..................................................................................................................................... 1 INTRODUCTION: ............................................................................................................................................... 2 DS90UB913Q/914Q SERDES TYPICAL APPLICATION ....................................................................................... 3 HOW TO SET UP THE DEMO EVALUATION KIT: .......................................................................................... 3 BI-DIRECTIONAL CONTROL BUS AND I2C MODES: ................................................................................... 4 DEMO BOARD POWER CONNECTIONS: ....................................................................................................... 4 DS9UB913Q SERIALIZER BOARD DESCRIPTION: ....................................................................................... 5 CONFIGURING THE MODE PIN ON THE SERIALIZER BOARD .................................................................................. 5 SERIALIZER LVCMOS PINOUT BY CONNECTOR ................................................................................................. 5 DS9UB914Q DESERIALIZER BOARD DESCRIPTION: .................................................................................. 7 DIP SWITCH S2 CONFIGURATION ON THE DESERIALIZER BOARD ......................................................................... 7 DIP SWITCH S1 CONFIGURATION ON THE DESERIALIZER BOARD ......................................................................... 7 DESERIALIZER LVCMOS PINOUT BY CONNECTOR ............................................................................................. 8 TYPICAL CONNECTION AND TEST EQUIPMENT .................................................................................................. 10 TROUBLESHOOTING DEMO SETUP ............................................................................................................ 10 CABLE REFERENCES ................................................................................................................................... 11 APPENDIX ....................................................................................................................................................... 12 DS90UB913Q EVK SCHEMATIC .................................................................................................................... 12 DS90UB914Q EVK SCHEMATIC .................................................................................................................... 15 DS90UB913Q PCB LAYOUT ......................................................................................................................... 18 DS90UB914Q EVK LAYOUT ......................................................................................................................... 20 SNLU100 – April 2012 SERDESUB-16USB User’s Guide 1 Introduction: National Semiconductor’s Automotive SERDES DS90UB913/914Q FPD-Link III evaluation kit contains one (1) DS90UB913Q Serializer board and one (1) DS90UB914Q Deserializer board. The boards are mounted with the Rosenberger connectors for connectivity using the Leoni-Dacar cables (not sent along with the kits). The boards also have the option of being populated with single ended coaxial cables. This mode is for evaluation purposes only. The DS90UB913Q/914Q chipset supports a variety of automotive mega-pixel camera systems over a two (2) wire serial stream. The single differential pair (FPD-Link III) is wellsuited for direct connections between an imager and Host Controller/Electronic Control Unit (ECU)/FPGA. The bidirectional control channel of the DS90UB913Q/914Q provides seamless communication between the ECU/FPGA and the display module. This kit will demonstrate the functionality and operation of the DS90UB913Q and DS90UB914Q chipset. The chipset enables transmission of a high-speed video data along with a low latency bi-directional control bus over a single twisted pair cable. The integrated control channel transfers data bi-directionally over the same serial video link. The transport delivers 10/12 bits of parallel data, two SYNC bits and PCLK together with a bidirectional control channel that supports an I2C bus. Additionally, there are four unidirectional general purpose (GPI and GPO) signal lines for sending control data. This interface allows transparent full-duplex communication over a single high-speed differential pair, carrying asymmetrical bi-directional control information without the dependency of video blanking intervals. The Serializer and Deserializer chipset is designed to transmit data at PCLK clocks speeds ranging from 10 to 100 MHz and I 2C bus rates up to 400 kbps at up to 10 meters cable length over -40 to +105 Deg C. The user needs to supply only a single 5V supply to the Deserializer boards as these kits have power transfer over coax/ power transfer over differential pair capabilities. The demo boards can be used for EMI testing. System Requirements: In order to demonstrate, the following are required: 1) Mega-pixel imager modules such as the Omnivision OV10630 or Aptina MT9M023/24. 2) Microcontroller (MCU) or FPGA with I2C interface bus (I2C master) a. slave clock stretching must be supported by the I2C master controller/MCU. 3) External peripheral device that supports I2C (slave mode) 4) 5V power supply. Contents of the Demo Evaluation Kit: 1) One Serializer board with the DS90UB913Q 2) One Deserializer board with the DS90UB914Q 2 SERDESUB-913 User’s Guide SNLU110 – April 2012 DS90UB913Q/914Q SerDes Typical Application Parallel Data In 10 or 12 Parallel Data Out 10 or 12 FPD-Link III 2 Megapixel Imager/Sensor 2 HSYNC, VSYNC DS90UB913Q Bidirectional Control Channel 4 GPO 2 Bidirectional Control Bus HSYNC, VSYNC DS90UB914Q Serializer 4 DSP, FPGA/ µ-Processor/ ECU GPIO 2 Deserializer Bidirectional Control Bus Figure 1. Typical Application of DS90UB913/914Q Chipset The diagram above illustrates a typical application of DS90UB913Q/914Q chipset. The ECU/FPGA can program device registers on the DS90UB913Q, DS90UB914Q, and remote peripheral device, such as a display module. Video Control Module (Video Data + Ctrl) DS90UB913Q DS90UB903Q Serializer / FPGA / Imager Video Processo (I2C_CTRL) FPD-LINK III DS90UB914Q DS90UB904Q Deserializer (I2C_CTRL) (Video Data + Ctrl) MCU/FPGA/ Timing / Display Controller Figure 2. Typical DS90UB913/914Q Imager System Diagram Refer to the proper datasheet information on Chipsets (Serializer/Deserializer) for more detailed information. How to set up the Demo Evaluation Kit: The DS90UB913Q/914Q evaluation boards consist of two sections. The first part of the board provides the point-to-point interface for transmitting parallel video data. The second part of the board allows bi-directional control communication of an I2C bus control of using a MCU/FPGA to programming a remote peripheral device via the Serializer. SNLU100 – April 2012 SERDESUB-16USB User’s Guide 3 The PCB routing for the Serializer input pins (DIN) accept incoming parallel video data at 1.8V/3.3V LVCMOS signals from J1 IDC connector. The FPD-Link III interface can use a single twisted pair cable or a single coax cable. The output pins (ROUT) are accessed through a JP1 IDC connector. Please follow these steps to set up the evaluation kit for bench testing and performance measurements: 1) Connect the DS90UB913/914Q demo boards using a Leoni/Dacar cable or a coaxial cable( not provided) 2) Jumpers and switches have been configured at the factory; they should not require any changes for immediate operation of the chipset. See text on Configuration settings and datasheet for more details. The jumpers and connectors are configured in external oscillator mode with the VDDIOs toggling at 3.3V. 3) From the imager, connect a flat cable (not supplied) to the Serializer board and connect another flat cable (not supplied) from the Deserializer board to the ECU/FPGA module. Note: For 50 ohm signal sources, provide 1.8V/3.3V LVCMOS input signal levels into DIN[12:0], HS, VS and PCLK 4) Connect the Deserializer I2C ports to the I2C of the MCU/FPGA (I2C master). Connect the Serializer I2C ports to the I2C bus of the peripheral slave device. 5) Power for the Serializer and Deserializer boards must be supplied externally through JP5 on the Deserializer board and JP4 on the Serializer board. Bi-Directional Control Bus And I2C Modes: In order to communicate and synchronize with remote devices on the I2C bus through the bi-directional control channel, slave clock stretching must be supported by the I 2C master controller/ECU. The chipset utilizes bus clock stretching (holding the SCL line low) during data transmission; where the I2C slave pulls the SCL line low prior to the 9th clock of every I2C data transfer (before the ACK signal). The bidirectional control bus supports an I2C compatible interface that allows programming of the DS90UB913Q, DS90UB914Q, or an external remote device (such as an imager). Register programming transactions to/from the DS90UB913Q/914Q chipset are employed through the clock (SCL) and data (SDA) lines. These two signals have open drain I/Os and must be pulled-up to VDDIO by external resistors. The boards have an option to use the on-board 10KΩ pull-up resistors tied to VDDIO or connected through external pull-ups at the target Host. The appropriate pull-up resistor values will depend upon the total bus capacitance and operating speed. The DS90UB913Q/914Q I 2C bus data rate supports up to 400 kbps according to I2C specification. Demo Board Power Connections: Power should be only applied to the DS90UB914Q Deserializer boards. Power is transferred over the link using either the Differential pair. 4 SERDESUB-913 User’s Guide SNLU110 – April 2012 DS9UB913Q Serializer Board Description: The 2x15-pin IDC connector JP1 accepts 10/12 bits of 1.8V or 3.3V data, HS, VS and PCLK. VDDIO must be set externally for 1.8V or 3.3V LVCMOS inputs using jumper JP8 and JP6 on the Serializer and Deserializer boards respectively. The Serializer board can be powered from the Deserializer board. For the Serializer to be operational, the S1-PDB switch on 1 must be set HIGH. S1-RES0 must be set LOW. The boards can be connected to the Deserializer boards using either Rosenberger connectors. Configuring the Mode Pin on the Serializer Board To configure the device in the external oscillator mode, PCLK mode or the AON clock mode, switch S8 has to be configured as shown in Table. 1. Mode Configuration Switch S8 Settings PCLK from imager External Oscillator Mode Table 1. Mode switch configuration on the Serializer Board Serializer LVCMOS Pinout by Connector The following three tables illustrate how the Deserializer connections are mapped to the IDC connector J1 on the Serializer board. JP1 LVCMOS I/O pin no. 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 SNLU100 – April 2012 name GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND name DIN0 DIN1 DIN2 DIN3 DIN4 DIN5 DIN6 DIN7 DIN8 DIN9 DIN10 DIN11 HS VS PCLK pin no. 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 SERDESUB-16USB User’s Guide 5 S1 Switch 1 – PDB Switch 2 – RES0 (Tied Low) JP1 : D0:D11, HS, VS, PCLK S2 Switch 3 – External Oscillator mode Switch 5 – Direct PCLK Mode JP4Power Figure 3. DS90UB913Q Boards with HSD Connector 6 SERDESUB-913 User’s Guide SNLU110 – April 2012 DS9UB914Q Deserializer Board Description: The Deserializer board can be powered using header JP5. For the Deserializer to be operational, follow the dip switch configuration for S1 and S2 shown in Table 2 and Table 3. The 2x15 pin IDC Connector JP1 provides access to the 1.8V or 3.3V LVCMOS data, HS, VS and PCLK outputs. The Deserializer board is by default configured to operate in the 100MHz mode with 3.3V I/O. The default device address of the DS90UB914Q on the Board is C0. Dip Switch S2 Configuration on the Deserializer Board To configure the DS90UB914Q device on the Deserializer board, please follow Table.2. Mode Configuration Switch S6 Settings 12-bit Low Frequency Mode 12-bit High Frequency Mode 10-bit Mode Table 2. Mode Switch Configuration on the Deserializer Board Dip Switch S1 Configuration on the Deserializer Board To configure the DS90UB914Q device on the Deserializer board, please follow Table.2. Mode Configuration Switch S6 Settings Normal Mode configuration BIST Mode configuration Table 3. Mode Switch Configuration on the Deserializer Board SNLU100 – April 2012 SERDESUB-16USB User’s Guide 7 Deserializer LVCMOS Pinout by Connector The following table illustrates how the Deserializer connections are mapped to the IDC connector J1 on the Serializer board. J1 LVCMOS I/O pin no. 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 8 SERDESUB-913 User’s Guide name ROUT0 ROUT1 ROUT2 ROUT3 ROUT4 ROUT5 ROUT6 ROUT7 ROUT8 ROUT9 ROUT10 ROUT11 HS VS PCLK name GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND pin no. 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 SNLU110 – April 2012 JP5 Power S2 Switch 1 – 12 bit LF mode Switch 2 – 12 bit HF mode Switch 3 – 10-bit mode JP1 ROUT[0:11], HS, VS, PCLK S1 Switch 1 – PDB Switch 2 – BISTEN Switch 3 – OEN Switch 4 – OSS_SEL Switch 5 – SEL Figure 4. DS90UB914Q Deserializer boards with HSD Connectors SNLU100 – April 2012 SERDESUB-16USB User’s Guide 9 Typical Connection and Test Equipment The following is a list of typical test equipment that may be used to generate signals for the Serializer inputs: 1) Image Sensor such as the OV10630 or MT9M024 2) Any other signal generator / video source that generates the correct input levels. The following is a list of typical test equipment that may be used to monitor the output signals from the Deserializer: 1) Microcontroller or FPGA with an I2C interface 2) Optional – Logic Analyzer or Oscilloscope 3) Any SCOPE with a bandwidth of at least 50MHz for 1.8V/3.3V LVCMOS and/or 1.5GHz for observing differential signals. Troubleshooting Demo Setup If the demo boards are not performing properly, use the following as a guide for quick solutions to potential problems. If the problem persists, please contact the local Sales Representative for assistance. QUICK CHECKS: 1. Check that Powers and Grounds are connected to both Serializer and Deserializer boards. 2. Verify input clock and input data signals meet requirements (VIL, VIH, tset, thold), Also verify that data is strobed on the selected rising/falling (RFB register) edge of the clock. 3. Check that the Jumpers and Switches are set correctly. 4. Check that the cable is properly connected. TROUBLESHOOTING CHART Problem… There is only the output clock. Solution… Make sure the data is applied to the correct input pin. There is no output data. Make sure data is valid at the input. No output data and clock. Make sure Power is on. Input data and clock are active and connected correctly. Power, ground, input data and input clock are connected correctly, but no outputs. Check the Power Down pins of both Serializer and Deserializer boards to make sure that the devices are enabled (PDB=Vdd) for operation. The devices are pulling more than 1A of current. Check for shorts in the cables connecting the Serializer and Deserializer boards. After powering up the demo boards, the power supply reads less than 1.8V when it is set to 1.8V. Use a larger power supply that will provide enough current for the demo boards, a 500mA minimum power supply is recommended. 10 SERDESUB-913 User’s Guide SNLU110 – April 2012 Note: Please note that the following references are supplied only as a courtesy to our valued customers. It is not intended to be an endorsement of any particular equipment or supplier. Cable References For optimal performance, we recommend Shielded Twisted Pair (STP) 100ohm differential impedance and 24 AWG (or larger diameter) cable for high-speed data applications. Leoni Dacar 535 series cable: www.leoni-automotive-cables.com Rosenberger HSD connector: www.rosenberger.de/en/Products/35_Automotive_HSD.php Equipment References Corelis CAS-1000-I2C/E I2C Bus Analyzer and Exerciser Products: www.corelis.com/products/I2C-Analyzer.htm SNLU100 – April 2012 SERDESUB-16USB User’s Guide 11 Appendix DS90UB913Q EVK Schematic 12 SERDESUB-913 User’s Guide SNLU110 – April 2012 SNLU100 – April 2012 SERDESUB-16USB User’s Guide 13 14 SERDESUB-913 User’s Guide SNLU110 – April 2012 DS90UB914Q EVK Schematic SNLU100 – April 2012 SERDESUB-16USB User’s Guide 15 16 SERDESUB-913 User’s Guide SNLU110 – April 2012 SNLU100 – April 2012 SERDESUB-16USB User’s Guide 17 DS90UB913Q PCB Layout 18 SERDESUB-913 User’s Guide SNLU110 – April 2012 SNLU100 – April 2012 SERDESUB-16USB User’s Guide 19 DS90UB914Q EVK Layout 20 SERDESUB-913 User’s Guide SNLU110 – April 2012 SNLU100 – April 2012 SERDESUB-16USB User’s Guide 21 FCC Warning This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general customer use. It generates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15 of FCC rules, which are designed to provide reasonable protection against radio frequency interference. Operation of this equipment in other environments may cause interference with radio communications, in which case the user at his own expense will be required to take whatever measures may be required to correct this interference. EVALUATION BOARD/KIT IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must have electronics training and observe good engineering practice standards. As such, the goods being provided are not intended to be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including product safety and environmental measures typically found in end products that incorporate such semiconductor components or circuit boards. This evaluation board/kit does not fall within the scope of the European Union directives regarding electromagnetic compatibility, restricted substances (RoHS), recycling (WEEE), FCC, CE or UL, and therefore may not meet the technical requirements of these directives or other related directives. Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30 days from the date of delivery for a full refund. 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