SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
DUAL PERIPHERAL DRIVERS
SLRS021B – DECEMBER 1976 – REVISED SEPTEMBER 1999
D
D
D
D
D
D
D
D
D
Characterized for Use to 300 mA
High-Voltage Outputs
No Output Latch-Up at 20 V (After
Conducting 300 mA)
High-Speed Switching
Circuit Flexibility for Varied Applications
TTL-Compatible Diode-Clamped Inputs
Standard Supply Voltages
Plastic DIP (P) With Copper Lead Frame
Provides Cooler Operation and Improved
Reliability
Package Options Include Plastic
Small-Outline Packages, Ceramic Chip
Carriers, and Standard Plastic and Ceramic
300-mil DIPs
SN55451B, SN55452B,
SN55453B, SN55454B . . . JG PACKAGE
SN75451B, SN75452B,
SN75453B, SN75454B . . . D OR P PACKAGE
(TOP VIEW)
1A
1B
1Y
GND
PACKAGES
SN55451B
AND
FK, JG
SN55452B
NAND
SN55453B
OR
SN55454B
NOR
JG
SN75451B
AND
D, P
SN75452B
NAND
D, P
SN75453B
OR
D, P
SN75454B
NOR
D, P
7
3
6
4
5
VCC
2B
2A
2Y
(TOP VIEW)
NC
1B
NC
1Y
NC
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
NC
2B
NC
2A
NC
NC
GND
NC
2Y
NC
LOGIC OF
COMPLETE CIRCUIT
8
2
SN55451B, SN55452B
SN55453B, SN55454B . . . FK PACKAGE
SUMMARY OF DEVICES
DEVICE
1
NC
1A
NC
VCC
NC
PERIPHERAL DRIVERS FOR
HIGH-CURRENT SWITCHING AT
VERY HIGH SPEEDS
NC – No internal connection
JG
FK, JG
description
The SN55451B through SN55454B and SN75451B through SN75454B are dual peripheral drivers designed
for use in systems that employ TTL logic. This family is functionally interchangeable with and replaces the
SN75450 family and the SN75450A family devices manufactured previously. The speed of the devices is equal
to that of the SN75450 family, and the parts are designed to ensure freedom from latch-up. Diode-clamped
inputs simplify circuit design. Typical applications include high-speed logic buffers, power drivers, relay drivers,
lamp drivers, MOS drivers, line drivers, and memory drivers.
The SN55451B/SN75451B, SN55452B/SN75452B, SN55453B/SN75453B, and SN55454B/SN75454B are
dual peripheral AND, NAND, OR, and NOR drivers, respectively (assuming positive logic), with the output of
the logic gates internally connected to the bases of the npn output transistors.
The SN55’ drivers are characterized for operation over the full military range of – 55°C to 125°C. The SN75’
drivers are characterized for operation from 0°C to 70°C.
Copyright 1999, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
DUAL PERIPHERAL DRIVERS
SLRS021B – DECEMBER 1976 – REVISED SEPTEMBER 1999
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
SN55’
Supply voltage, VCC (see Note 1)
SN75’
UNIT
7
7
V
Input voltage, VI
5.5
5.5
V
Inter-emitter voltage (see Note 2)
5.5
5.5
V
Off-state output voltage, VO
30
30
V
Continuous collector or output current, IOK (see Note 3)
400
400
mA
Peak collector or output current, II (tw ≤ 10 ms, duty cycle ≤ 50%, see Note 4)
500
500
mA
Continuous total power dissipation
See Dissipation Rating Table
Operating free-air temperature range, TA
Storage temperature range, Tstg
– 55 to 125
0 to 70
°C
– 65 to 150
– 65 to 150
°C
Case temperature for 60 seconds
FK package
260
°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds
JG package
300
°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
D or P package
NOTES: 1.
2.
3.
4.
°C
260
Voltage values are with respect to network GND, unless otherwise specified.
This is the voltage between two emitters of a multiple-emitter transistor.
This value applies when the base-emitter resistance (RBE) is equal to or less than 500 Ω.
Both halves of these dual circuits may conduct rated current simultaneously; however, power dissipation averaged over a short time
interval must fall within the continuous dissipation rating.
DISSIPATION RATING TABLE
PACKAGE
TA ≤ 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 125°C
POWER RATING
D
725 mW
5.8 mW/°C
464 mW
—
FK
1375 mW
11.0 mW/°C
880 mW
275 mW
JG
1050 mW
8.4 mW/°C
672 mW
210 mW
P
1000 mW
8.0 mW/°C
640 mW
—
recommended operating conditions
SN55’
Supply voltage, VCC
High-level input voltage, VIH
NOM
MAX
MIN
NOM
MAX
4.5
5
5.5
4.75
5
5.25
2
Low-level input voltage, VIL
2
0.8
Operating free-air temperature, TA
2
SN75’
MIN
– 55
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
125
0
UNIT
V
V
0.8
V
70
°C
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
DUAL PERIPHERAL DRIVERS
SLRS021B – DECEMBER 1976 – REVISED SEPTEMBER 1999
logic symbol†
1A
1B
2A
2B
logic diagram (positive logic)
1
&
2
3
6
5
7
1Y
1A
B
Y
L
L
L (on state)
L
H
L (on state)
H
L
L (on state)
H
H
H (off state)
2Y
7
2B
4
GND
schematic (each driver)
FUNCTION TABLE
(each driver)
A
5
6
2A
† This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC publication 617-12.
Pin numbers shown are for the D, JG, and P packages.
1Y
2
1B
2Y
3
1
VCC
4 kΩ
130 Ω
1.6 kΩ
Y
A
positive logic:
Y = AB or A+B
B
500 Ω
1 kΩ
GND
Resistor values shown are nominal.
electrical characteristics over recommended operating free-air temperature range
PARAMETER
VIK
Input clamp voltage
VOL
Low level output voltage
Low-level
IOH
High level output current
High-level
II
IIH
Input current at maximum input voltage
IIL
ICCH
Low-level input current
TEST CONDITIONS‡
VCC = MIN,
VCC = MIN,
IOL = 100 mA
II = – 12 mA
VIL = 0.8 V,
VCC = MIN,
IOL = 300 mA
VIL = 0.8 V,
VCC = MIN,
VOH = 30 V
VIH = MIN,
VCC = MAX,
VCC = MAX,
VI = 5.5 V
VI = 2.4 V
VCC = MAX,
VCC = MAX,
VI = 0.4 V
VI = 5 V
SN55451B
TYP§
MAX
MIN
SN75451B
TYP§
MAX
MIN
– 1.2
– 1.5
– 1.2
– 1.5
0 25
0.25
05
0.5
0 25
0.25
04
0.4
05
0.5
08
0.8
05
0.5
07
0.7
UNIT
V
V
300
100
µA
1
1
mA
40
µA
– 1.6
mA
7
11
mA
ICCL
Supply current, outputs low
VCC = MAX, VI = 0
52
65
52
‡ For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
§ All typical values are at VCC = 5 V, TA = 25°C.
65
mA
High-level input current
Supply current, outputs high
40
–1
– 1.6
–1
7
11
switching characteristics, VCC = 5 V, TA = 25°C
PARAMETER
TEST CONDITIONS
tPLH
tPHL
Propagation delay time, low-to-high-level output
tTLH
tTHL
Transition time, low-to-high-level output
VOH
Propagation delay time, high-to-low-level output
IO ≈ 200 mA,
RL = 50 Ω,
CL = 15 pF,
See Figure 1
VS = 20 V,,
See Figure 2
IO ≈ 300 mA,,
MIN
Transition time, high-to-low-level output
High level output voltage after switching
High-level
SN55451B
SN75451B
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TYP
MAX
18
25
18
25
5
8
7
12
VS – 6.5
VS – 6.5
UNIT
ns
mV
3
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
DUAL PERIPHERAL DRIVERS
SLRS021B – DECEMBER 1976 – REVISED SEPTEMBER 1999
logic symbol†
1A
1B
2A
2B
logic diagram (positive logic)
1
&
2
3
6
5
7
1A
1Y
5
6
2A
4
† This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC publication 617-12.
GND
schematic (each driver)
Pin numbers shown are for the D, JG, and P packages.
FUNCTION TABLE
(each driver)
B
2Y
7
2B
A
1Y
2
1B
2Y
3
1
VCC
1.6 kΩ
1.6 kΩ
4 kΩ
130 Ω
Y
L
L
H (off state)
L
H
H (off state)
H
L
H (off state)
H
H
L (on state)
Y
A
B
500 Ω
1 kΩ
1 kΩ
positive logic:
Y = AB or A+B
GND
Resistor values shown are nominal.
electrical characteristics over recommended operating free-air temperature range
TEST CONDITIONS‡
PARAMETER
VIK
VOL
Input clamp voltage
Low level output voltage
Low-level
IOH
High level output current
High-level
II
IIH
Input current at maximum input voltage
IIL
ICCH
Low-level input current
High-level input current
SN55452B
MIN
TYP§
MAX
SN75452B
MIN
TYP§
MAX
UNIT
V
VCC = MIN,
II = – 12 mA
– 1.2
– 1.5
– 1.2
– 1.5
VCC = MIN,,
IOL = 100 mA
VIH = MIN,,
0 25
0.25
05
0.5
0 25
0.25
04
0.4
VCC = MIN,,
IOL = 300 mA
VIH = MIN,,
05
0.5
08
0.8
05
0.5
07
0.7
VCC = MIN,,
VOH = 30 V
VIL = 0.8 V,,
VCC = MAX,
VCC = MAX,
VI = 5.5 V
VI = 2.4 V
VCC = MAX,
VCC = MAX,
VI = 0.4 V
VI = 0
V
100
µA
1
1
mA
40
40
µA
300
– 1.1
– 1.6
– 1.1
– 1.6
mA
11
14
11
14
mA
ICCL Supply current, outputs low
VCC = MAX, VI = 5 V
56
71
56
‡ For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
§ All typical values are at VCC = 5 V, TA = 25°C.
71
mA
Supply current, outputs high
switching characteristics, VCC = 5 V, TA = 25°C
PARAMETER
TEST CONDITIONS
tPLH
tPHL
Propagation delay time, low-to-high-level output
tTLH
tTHL
Transition time, low-to-high-level output
VOH
4
Propagation delay time, high-to-low-level output
IO ≈ 200 mA,
RL = 50 Ω,
CL = 15 pF,
See Figure 1
VS = 20 V,,
See Figure 2
IO ≈ 300 mA,,
MIN
Transition time, high-to-low-level output
High level output voltage after switching
High-level
SN55452B
SN75452B
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TYP
MAX
26
35
24
35
5
8
7
12
VS – 6.5
VS – 6.5
UNIT
ns
mV
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
DUAL PERIPHERAL DRIVERS
SLRS021B – DECEMBER 1976 – REVISED SEPTEMBER 1999
logic symbol†
1A
1B
2A
2B
logic diagram (positive logic)
1
≥1
2
3
1A
1Y
1B
6
5
7
2Y
2A
2B
† This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC publication 617-12.
Pin numbers shown are for the D, JG, and P packages.
B
Y
L
L
L (on state)
L
H
H (off state)
H
L
H (off state)
H
H
H (off state)
1Y
2
5
6
2Y
7
4
GND
schematic (each driver)
VCC
FUNCTION TABLE
(each driver)
A
3
1
4 kΩ
4 kΩ
1.6 kΩ
130 Ω
Y
A
B
positive logic:
Y = A+B or A B
500 Ω
1 kΩ
GND
Resistor values shown are nominal.
electrical characteristics over recommended operating free-air temperature range
PARAMETER
VIK
VOL
Input clamp voltage
Low level output voltage
Low-level
IOH
High level output current
High-level
II
IIH
Input current at maximum input voltage
IIL
ICCH
Low-level input current
TEST CONDITIONS‡
VCC = MIN,
VCC = MIN,,
IOL = 100 mA
SN55453B
MIN
TYP§
MAX
SN75453B
MIN
TYP§
MAX
UNIT
– 1.2
– 1.5
– 1.2
– 1.5
V
0 25
0.25
05
0.5
0 25
0.25
04
0.4
05
0.5
08
0.8
05
0.5
07
0.7
II = – 12 mA
VIL = 0.8 V,
VCC = MIN,,
IOL = 300 mA
VIL = 0.8 V,
VCC = MIN,,
VOH = 30 V
VIH = MIN,,
VCC = MAX,
VCC = MAX,
VI = 5.5 V
VI = 2.4 V
VCC = MAX,
VCC = MAX,
VI = 0.4 V
VI = 5 V
V
300
100
µA
1
1
mA
40
µA
–1
– 1.6
–1
– 1.6
mA
8
11
8
11
mA
ICCL
Supply current, outputs low
VCC = MAX, VI = 0
54
68
54
‡ For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
§ All typical values are at VCC = 5 V, TA = 25°C.
68
mA
High-level input current
Supply current, outputs high
40
switching characteristics, VCC = 5 V, TA = 25°C
PARAMETER
TEST CONDITIONS
tPLH
tPHL
Propagation delay time, low-to-high-level output
tTLH
tTHL
Transition time, low-to-high-level output
VOH
High level output voltage after switching
High-level
Propagation delay time, high-to-low-level output
IO ≈ 200 mA,,
RL = 50 Ω,
MIN
CL = 15 pF,,
See Figure 1
Transition time, high-to-low-level output
SN55453B
SN75453B
POST OFFICE BOX 655303
VS = 20 V,
See Figure 2
IO ≈ 300 mA,
• DALLAS, TEXAS 75265
TYP
MAX
18
25
18
25
5
8
7
12
VS – 6.5
VS – 6.5
UNIT
ns
mV
5
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
DUAL PERIPHERAL DRIVERS
SLRS021B – DECEMBER 1976 – REVISED SEPTEMBER 1999
logic symbol†
1A
1B
2A
2B
logic diagram (positive logic)
1
≥1
2
3
6
5
7
1A
1Y
B
Y
L
L
H (off state)
L
H
L (on state)
H
L
L (on state)
H
H
L (on state)
2Y
7
2B
4
GND
schematic (each driver)
FUNCTION TABLE
(each driver)
A
5
6
2A
† This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC publication 617-12.
Pin numbers shown are for the D, JG, and P packages.
1Y
2
1B
2Y
3
1
2 kΩ
4 kΩ
4
kΩ
VCC
2 kΩ
1.6
kΩ
130 Ω
Y
A
B
500 Ω
1 kΩ
1 kΩ
positive logic:
Y = A+B or AB
GND
Resistor values shown are nominal.
electrical characteristics over recommended operating free-air temperature range
TEST CONDITIONS‡
PARAMETER
VIK
VOL
Input clamp voltage
Low level output voltage
Low-level
IOH
High level output current
High-level
II
IIH
Input current at maximum input voltage
High-level input current
IIL
Low-level input current
ICCH Supply current, outputs high
SN55454B
TYP§
MAX
MIN
SN75454B
TYP§
MAX
MIN
VCC = MIN,
II = – 12 mA
– 1.2
– 1.5
– 1.2
– 1.5
VCC = MIN,,
IOL = 100 mA
VIH = MIN,,
0 25
0.25
05
0.5
0 25
0.25
04
0.4
VCC = MIN,,
IOL = 300 mA
VIH = MIN,,
05
0.5
08
0.8
05
0.5
07
0.7
VCC = MIN,,
VOH = 30 V
VIL = 0.8 V,,
VCC = MAX,
VCC = MAX,
VI = 5.5 V
VI = 2.4 V
VCC = MAX,
VCC = MAX,
VI = 0.4 V
VI = 0
UNIT
V
V
100
µA
1
1
mA
40
40
µA
300
–1
– 1.6
–1
– 1.6
mA
13
17
13
17
mA
ICCL Supply current, outputs low
VCC = MAX,
VI = 5 V
61
79
61
‡ For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
§ All typical values are at VCC = 5 V, TA = 25°C.
79
mA
switching characteristics, VCC = 5 V, TA = 25°C
PARAMETER
TEST CONDITIONS
tPLH
tPHL
Propagation delay time, low-to-high-level output
tTLH
tTHL
Transition time, low-to-high-level output
VOH
6
Propagation delay time, high-to-low-level output
IO ≈ 200 mA,,
RL = 50 Ω,
CL = 15 pF,,
See Figure 1
VS = 20 V,
See Figure 2
IO ≈ 300 mA,
MIN
Transition time, high-to-low-level output
High level output voltage after switching
High-level
SN55454B
SN75454B
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TYP
MAX
27
35
24
35
5
8
7
12
VS – 6.5
VS – 6.5
UNIT
ns
mV
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
DUAL PERIPHERAL DRIVERS
SLRS021B – DECEMBER 1976 – REVISED SEPTEMBER 1999
PARAMETER MEASUREMENT INFORMATION
≤ 10 ns
≤ 5 ns
Input
10 V
2.4 V
90%
Input
’451B
’453B
RL = 50 Ω
’451B
’452B
1.5 V
1.5 V
10%
Output
Pulse
Generator
(see Note A)
’453B
’454B
GND
0V
≤ 10 ns
3V
Input
’452B
’454B
90%
90%
1.5 V
1.5 V
10%
CL = 15 pF
(see Note B)
SUB
10%
0.5 µs
≤ 5 ns
Circuit
Under
Test
10%
tPHL
0V
tPLH
90%
90%
50%
10%
Output
0.4 V
3V
90%
VOH
50%
10%
VOL
TEST CIRCUIT
tTHL
tTLH
VOLTAGE WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω.
B. CL includes probe and jig capacitance.
Figure 1. Test Circuit and Voltage Waveforms, Complete Drivers
≤ 5 ns
VS = 20 V
≤ 10 ns
90%
Input
2.4 V
’451B
’452B
Input
’451B
’453B
2 mH
5V
90%
1.5 V
1.5 V
10%
65 Ω
1N3064
Input
’452B
’454B
Circuit
Under
Test
10%
40 µs
≤ 5 ns
Output
Pulse
Generator
(see Note A)
CL = 15 pF
(see Note B)
3V
90%
1.5 V
10%
0V
≤ 10 ns
3V
90%
1.5 V
10%
0V
VOH
’453B
’454B
GND
SUB
Output
VOL
0.4 V
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: PRR ≤ 12.5 kHz, ZO = 50 Ω.
B. CL includes probe and jig capacitance.
Figure 2. Test Circuit and Voltage Waveforms for Latch-Up Test of Complete Drivers
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
7
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
DUAL PERIPHERAL DRIVERS
SLRS021B – DECEMBER 1976 – REVISED SEPTEMBER 1999
TYPICAL CHARACTERISTICS
VCE(sat)
VCE(sat) – Collector-Emitter Saturation Voltage – V
TRANSISTOR
COLLECTOR-EMITTER SATURATION VOLTAGE
vs
COLLECTOR CURRENT
0.6
0.5
IC
= 10
IB
See Note A
0.4
TA = 70°C
0.3
TA = 0°C
0.2
0.1
TA = 25°C
0
10
20
40
70 100
200
IC – Collector Current – mA
400
NOTE A: These parameters must be measured using pulse techniques,
tw = 300 µs, duty cycle ≤ 2%.
Figure 3
8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
12-Jan-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
5962-9563301Q2A
ACTIVE
LCCC
FK
20
1
TBD
5962-9563301QPA
ACTIVE
CDIP
JG
8
1
TBD
77049012A
ACTIVE
LCCC
FK
20
1
TBD
7704901PA
ACTIVE
CDIP
JG
8
1
TBD
77049022A
ACTIVE
LCCC
FK
20
1
TBD
Lead/Ball Finish
MSL Peak Temp (3)
POST-PLATE N / A for Pkg Type
A42 SNPB
N / A for Pkg Type
POST-PLATE N / A for Pkg Type
A42 SNPB
N / A for Pkg Type
POST-PLATE N / A for Pkg Type
7704902PA
ACTIVE
CDIP
JG
8
1
TBD
A42 SNPB
N / A for Pkg Type
JM38510/12902BPA
ACTIVE
CDIP
JG
8
1
TBD
A42 SNPB
N / A for Pkg Type
JM38510/12903BPA
ACTIVE
CDIP
JG
8
1
TBD
A42 SNPB
N / A for Pkg Type
JM38510/12905BPA
ACTIVE
CDIP
JG
8
1
TBD
A42 SNPB
N / A for Pkg Type
SN55451BJG
ACTIVE
CDIP
JG
8
1
TBD
A42 SNPB
N / A for Pkg Type
SN55452BJG
ACTIVE
CDIP
JG
8
1
TBD
A42 SNPB
N / A for Pkg Type
SN55453BJG
ACTIVE
CDIP
JG
8
1
TBD
A42 SNPB
N / A for Pkg Type
SN55454BJG
ACTIVE
CDIP
JG
8
1
TBD
A42 SNPB
N / A for Pkg Type
SN75451BD
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75451BDE4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75451BDR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75451BDRE4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75451BP
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SN75451BPE4
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SN75451BPSR
ACTIVE
SO
PS
8
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75451BPSRE4
ACTIVE
SO
PS
8
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75452BD
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75452BDE4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75452BDR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75452BDRE4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75452BP
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SN75452BPE4
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SN75452BPSR
ACTIVE
SO
PS
8
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75452BPSRE4
ACTIVE
SO
PS
8
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75453BD
ACTIVE
SOIC
D
8
CU NIPDAU
Level-1-260C-UNLIM
75
Addendum-Page 1
Green (RoHS &
no Sb/Br)
PACKAGE OPTION ADDENDUM
www.ti.com
12-Jan-2006
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
SN75453BDE4
ACTIVE
SOIC
D
8
SN75453BDR
ACTIVE
SOIC
D
SN75453BDRE4
ACTIVE
SOIC
SN75453BP
ACTIVE
SN75453BPE4
75
Lead/Ball Finish
MSL Peak Temp (3)
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SN75453BPSR
ACTIVE
SO
PS
8
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75453BPSRE4
ACTIVE
SO
PS
8
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75454BD
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75454BDE4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75454BDR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75454BDRE4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75454BP
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SN75454BPE4
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SN75454BPSR
ACTIVE
SO
PS
8
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75454BPSRE4
ACTIVE
SO
PS
8
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SNJ55451BFK
ACTIVE
LCCC
FK
20
1
TBD
SNJ55451BJG
ACTIVE
CDIP
JG
8
1
TBD
SNJ55452BFK
ACTIVE
LCCC
FK
20
1
TBD
SNJ55452BJG
ACTIVE
CDIP
JG
8
1
TBD
SNJ55453BFK
ACTIVE
LCCC
FK
20
1
TBD
SNJ55453BJG
ACTIVE
CDIP
JG
8
1
TBD
SNJ55454BFK
OBSOLETE
LCCC
FK
20
SNJ55454BJG
ACTIVE
CDIP
JG
8
TBD
1
TBD
POST-PLATE N / A for Pkg Type
A42 SNPB
N / A for Pkg Type
POST-PLATE N / A for Pkg Type
A42 SNPB
N / A for Pkg Type
POST-PLATE N / A for Pkg Type
A42 SNPB
N / A for Pkg Type
POST-PLATE N / A for Pkg Type
A42 SNPB
N / A for Pkg Type
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
12-Jan-2006
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 3
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUARY 1997
JG (R-GDIP-T8)
CERAMIC DUAL-IN-LINE
0.400 (10,16)
0.355 (9,00)
8
5
0.280 (7,11)
0.245 (6,22)
1
0.063 (1,60)
0.015 (0,38)
4
0.065 (1,65)
0.045 (1,14)
0.310 (7,87)
0.290 (7,37)
0.020 (0,51) MIN
0.200 (5,08) MAX
Seating Plane
0.130 (3,30) MIN
0.023 (0,58)
0.015 (0,38)
0°–15°
0.100 (2,54)
0.014 (0,36)
0.008 (0,20)
4040107/C 08/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a ceramic lid using glass frit.
Index point is provided on cap for terminal identification.
Falls within MIL STD 1835 GDIP1-T8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
18
17
16
15
14
13
NO. OF
TERMINALS
**
12
19
11
20
10
A
B
MIN
MAX
MIN
MAX
20
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
28
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
9
22
8
44
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
23
7
52
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
24
6
68
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
84
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
B SQ
A SQ
25
5
26
27
28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140 / D 10/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a metal lid.
The terminals are gold plated.
Falls within JEDEC MS-004
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MPDI001A – JANUARY 1995 – REVISED JUNE 1999
P (R-PDIP-T8)
PLASTIC DUAL-IN-LINE
0.400 (10,60)
0.355 (9,02)
8
5
0.260 (6,60)
0.240 (6,10)
1
4
0.070 (1,78) MAX
0.325 (8,26)
0.300 (7,62)
0.020 (0,51) MIN
0.015 (0,38)
Gage Plane
0.200 (5,08) MAX
Seating Plane
0.010 (0,25) NOM
0.125 (3,18) MIN
0.100 (2,54)
0.021 (0,53)
0.015 (0,38)
0.430 (10,92)
MAX
0.010 (0,25) M
4040082/D 05/98
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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