SN64BCT126A
QUADRUPLE BUS BUFFER GATE
WITH 3-STATE OUTPUTS
SCBS051C – AUGUST 1990 – REVISED JULY 1998
D
State-of-the-Art BiCMOS Design
Significantly Reduces ICCZ
3-State Outputs Drive Bus Lines or
Buffer-Memory Address Registers
ESD Protection Exceeds 2000 V
Per MIL-STD-883 Method 3015
High-Impedance State During Power Up
and Power Down
Package Options Include Plastic
Small-Outline (D) and Standard Plastic
300-mil DIPs (N)
D
D
D
D
D OR N PACKAGE
(TOP VIEW)
1OE
1A
1Y
2OE
2A
2Y
GND
1
14
2
13
3
12
4
11
5
10
6
9
7
8
VCC
4OE
4A
4Y
3OE
3A
3Y
description
The SN64BCT126A bus buffer features independent line drivers with 3-state outputs. Each output is disabled
when the associated output-enable (OE) input is low.
The SN64BCT126A is characterized for operation from – 40°C to 85°C and 0°C to 70°C.
FUNCTION TABLE
(each buffer)
INPUTS
OE
A
OUTPUT
Y
H
H
H
H
L
L
L
X
Z
logic symbol†
1OE
1A
2OE
2A
3OE
3A
4OE
4A
1
2
logic diagram (positive logic)
EN
1
3
4
6
5
1OE
1Y
1A
2Y
10
8
9
13
11
12
1
2
3
1Y
4
2OE
3Y
2A
4Y
3OE
† This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
3A
4OE
4A
5
6
2Y
10
9
8
3Y
13
12
11
4Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 1998, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
•
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POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443
•
1
SN64BCT126A
QUADRUPLE BUS BUFFER GATE
WITH 3-STATE OUTPUTS
SCBS051C – AUGUST 1990 – REVISED JULY 1998
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Voltage range applied to any output in the disabled or power-off state, VO . . . . . . . . . . . . . . . . –0.5 V to 5.5 V
Voltage range applied to any output in the high state, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC
Current into any output in the low state, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input negative voltage rating may be exceeded if the input clamp current rating is observed.
2. The package thermal impedance is calculated in acordane with JESD 51, except for through-hole packages, which use a trace length
of zero.
recommended operating conditions (see Note 3)
MIN
NOM
MAX
4.5
5
5.5
UNIT
VCC
VIH
Supply voltage
VIL
IIK
Low-level input voltage
0.8
V
Input clamp current
–18
mA
IOH
IOL
High-level output current
–15
mA
Low-level output current
64
mA
High-level input voltage
2
V
V
TA
Operating free-air temperature
–40
85
°C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
2
•
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•
SN64BCT126A
QUADRUPLE BUS BUFFER GATE
WITH 3-STATE OUTPUTS
SCBS051C – AUGUST 1990 – REVISED JULY 1998
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VIK
VCC = 4.5 V,
VOH
VCC = 4
4.5
5V
VOL
IOZH
VCC = 4.5 V,
VCC = 5.5 V,
IOZL
VCC = 5.5 V,
VCC = 0 to 1.3 V (power up)
IOZ
II
IIH
IIL
IOS‡
ICCL
ICCH
ICCZ
Ci
MIN
II = –18 mA
IOH = – 3 mA
TYP†
2.4
3.3
2
3.1
IOH = – 15 mA
IOH = 64 mA
0.42
VO = 2
2.7
7 V or 0
0.5
5V
V,
VCC = 5.5 V,
VCC = 5.5 V,
VCC = 5.5 V,
VCC = 5.5 V
V
0.55
V
50
µA
–50
µA
"50
"50
OE at 2 V
µA
VI = 7 V
VI = 2.7 V
0.1
mA
25
µA
VI = 0.5 V
VO = 0
–20
µA
–225
mA
35
51
mA
21
33
mA
5
10
mA
–100
VCC = 5.5 V
VCC = 5.5 V
VCC = 5 V,
UNIT
–1.2
V
VO = 2.7 V
VO = 0.5 V
VCC = 1.3 V to 0 (power down)
VCC = 0,
MAX
VI = 2.5 V or 0.5 V
VO = 2.5 V or 0.5 V
Co
VCC = 5 V,
† All typical values are at VCC = 5 V, TA = 25°C.
‡ Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
4
pF
9
pF
switching characteristics (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A
Y
tPZH
tPZL
OE
Y
tPHZ
tPLZ
OE
Y
VCC = 4.5 V to 5.5 V
CL = 50 pF,
R1 = 500 Ω,
R2 = 500 Ω
VCC = 5 V,
CL = 50 pF,
R1 = 500 Ω,
R2 = 500 Ω
Ω,
TA = 25°C
•
TA = – 40 °C
to 85°C
MIN
TYP
MAX
MIN
MAX
MIN
MAX
1.5
3.6
4.9
1.5
6.3
1.5
6.3
2.7
5.3
6.9
2.7
7.7
2.7
7.4
2.6
4.8
6.4
2.6
7.9
2.6
7.9
3.7
6.4
8.3
3.7
10.5
3.7
10
3.2
6.6
8.2
3.2
10
3.2
10
3.4
6.5
8
3.4
12.3
3.4
10.7
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•
UNIT
TA = 0°C
to 70°C
ns
ns
ns
3
SN64BCT126A
QUADRUPLE BUS BUFFER GATE
WITH 3-STATE OUTPUTS
SCBS051C – AUGUST 1990 – REVISED JULY 1998
PARAMETER MEASUREMENT INFORMATION
7 V (tPZL, tPLZ, O.C.)
S1
Open
(all others)
From Output
Under Test
Test
Point
CL
(see Note A)
R1
From Output
Under Test
R1
Test
Point
CL
(see Note A)
R2
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
RL = R1 = R2
LOAD CIRCUIT FOR
3-STATE AND OPEN-COLLECTOR OUTPUTS
High-Level
Pulse
(see Note B)
3V
Timing Input
(see Note B)
3V
1.5 V
1.5 V
0V
1.5 V
tw
0V
Data Input
(see Note B)
3V
th
tsu
Low-Level
Pulse
3V
1.5 V
1.5 V
0V
1.5 V
1.5 V
VOLTAGE WAVEFORMS
PULSE DURATION
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3V
Output
Control
(low-level enable)
3V
Input
(see Note B)
1.5 V
1.5 V
0V
tPLH
In-Phase
Output
(see Note D)
VOH
VOL
VOH
1.5 V
1.5 V
0V
tPLZ
1.5 V
Waveform 1
(see Notes C and D)
3.5 V
VOL
tPHZ
tPLH
tPHL
Out-of-Phase
Output
(see Note D)
1.5 V
1.5 V
tPZL
tPHL
1.5 V
1.5 V
0.3 V
tPZH
Waveform 2
(see Notes C and D)
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES (see Note D)
VOH
1.5 V
0.3 V
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, tr = tf ≤ 2.5 ns, duty cycle = 50%.
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
D. The outputs are measured one at a time with one transition per measurement.
E. When measuring propagation delay times of 3-state outputs, switch S1 is open.
Figure 1. Load Circuits and Voltage Waveforms
4
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PACKAGE OPTION ADDENDUM
www.ti.com
6-Aug-2021
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
SN64BCT126AD
ACTIVE
SOIC
D
14
50
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
6BCT126A
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of