SN65C3232E, SN75C3232E
SLLS697B – DECEMBER 2005 – REVISED JUNE 2021
SNx5C3232E 3-V To 5.5-V Two-Channel RS-232 1-MBIT/S Line Drivers and Receivers
With ±15-kV IEC ESD Protection
1 Features
3 Description
•
•
•
•
•
•
The SN65C3232E and SN75C3232E consist of two
line drivers, two line receivers, and a dual chargepump circuit with ±15-kV ESD protection pin to pin
(serial-port connection pins, including GND). These
devices provide the electrical interface between
an asynchronous communication controller and the
serial-port connector. The charge pump and four small
external capacitors allow operation from a single 3-V
to 5.5-V supply. The devices operate at data signaling
rates up to 1 Mbit/s and a driver output slew rate of 14
V/μs to 150 V/μs.
•
Operate with 3-V to 5.5-V VCC supply
Operate up to 1 Mbit/s
Low supply current . . . 300 μA typical
External capacitors . . . 4 × 0.1 μF
Accept 5-V logic input with 3.3-V supply
Latch-up performance exceeds 100 mA Per JESD
78, class II
ESD protection for RS-232 pins
– ±15-kV Human-body model (HBM)
– ±15-kV IEC 61000-4-2 Air-gap discharge
– ±8-kV IEC 61000-4-2 Contact discharge
Device Information
2 Applications
PART NUMBER
• Industrial PCs
• Wired networking
• Data center and enterprise computing
• Battery-powered systems
• PDAs
• Notebooks
• Palmtop PCs
• Hand-held equipment
spacer
SN65C3232E
SN75C3232E
(1)
PACKAGE(1)
BODY SIZE (NOM)
D (SOIC)
9.90 mm x 3.91 mm
DB (SSOP)
6.20 mm x 5.30 mm
DW (SOIC)
10.3 mm x 7.50 mm
PW (TSSOP)
5.00 mm x 4.40 mm
For all available packages, see the orderable addendum at
the end of the data sheet.
spacer
11
14
DIN1
DIN1
10
7
DIN2
DIN2
12
13
RIN1
ROUT1
5k
9
8
RIN2
ROUT2
5k
Logic Diagram (Positive Logic)
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
SN65C3232E, SN75C3232E
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SLLS697B – DECEMBER 2005 – REVISED JUNE 2021
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 ESD Protection........................................................... 4
6.3 ESD Protection, Driver................................................4
6.4 ESD Protection, Receiver........................................... 4
6.5 Recommended Operating Conditions.........................5
6.6 Thermal Information, SN65C3232E............................5
6.7 Thermal Information, SN75C3232E............................5
6.8 Electrical Characteristics, Power................................ 6
6.9 Electrical Characteristics, Driver................................. 6
6.10 Electrical Characteristics, Receiver.......................... 6
6.11 Switching Characteristics, Driver.............................. 7
6.12 Switching Characteristics, Receiver..........................7
7 Parameter Measurement Information............................ 8
8 Detailed Description........................................................9
8.1 Overview..................................................................... 9
9 Application and Implenentation................................... 11
9.1 Application Information..............................................11
Typical Application.......................................................... 11
10 Power Supply Recommendations..............................13
11 Layout........................................................................... 13
11.1 Layout Guidelines................................................... 13
11.2 Layout Example...................................................... 13
12 Device and Documentation Support..........................14
12.1 Receiving Notification of Documentation Updates..14
12.2 Support Resources................................................. 14
12.3 Trademarks............................................................. 14
12.4 Electrostatic Discharge Caution..............................14
12.5 Glossary..................................................................14
13 Mechanical, Packaging, and Orderable
Information.................................................................... 14
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (December 2007) to Revision B (June 2021)
Page
• Added Device Information table, Pin Configuration and Functions section, Thermal Information tables,
Feature Description section, Device Functional Modes, Application and Implementation section, Power
Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section ............................................................................. 1
• Updated the list of Applications ......................................................................................................................... 1
• Added a note specifying a minimum capacitor of 1 µF between VCC and GND to satisfy IEC ESD
specifications in the ESD Protection, Driver table.............................................................................................. 4
• Added a note specifying the need for a 1-µF capacitor between VCC and GND to satisfy IEC ESD
specifications in the ESD Protection, Receiver table..........................................................................................4
2
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SLLS697B – DECEMBER 2005 – REVISED JUNE 2021
5 Pin Configuration and Functions
C1+
V+
C1−
C2+
C2−
V−
DOUT2
RIN2
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
VCC
GND
DOUT1
RIN1
ROUT1
DIN1
DIN2
ROUT2
Figure 5-1. D, DB, DW, or PW Package (Top View)
Table 5-1. Pin Functions
PIN
NAME
D, DB, DW or PW
I/O(1)
DESCRIPTION
C1+
1
-
Positive lead of C1 capacitor
V+
2
O
Positive charge pump output for storage capacitor only
C1-
3
-
Negative lead of C1 capacitor
C2+
4
-
Positive lead of C2 capacitor
C2-
5
-
Negative lead of C2 capacitor
V-
6
O
Negative charge pump output for storage capacitor only
DOUT2
7
O
RS232 line data output (to remote RS232 system)
RIN2
8
I
RS232 line data input (from remote RS232 system)
ROUT2
9
O
Logic data output (to UART)
DIN2
10
I
Logic data input (from UART)
DIN1
11
I
Logic data input (from UART)
ROUT1
12
O
Logic data output (to UART)
RIN1
13
I
RS232 line data input (from remote RS232 system)
DOUT1
14
O
RS232 line data output (to remote RS232 system)
GRD
15
-
Ground
VCC
16
-
Supply Voltage, Connect to external 3-V to 5.5-V power supply
-
-
Exposed thermal pad. Can be connected to GND or left floating.
Thermal Pad
(1)
Signal Types: I = Input, O = Output, I/O = Input or Output.
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) see (1)
Supply voltage range(2)
VCC
range(2)
V+
Positive output supply voltage
V–
Negative output supply voltage range(2)
V+ – V–
Supply voltage
Input voltage range
VO
Output voltage range
TJ
Operating virtual junction temperature
Tstg
Storage temperature range
(2)
MAX
6
V
–0.3
7
V
0.3
–7
V
13
V
difference(2)
VI
(1)
MIN
–0.3
Drivers
–0.3
6
Receivers
–25
25
–13.2
13.2
–0.3
VCC + 0.3
Drivers
Receivers
–65
UNIT
V
V
150
°C
150
°C
Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute MaximumRatings do not imply
functional operation of the device at these or any other conditions beyond those listed underRecommended Operating Conditions.
If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully
functional, and this may affect device reliability,functionality, performance, and shorten the device lifetime..
All voltages are with respect to network GND.
6.2 ESD Protection
VALUE
V (ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1).
±3000
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
±1500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 ESD Protection, Driver
PIN
NAME
NO.
DOUT
7, 14
TEST CONDITIONS
HBM, per ANSI/ESDA/JEDEC JS-001
±15
IEC 61000-4-2 Air-Gap Discharge (1)
±15
(1)
±8
IEC 61000-4-2 Contact Discharge
(1)
TYP
UNIT
kV
For D, DB, PW packages of SN65C3232E and PW package of SN75C3232E: A minimum of 1-µF capacitor is needed between VCC
and GND to meet the specified IEC ESD level
6.4 ESD Protection, Receiver
PIN
NAME
TEST CONDITIONS
NO.
HBM, per ANSI/ESDA/JEDEC JS-001
RIN
(1)
4
8, 13
TYP
±15
(1)
±15
IEC 61000-4-2 Contact Discharge (1)
±8
IEC 61000-4-2 Air-Gap Discharge
UNIT
kV
For D, DB, PW packages of SN65C3232E and PW package of SN75C3232E: A minimum of 1-µF capacitor is needed between VCC
and GND to meet the specified IEC ESD level
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6.5 Recommended Operating Conditions
see note (1)
VCC = 3.3 V
Supply voltage
VCC = 5 V
Driver high-level input voltage
VIL
Driver low-level input voltage
DIN
Driver input voltage
DIN
VI
TA
(1)
DIN
VCC = 3.3 V
VIH
NOM
MAX
3
3.3
3.6
4.5
5
5.5
UNIT
2
VCC = 5 V
V
V
2.4
0.8
0
5.5
–25
25
SN65C3232E
–40
85
SN75C3232E
0
70
Receiver input voltage
Operating free-air temperature
MIN
V
V
°C
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V (see Figure 9-1).
6.6 Thermal Information, SN65C3232E
SN65C3232E
THERMAL METRIC(1)
PW (TSSOP)
D (SOIC)
DW (SOIC)
DB
(SSOP)
UNIT
16 Pins
16 Pins
16 Pins
16 Pins
R θJA
Junction-to-ambient thermal resistance
108.0
85.9
57.0
103.1
°C/W
R θJC(top)
Junction-to-case (top) thermal
resistance
39.0
43.1
33.5
49.2
°C/W
R θJB
Junction-to-board thermal resistance
54.4
44.5
37.1
54.8
°C/W
ψ JT
Junction-to-top characterization
parameter
3.3
10.1
7.5
12.0
°C/W
ψ JB
Junction-to-board characterization
parameter
53.8
44.1
37.1
54.1
°C/W
R θJC(bot)
Junction-to-case (bottom) thermal
resistance
N/A
N/A
N/A
N/A
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC package thermal metrics application
report.
6.7 Thermal Information, SN75C3232E
SN75C3232E
METRIC(1)
PW (TSSOP)
D (SOIC)
DW (SOIC)
DB (SSOP)
UNIT
16 PINS
16 PINS
16 PINS
16 PINS
R θJA
Junction-to-ambient thermal
resistance
108.0
82.0
57.0
46.0
°C/W
R θJC(top)
Junction-to-case (top) thermal
39.0
36.7
33.5
36.2
°C/W
THERMAL
resistance
R θJB
Junction-to-board thermal resistance
54.4
33.6
37.1
43.8
°C/W
ψ JT
Junction-to-top characterization
parameter
3.3
4.2
7.5
4.2
°C/W
ψ JB
Junction-to-board characterization
parameter
53.8
33.3
37.1
42.9
°C/W
R θJC(bot)
Junction-to-case (bottom) thermal
resistance
N/A
N/A
N/A
N/A
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC package thermal metrics application
report.
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6.8 Electrical Characteristics, Power
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
TEST CONDITIONS(2)
PARAMETER
ICC
(1)
(2)
Supply current
No load,
MIN
VCC = 3.3 V or 5 V
TYP(1)
MAX
0.3
1
UNIT
mA
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V (see Figure 9-1).
6.9 Electrical Characteristics, Driver
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
TEST CONDITIONS(3)
PARAMETER
MIN
TYP(1)
MAX
UNIT
VOH
High-level output voltage
DOUT at RL = 3 kΩ to GND,
DIN = GND
5
5.5
V
VOL
Low-level output voltage
DOUT at RL = 3 kΩ to GND,
DIN = VCC
–5
–5.4
V
IIH
High-level input current
VI = VCC
±0.01
±1
μA
IIL
Low-level input current
VI at GND
±0.01
±1
μA
IOS
(2)
Short-circuit output current
ro
Output resistance
(1)
(2)
(3)
VCC = 3.6 V,
VO = 0 V
±35
±60
VCC = 5.5 V,
VO = 0 V
±35
±90
VCC, V+, and V– = 0 V,
VO = ±2 V
300
10M
mA
Ω
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
Short-circuit durations should be controlled to prevent exceeding the device absolute power dissipation ratings, and not more than one
output should be shorted at a time.
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V (see Figure 9-1) .
6.10 Electrical Characteristics, Receiver
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
TEST CONDITIONS(2)
PARAMETER
VOH
High-level output voltage
IOH = –1 mA
VOL
Low-level output voltage
IOL = 1.6 mA
VIT+
Positive-going input threshold voltage
VIT–
Negative-going input threshold voltage
Vhys
Input hysteresis (VIT+ – VIT–)
ri
Input resistance
(1)
(2)
6
MIN
TYP(1)
VCC – 0.6
VCC – 0.1
MAX
V
0.4
VCC = 3.3 V
1.5
2.4
VCC = 5 V
1.8
2.4
VCC = 3.3 V
0.6
1.2
VCC = 5 V
0.8
1.5
3
5
V
V
V
0.3
VI = ±3 V to ±25 V
UNIT
V
7
kΩ
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V (see Figure 9-1).
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6.11 Switching Characteristics, Driver
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
TEST CONDITIONS(3)
PARAMETER
MIN TYP(1) MAX UNIT
CL = 250 pF,
VCC = 3 V to 4.5 V
1000
CL = 1000 pF,
VCC = 3.5 V to 5.5 V
1000
Maximum data rate
(see Figure 7-1)
RL = 3 kΩ,
One DOUT switching
tsk(p)
Pulse skew(2)
CL = 150 pF to 2500 pF, RL = 3 kΩ to 7 kΩ, See Figure 7-2
SR(tr)
Slew rate,
transition region
(see Figure 7-1)
RL = 3 kΩ to 7 kΩ, CL = 150 pF to 1000 pF, VCC = 3.3 V
(1)
(2)
(3)
kbit/s
300
14
ns
150 V/μs
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
Pulse skew is defined as |tPLH – tPHL| of each channel of the same device.
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V (see Figure 9-1).
6.12 Switching Characteristics, Receiver
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
tPLH
Propagation delay time, low- to high-level output
tPHL
Propagation delay time, high- to low-level output
tsk(p)
Pulse skew(2)
(1)
(2)
(3)
TEST CONDITIONS(3)
CL = 150 pF
TYP(1)
UNIT
300
ns
300
ns
300
ns
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
Pulse skew is defined as |tPLH – tPHL| of each channel of the same device.
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V (see Figure 9-1).
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7 Parameter Measurement Information
3V
Input
Generator
(see Note B)
1.5 V
RS-232
Output
50 Ω
RL
1.5 V
0V
tTHL
CL
(see Note A)
Output
tTLH
3V
−3 V
TEST CIRCUIT
SR(tr) +
t
THL
6V
or t
VOH
3V
−3 V
VOL
VOLTAGE WAVEFORMS
TLH
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
Figure 7-1. Driver Slew Rate
3V
Generator
(see Note B)
RS-232
Output
50 Ω
RL
Input
1.5 V
1.5 V
0V
CL
(see Note A)
tPHL
tPLH
VOH
50%
50%
Output
VOL
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
Figure 7-2. Driver Pulse Skew
3V
Input
Generator
(see Note B)
1.5 V
1.5 V
−3 V
Output
50 Ω
tPHL
CL
(see Note A)
tPLH
VOH
50%
Output
50%
VOL
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
Figure 7-3. Receiver Propagation Delay Times
8
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8 Detailed Description
8.1 Overview
The SNx5C3232E device consists of two line drivers, two line receivers, and a dual charge-pump circuit
with ±15-kV IEC ESD protection between serial-port connection terminals and GND. The device meets the
requirements of TIA/EIA-232-F and provides the electrical interface between an asynchronous communication
controller and the serial-port connector. The charge pump and four small external capacitors allow operation
from one 3-V to 5.5-V supply. The device operates at data signaling rates up to 1 Mbps and a maximum of
150-V/μs driver output slew rate. Outputs are protected against shorts to ground.
8.1.1 Functional Block Diagram
11
14
DIN1
DIN1
10
7
DIN2
DIN2
12
13
RIN1
ROUT1
5k
9
8
RIN2
ROUT2
5k
8.1.2 Feature Description
8.1.2.1 Power
The power block increases, inverts, and regulates voltage at V+ and V– pins using a charge pump that requires
four external capacitors.
8.1.2.2 RS232 Driver
Two drivers interface the standard logic level to RS232 levels. Both DIN inputs must be valid high or low.
8.1.2.3 RS232 Receiver
Two receivers interface RS232 levels to standard logic levels. An open input results in a high output on ROUT.
Each RIN input includes an internal standard RS232 load.
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8.1.3 Device Functional Modes
Table 8-1. Each Driver
(1)
INPUT DIN(1)
OUTPUT DOUT
L
H
H
L
H = high level, L = low level
Table 8-2. Each Receiver
(1)
INPUT RIN(1)
OUTPUT ROUT
L
H
H
L
Open
H
H = high level, L = low level,
Open = input disconnected or connected driver off
8.1.3.1 VCC Powered by 3 V to 5.5 V
The device is in normal operation.
8.1.3.2 VCC Unpowered, VCC = 0 V
When the SNx5C3232E device is unpowered, it can be safely connected to an active remote RS232 device.
10
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9 Application and Implenentation
Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
9.1 Application Information
The SNx5C3232E device is designed to convert single-ended signals into RS232-compatible signals, and
vice-versa. This device can be used in any application where an RS232 line driver or receiver is required.
ROUT and DIN connect to UART or general-purpose logic lines. RIN and DOUT lines connect to a RS232
connector or cable.
Typical Application
1
VCC
C1+
16
+ CBYPASS = 0.1 mF
−
+
C1
−
2
+
V+
GND
15
C3
−
14
3
DOUT1
C1−
13
4
RIN1
C2+
+
C2
5 kW
−
5 C2−
12
6
−
C4
V−
ROUT1
11
DIN1
+
DOUT2
RIN2
7
10
8
9
DIN2
ROUT2
5 kW
A.
C3 can be connected to VCC or GND.
Figure 9-1. Typical Operating Circuit and Capacitor Values
Table 9-1. VCC vs Capacitor Values
VCC
C1
C2, C3, C4
3.3 V ± 0.3 V
0.1 µF
0.1 µF
5 V ± 0.5 V
0.047 µF
0.33 µF
3 V to 5.5 V
0.1 µF
0.47 µF
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9.2.1 Design Requirements
•
Recommended VCC is 3.3 V or 5 V
– 3 V to 5.5 V is also possible
Maximum recommended bit rate is 1 Mbps
•
9.2.2 Detailed Design Procedure
All DIN inputs must be connected to valid low or high logic levels. Select capacitor values based on VCC level for
best performance.
9.2.3 Application Performance Plots
VCC must be between 3 V and 5.5 V. Charge pump capacitors must be chosen using VCC vs Capacitor Values
Figure 9-2. 1 Mbps timing waveform from driver input to receiver output loopback. DOUT to RIN trace is
in purple, DIN trace is in yellow and ROUT trace is in pink
12
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SLLS697B – DECEMBER 2005 – REVISED JUNE 2021
10 Power Supply Recommendations
The supply voltage, VCC, should be between 3 V and 5.5 V. Select the charge-pump capacitors using VCC vs
Capacitor Values.
11 Layout
11.1 Layout Guidelines
Keep the external capacitor traces short, specifically on the C1 and C2 nodes that have the fastest rise and fall
times.
11.2 Layout Example
Ground
C3
C1
1 C1+
VCC 16
2 V+
GND 15
3 C1–
DOUT1 14
4 C2+
RIN1 13
5 C2–
ROUT1 12
VCC
0.1µF
Ground
C2
Ground
6 V–
DIN1 11
7 DOUT2
DIN2 10
C4
8 RIN2
ROUT2 9
Figure 11-1. Layout Diagram
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13
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www.ti.com
SLLS697B – DECEMBER 2005 – REVISED JUNE 2021
12 Device and Documentation Support
TI offers an extensive line of development tools. Tools and software to evaluate the performance of the device,
generate code, and develop solutions are listed below.
12.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
12.2 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
12.3 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
12.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
12.5 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
14
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PACKAGE OPTION ADDENDUM
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14-Oct-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
SN65C3232EDBR
ACTIVE
SSOP
DB
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
MU232E
Samples
SN65C3232EDBRG4
ACTIVE
SSOP
DB
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
MU232E
Samples
SN65C3232EDR
ACTIVE
SOIC
D
16
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
65C3232E
Samples
SN65C3232EDRG4
ACTIVE
SOIC
D
16
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
65C3232E
Samples
SN65C3232EDW
ACTIVE
SOIC
DW
16
40
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
65C3232E
Samples
SN65C3232EDWR
ACTIVE
SOIC
DW
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
65C3232E
Samples
SN65C3232EPWR
ACTIVE
TSSOP
PW
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
MU232E
Samples
SN75C3232EDW
ACTIVE
SOIC
DW
16
40
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
75C3232E
Samples
SN75C3232EDWR
ACTIVE
SOIC
DW
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
75C3232E
Samples
SN75C3232EPWR
ACTIVE
TSSOP
PW
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
MY232E
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of