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SN65HVD1176, SN75HVD1176
SLLS563H – JULY 2003 – REVISED NOVEMBER 2015
SNx5HVD1176 PROFIBUS® RS-485 Transceivers
1 Features
•
1
•
•
•
•
•
•
•
•
•
3 Description
The SNx5HVD1176 devices are half-duplex
differential transceivers with characteristics optimized
for use in PROFIBUS (EN 50170) applications. The
driver output differential voltage exceeds the
PROFIBUS requirements of 2.1 V with a 54-Ω load. A
signaling rate of up to 40 Mbps allows technology
growth to high data-transfer speeds. The low bus
capacitance provides low signal distortion.
®
Optimized for PROFIBUS Networks
– Signaling Rates up to 40 Mbps
– Differential Output Exceeds 2.1 V
(54-Ω Load)
– Low Bus Capacitance of 10 pF (Max)
Meets the Requirements of TIA/EIA-485-A
ESD Protection Exceeds ±10-kV HBM
Fail-Safe Receiver for Bus Open, Short, Idle
Up to 160 Transceivers on a Bus
Low Skew During Output Transitions and Driver
Enabling and Disabling
Common-Mode Rejection up to 50 MHz
Short-Circuit Current Limit
Hot Swap Capable
Thermal Shutdown Protection
The SN65HVD1176 and SN75HVD1176 devices
meet or exceed the requirements of ANSI standard
TIA/EIA-485-A (RS-485) for differential data
transmission across twisted-pair networks. The driver
outputs and receiver inputs are tied together to form a
half-duplex bus port with one-fifth unit load, which
allows up to 160 nodes on a single bus. The receiver
output stays at logic high when the bus lines are
shorted, left open, or when no driver is active. The
driver outputs are in high impedance when the supply
voltage is below 2.5 V to prevent bus disturbance
during power cycling or during live insertion to the
bus. An internal current limit protects the transceiver
bus pins in short-circuit fault conditions by limiting the
output current to a constant value. Thermal shutdown
circuitry protects the device against damage due to
excessive power dissipation caused by faulty loading
and drive conditions.
2 Applications
•
•
•
Process Automation
– Chemical Production
– Brewing and Distillation
– Paper Mills
Factory Automation
– Automobile Production
– Rolling, Pressing, Stamping Machines
– Networked Sensors
General RS-485 Networks
– Motor and Motion Control
– HVAC and Building Automation Networks
– Networked Security Stations
The SN75HVD1176 device is characterized for
operation at temperatures from 0°C to 70°C. The
SN65HVD1176 device is characterized for operation
at temperatures from –40°C to 85°C.
For an isolated version of this device, see the
ISO1176 device (SLLS897) with integrated digital
isolators.
Device Information(1)
PART NUMBER
SN65HVD1176
SN75HVD1176
PACKAGE
BODY SIZE (NOM)
SOIC (8)
4.90 mm × 3.91 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Logic Diagram (Positive Logic)
D
A
B
DE
RE
R
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
SN65HVD1176, SN75HVD1176
SLLS563H – JULY 2003 – REVISED NOVEMBER 2015
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
3
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
3
3
4
4
5
6
6
6
9
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Supply Current ..........................................................
Power Dissipation .....................................................
Switching Characteristics ..........................................
Typical Characteristics ..............................................
Parameter Measurement Information ................ 10
Detailed Description ............................................ 16
8.1 Overview ................................................................. 16
8.2 Functional Block Diagram ....................................... 16
8.3 Feature Description................................................. 16
8.4 Device Functional Modes........................................ 16
9
Application and Implementation ........................ 18
9.1 Application Information............................................ 18
9.2 Typical Application ................................................. 18
10 Power Supply Recommendations ..................... 22
11 Layout................................................................... 22
11.1 Layout Guidelines ................................................. 22
11.2 Layout Example .................................................... 22
12 Device and Documentation Support ................. 23
12.1
12.2
12.3
12.4
12.5
12.6
12.7
Third-Party Products Disclaimer ...........................
Documentation Support ........................................
Related Links ........................................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
23
23
23
23
23
23
23
13 Mechanical, Packaging, and Orderable
Information ........................................................... 23
4 Revision History
Changes from Revision G (June 2015) to Revision H
•
Page
Changed VID ≥ 0.02 V To: VID ≥ –0.02 V in Table 2 ............................................................................................................ 17
Changes from Revision F (June 2013) to Revision G
Page
•
Added Pin Configuration and Functions section, ESD Ratings table, Power Dissipation table, Feature Description
section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations
section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable
Information section ................................................................................................................................................................ 1
•
Added storage temperature to the Absolute Maximum Ratings table ................................................................................... 3
•
Added Psi JT and Psi JB values to the Thermal Information table ....................................................................................... 4
•
Deleted redundant IO(OFF) and IOZ lines from the Electrical Characteristics table ................................................................... 5
•
Deleted redundant COD line from the Electrical Characteristics table .................................................................................... 5
Changes from Revision E (August 2008) to Revision F
•
2
Page
Changed RE to RE in the pinout and Logic Diagram............................................................................................................. 1
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Product Folder Links: SN65HVD1176 SN75HVD1176
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SLLS563H – JULY 2003 – REVISED NOVEMBER 2015
5 Pin Configuration and Functions
D Package
8-Pin SOIC
Top View
R
1
8
VCC
RE
2
7
B
DE
3
6
A
D
4
5
GND
Pin Functions
PIN
NAME
I/O
NO.
DESCRIPTION
A
6
Bus input/output
Driver output/receiver input (complementary to B)
B
7
Bus input/output
Driver output/receiver input (complementary to A)
D
4
Digital input
Driver data input
DE
3
Digital input
Driver enable high
GND
5
Reference potential
Local device ground
R
1
Digital output
Receive data output
RE
2
Digital input
Receiver enable low
VCC
8
Supply
3-V to 5.5-V supply
6 Specifications
6.1 Absolute Maximum Ratings
over operating junction temperature range unless otherwise noted (1)
MIN
MAX
UNIT
–0.5
7
V
Voltage at any bus I/O terminal
–9
14
V
Voltage input, transient pulse, A and B, (through 100 Ω, see Figure 20)
–40
40
V
Supply voltage (2)
VCC
Voltage input at any D, DE or RE terminal
–0.5
7
V
IO
Receiver output current
–10
10
mA
TJ
Junction temperature
150
°C
Tstg
Storage temperature
130
°C
(1)
(2)
–40
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage
values are with respect to the network ground terminal unless otherwise noted.
All voltage values, except differential I/O bus voltages, are with respect to network ground terminal.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
Electrostatic
discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS001 (1)
All pins
±4000
Bus terminals and GND
±10000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
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SLLS563H – JULY 2003 – REVISED NOVEMBER 2015
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6.3 Recommended Operating Conditions
VCC
Supply voltage
Voltage at either bus I/O terminal
VIH
High-level input voltage
VIL
Low-level input voltage
VIL
Differential input voltage
IO
D, DE, RE
Output current
(1)
Junction temperature
RL
Differential load resistance
1/tU1
Signaling rate
NOM
MAX
UNIT
5
5.25
V
–7
12
V
2
VCC
V
V
0
0.8
A with respect to B
–12
12
V
Driver
–70
70
mA
Receiver
TJ
(1)
A, B
MIN
4.75
–8
8
mA
SN65HVD1176
–40
130
°C
SN75HVD1176
0
130
°C
40
Mbps
Ω
54
See the Power Dissipation table for more information on maintenance of this requirement.
6.4 Thermal Information
SN65HVD1176,
SN75HVD1176
THERMAL METRIC (1)
D (SOIC)
UNIT
8 PINS
Low-K board (3), no air flow
208.3
°C/W
High-K board (4), no air flow
104.7
°C/W
45.8
°C/W
45.9
°C/W
RθJA
Junction-to-ambient thermal resistance (2)
RθJC(top)
Junction-to-case (top) thermal resistance
RθJB
Junction-to-board thermal resistance
ψJT
Junction-to-top characterization parameter
5.7
°C/W
ψJB
Junction-to-board characterization parameter
45.2
°C/W
(1)
(2)
(3)
(4)
4
High-K board
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
The intent of RθJA specification is solely for a thermal performance comparison of one package to another in a standardized
environment. This methodology is not meant to and will not predict the performance of a package in an application-specific environment.
JESD51-3, Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages.
JESD51-7, High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages.
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SLLS563H – JULY 2003 – REVISED NOVEMBER 2015
6.5 Electrical Characteristics
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP (1)
MAX
UNIT
VCC
V
DRIVER
VO
Open-circuit output voltage
A or B
No load
RL = 54 Ω
See Figure 6
0
2.1
2.9
V
With common-mode loading,
(VTEST from –7 V to 12 V)
See Figure 7
2.1
2.7
V
–0.2
0
0.2
V
|VOD(SS)|
Steady-state differential output voltage
magnitude
Δ|VOD(SS)|
Change in steady-state differential output
voltage between logic states
See Figure 6 and Figure 11
VOC(SS)
Steady-state common-mode output voltage
See Figure 10
2
2.5
3
V
ΔVOC(SS)
Change in steady-state common-mode output
See Figure 10
voltage
–0.2
0
0.2
V
VOC(PP)
Peak-to-peak common-mode output voltage
See Figure 10
VOD(RING)
Differential output voltage over and under
shoot
RL = 54 Ω, CL = 50 pF
See Figure 11
II
Input current
D, DE
IOS(P)
Peak short-circuit output current
DE at VCC,
See Figure 13
IOS(SS)
Steady-state short-circuit output current
DE at VCC,
See Figure 13
0.5
VOS = –7 V to 12 V
VOS > 4 V,
Output driving low
VOS < 1 V,
Output driving high
V
10%
VOD(PP)
–50
50
μA
–250
250
mA
60
90
135
mA
–135
–90
–60
mA
–80
–20
mV
RECEIVER
VIT(+)
Positive-going differential input voltage
threshold
VIT(–)
Negative-going differential input voltage
threshold
VHYS
Hysteresis voltage (VIT+ – VIT-)
SeeFigure 14
VO = 2.4 V, IO = –8 mA
VO = 0.4 V, IO = 8 mA
VOH
High-level output voltage
VID = 200 mV, IOH = –8 mA,
See Figure 14
VOL
Low-level output voltage
VID = –200 mV, IOL = 8 mA,
See Figure 14
IA(OFF)
IB(OFF)
Bus pin input current
VI = –7 V to 12 V,
Other input = 0 V
II
Receiver enable input current
RE
IOZ
High-impedance - state output current
RE = VCC
RI
Input resistance
IA, IB
4
–120
mV
40
mV
4.6
V
0.2
0.4
V
VCC = 4.75 V to 5.25 V
–160
200
VCC = 0 V
–160
200
–50
50
μA
–1
1
μA
60
CID
Differential input capacitance
Test input signal is a 1.5-MHz sine wave with
amplitude 1 VPP, capacitance measured across A
and B
CMR
Common mode rejection
See Figure 16
(1)
–200
μA
kΩ
7
4
10
pF
V
All typical values are at VCC = 5 V and 25°C.
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6.6 Supply Current
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
4
6
mA
Driver only, RE at VCC, DE at VCC,
All other inputs open, no load
3.8
6
mA
Receiver only, RE at 0 V, DE at 0 V,
All other inputs open, no load
3.6
6
mA
Standby only, RE at VCC, DE at 0 V,
All other inputs open
0.2
5
μA
TYP (1)
MAX
UNIT
277
318
mW
Driver and receiver, RE at 0 V, DE at VCC,
All other inputs open, no load
ICC
(1)
Supply Current
(1)
UNIT
Over recommended operating conditions
6.7 Power Dissipation
over recommended operating conditions (unless otherwise noted)
PARAMETER
PD
TEST CONDITIONS
RL = 54 Ω, CL = 50 pF, 0 V to 3 V,
15 MHz, 50% duty cycle square wave
input, driver and receiver enabled
Device power dissipation
SN65HVD1176
TA
Ambient air temperature
SN75HVD1176
TSD
(1)
MIN
Low-K board, no air flow,
PD = 318 mW
–40
64
°C
High-K board, no air flow,
PD = 318 mW
–40
89
°C
Low-K board, no air flow,
PD = 318 mW
0
°C
High-K board, no air flow,
PD = 318 mW
0
°C
Thermal shut down junction temperature
150
°C
All typical values are with VCC = 5 V and TA = 25°C.
6.8 Switching Characteristics
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP (1)
MAX
4
7
10
ns
4
7
10
ns
0
2
ns
3
7.5
ns
UNIT
DRIVER
tPLH
Propagation delay time low-level-to-high-level output
tPHL
Propagation delay time high-level-to-low-level output
tsk(p)
Pulse skew | tPLH – tPHL |
tr
Differential output rise time
tf
Differential output fall time
tt(MLH), tt(MHL)
Output transition skew
tp(AZH), tp(BZH)
tp(AZL), tp(BZL)
Propagation delay time, high-impedance-to-active
output
tp(AHZ), tp(BHZ)
tp(ALZ), tp(BLZ)
Propagation delay time, active-to- high-impedance
output
|tp(AZL) – tp(BZH)|
|tp(AZH) – tp(BZL)|
Enable skew time
|tp(ALZ) – tp(BHZ)|
|tp(AHZ) – tp(BLZ)|
Disable skew time
tp(AZH), tp(BZH)
tp(AZL), tp(BZL)
Propagation delay time, high-impedance-to-active
output (from sleep mode)
tp(AHZ), tp(BHZ)
tp(ALZ), tp(BLZ)
Propagation delay time, active-output-to highimpedance (to sleep mode)
t(CFB)
Time from application of short-circuit to current
foldback
(1)
6
RL = 54 Ω, CL = 50 pF,
See Figure 8
2
2
See Figure 9
RL = 110 Ω,
CL = 50 pF
See Figure 12
RL = 110 Ω,
CL = 50 pF
See Figure 12
3
7.5
ns
0.2
1
ns
10
20
ns
10
20
ns
0.55
1.5
ns
2.5
ns
1
4
μs
30
50
ns
RE at 0 V
RE at 5 V
See Figure 13
0.5
μs
All typical values are at VCC = 5 V and 25°C.
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Switching Characteristics (continued)
over recommended operating conditions (unless otherwise noted)
PARAMETER
t(TSD)
Time from application of short-circuit to thermal
shutdown
TEST CONDITIONS
TA = 25°C,
See Figure 13
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MIN
TYP (1)
MAX
100
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UNIT
μs
7
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Switching Characteristics (continued)
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP (1)
MAX
UNIT
RECEIVER
tPLH
Propagation delay time, low-to-high level output
20
25
ns
tPHL
Propagation delay time, high-to-low level output
20
25
ns
tsk(p)
Pulse skew | tPLH – tPHL |
1
2
ns
tr
Receiver output voltage rise time
2
4
ns
tf
Receiver output voltage fall time
2
4
ns
tPZH
Propagation delay time, high-impedance-to-high-level
output
20
ns
tPHZ
Propagation delay time, high-level-to-high-impedance
output
20
ns
tPZL
Propagation delay time, high-impedance-to-low-level
output
20
ns
tPLZ
Propagation delay time, low-level-to-high-impedance
output
20
ns
tPZH
Propagation delay time, high-impedance-to-high-level
output (standby to active)
1
4
μs
tPHZ
Propagation delay time, high-level-to-high-impedance
output (active to standby)
13
20
ns
tPZL
Propagation delay time, high-impedance-to-low-level
output (standby to active)
2
4
μs
tPLZ
Propagation delay time, low-level-to-high-impedance
output (active to standby)
13
20
ns
8
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See Figure 15
DE at VCC,
See Figure 18
DE at VCC,
See Figure 19
DE at 0 V,
See Figure 17
DE at 0 V,
See Figure 17
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6.9 Typical Characteristics
66
5
VOD − Differential Output Voltage − V
4.5
VCC = 5.25 V
4
I DD − Driver Supply Current − mArms
VCC = 5 V
100 Ω
3.5
50 Ω
3
VCC = 4.75 V
2.5
2
1.5
1
64
62
60
VCC = 5 V
TA = 25°C
RL = 56 Ω,
DE and RE at 5 V
Input 0 V to 3 V PRBS
58
56
0.5
TA = 25 C
0
0
54
20
40
60
IL − Load Current − mA
0
80
4
3.75
VCC = 4.75 V
Driver Rise, Fall Time − ns
Driver Output Transition Skew − ns
RL = 54 Ω,
CL = 50 pF
0.25
0.15
VCC = 5 V
VCC = 5.25 V
0.1
0.05
0
−40
30
40
50
Figure 2. Driver Supply Current vs Signaling Rate
0.35
0.2
20
Signaling Rate − Mbps
Figure 1. Differential Output Voltage vs Load Current
0.3
10
RL = 54 Ω,
CL = 50 pF
VCC = 4.75 V
3.5
VCC = 5 V
3.25
3
VCC = 5.25 V
2.75
2.5
2.25
−15
10
35
60
TA − Free-Air Temperature − °C
2
−40
85
Figure 3. Driver Output Transition Skew vs Free-Air
Temperature
−15
10
35
60
TA − Free-Air Temperature − °C
85
Figure 4. Driver Rise, Fall Time vs Free-Air Temperature
0.7
VCC = 4.75 V
Driver Enable Skew − ns
0.6
0.5
VCC = 5.25 V
0.4
VCC = 5 V
0.3
0.2
0.1
RL = 110 Ω,
CL = 50 pF
0
−40
−15
10
35
60
TA − Free-Air Temperature − °C
85
Figure 5. Driver Enable Skew vs Free-Air Temperature
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7 Parameter Measurement Information
NOTE
Test load capacitance includes probe and jig capacitance (unless otherwise specified).
Signal generator characteristics: rise and fall time < 6 ns, pulse rate 100 kHz, 50% duty
cycle, Zo = 50 Ω (unless otherwise specified).
A
II
IO
27 Ω
VOD
0 V or 3 V
50 pF
D
B
27 Ω
IO
VOC
Figure 6. Driver Test Circuit, VOD and VOC Without Common-Mode Loading
375 Ω
A
VOD
0 V or 3 V
60 Ω
VTEST = −7 V to 12 V
D
375 Ω
B
VTEST
Figure 7. Driver Test Circuit, VOD With Common-Mode Loading
3V
INPUT
0V
VOD
RL = 54 Ω
Signal
Generator
CL = 50 pF
50 Ω
90%
VOD(H)
10%
VOD(L)
OUTPUT
tr
tf
Figure 8. Driver Switching Test Circuit and Rise/Fall Time Measurement
10
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Parameter Measurement Information (continued)
1.5 V
D
1.5 V
tPLH
tPHL
A,B
50%
A
50%
tt(MLH)
tt(MHL)
50%
B
50%
Figure 9. Driver Switching Waveforms for Propagation Delay and Output Midpoint Time Measurements
27 Ω
A
VA
D
Signal
Generator
50 Ω
B
27 Ω
≈ 3.25 V
VB
50 pF
≈ 1.75 V
VOC(PP)
VOC
∆VOC(SS)
VOC
Figure 10. Driver VOC Test Circuit and Waveforms
VOD(SS)
VOD(RING)
VOD(PP)
0 V Differential
VOD(RING)
VOD(SS)
(1)
VOD(RING) is measured at four points on the output waveform, corresponding to overshoot and undershoot from the
VOD(H) and VOD(L) steady state values.
Figure 11. VOD(RING) Waveform and Definitions
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Parameter Measurement Information (continued)
3V
DE
RL = 110 Ω
0V
D
DE
Signal
Generator
A
VCC
tp(AZL)
CL = 50 pF
50 Ω
tp(ALZ)
A
RL = 110 Ω
B
1.5 V
0V
50%
VOL +0.5 V
tp(BHZ)
tp(BZH)
CL = 50 pF
B
50%
VOL −0.5 V
a) D at Logic Low
3V
DE
1.5 V
1.5 V
RL = 110 Ω
0V
3V
D
DE
Signal
Generator
A
tp(AZH)
CL = 50 pF
tp(AHZ)
A
50%
VOH −0.5 V
RL = 110 Ω
B
VCC
50 Ω
tp(BLZ)
tp(BZL)
CL = 50 pF
50%
B
VOH +0.5 V
b) D at Logic High
Figure 12. Driver Enable/Disable Test
250
Output
Current |mA|
IOS
D
135
VOS
60
Voltage
Source
time
t(CFB)
t(TSD)
Figure 13. Driver Short-Circuit Test Circuit and Waveforms (Short Circuit applied at Time t = 0)
IA
VA
VA + VB
VIC
A
R
VID
IO
B
VB
IB
VO
2
Figure 14. Receiver DC Parameter Definitions
12
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Parameter Measurement Information (continued)
Signal
Generator
50 Ω
Input B
VID
A
B
Signal
Generator
R
CL = 15 pF
50 Ω
IO
1.5 V
50%
Input A
tPLH
VO
Output
90%
1.5 V
0V
tPHL
VOH
10% V
OL
tr
tf
Figure 15. Receiver Switching Test Circuit and Waveforms
50 Ω
100 nF
VI = A sin 2 ft
1 MHz < f < 50 MHz
50 Ω
A
R
470 nF
RE
B
DE
2.2 kΩ
Voffset =
−2 V to 7 V
2.2 kΩ
VR
Scope
D
Scope
GND
VCC
100 nF
VR shall be greater than
2 V throughout this test.
Figure 16. Receiver Common-Mode Rejection Test Circuit
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Parameter Measurement Information (continued)
3V
A
0 V or 1.5 V
R
B
1.5 V or 0 V
RE
Input
Generator
VI
A
1 kΩ ± 1%
VO
S1
CL = 15 pF ±20%
B
50 Ω
3V
1.5 V
VI
0V
tPZH(2)
VOH
A at 1.5 V
B at 0 V
S1 to B
1.5 V
VO
GND
tPZL(2)
3V
1.5 V
VO
A at 0 V
B at 1.5 V
S1 to A
VOL
Figure 17. Receiver Enable Time From Standby (Driver Disabled)
VCC
VCC
D
DE
A
54 Ω
B
R
RE
Signal
Generator
1 kΩ
3V
0V
RE
1.5 V
0V
CL = 15 pF
tPZH
tPHZ
VOH
50 Ω
R
1.5 V
VOH −0.5 V
GND
Figure 18. Receiver Enable Test Circuit and Waveforms, Data Output High (Driver Active)
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Parameter Measurement Information (continued)
Ω
1 kΩ
Ω
Figure 19. Receiver Enable Test Circuit and Waveforms, Data Output Low (Driver Active)
100 Ω
VTEST
0V
Pulse Generator,
15 ms Duration,
1% Duty Cycle
15 ms
1.5 ms
−VTEST
Figure 20. Test Circuit and Waveforms, Transient Overvoltage Test
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8 Detailed Description
8.1 Overview
The SNx5HVD1176 device is a 5-V, half-duplex, RS-485 transceiver optimized for use in PROFIBUS (EN50170)
applications and suitable for data transmission up to 40 Mbps.
The driver output differential voltage exceeds the PROFIBUS requirement of 2.1 V with a 54-Ω load, and the low
transceiver output capacitance of 10 pF supports the PROFIBUS requirements for maximum bus capacitance
across various data rates.
This device has an active-high driver enable and an active-low receiver enable. A standby current of less than
5 µA can be achieved by disabling both driver and receiver.
8.2 Functional Block Diagram
VCC
R
RE
A
DE
B
D
GND
Figure 21. Logic Diagram (Positive Logic)
8.3 Feature Description
Internal ESD protection circuits protect the transceiver bus terminals against ±10-kV Human Body Model (HBM)
electrostatic discharges and all other pins up to ±4 kV.
The SN65HVD1176 device provides internal biasing of the receiver input thresholds for open-circuit, bus-idle, or
short-circuit failsafe conditions, and a typical receiver hysteresis of 40 mV.
8.4 Device Functional Modes
Table 1. Driver Function Table (1)
(1)
16
INPUT
ENABLE
D
DE
A
OUTPUTS
B
H
H
H
L
L
H
L
H
X
L
Z
Z
X
OPEN
Z
Z
OPEN
H
H
L
H = high level, L = low level, X = don’t care,
Z = high impedance (off)
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Table 2. Receiver Function Table (1)
(1)
DIFFRENTIAL INPUT
VID = (VA – VB)
ENABLE
RE
OUTPUT
R
VID ≥ –0.02 V
L
H
–0.2 V < VID < –0.02 V
L
?
VID ≤ –0.2 V
L
L
X
H
Z
X
OPEN
Z
Open Circuit
L
H
Short Circuit
L
H
Idle (terminated) bus
L
H
H = high level, L = low level, X = don’t care,
Z = high impedance (off), ? = indeterminate
D and RE Inputs
DE Input
VCC
VCC
200 kΩ
500 Ω
500 Ω
Input
Input
200 kΩ
9V
9V
A Input
B Input
VCC
VCC
18 kΩ
16 V
18 kΩ
16 V
90 kΩ
90 kΩ
Input
Input
16 V
18 kΩ
16 V
18 kΩ
A and B Outputs
R Output
VCC
VCC
16 V
5Ω
Output
Output
9V
16 V
Figure 22. Equivalent Input and Output Schematic Diagrams
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The SN65HVD1176 device is a half-duplex RS-485 transceiver commonly used for asynchronous data
transmissions. The driver- and receiver-enable pins allow for the configuration of different operating modes.
R
R
R
R
R
R
RE
A
RE
A
RE
A
DE
B
DE
B
DE
B
D
D
D
D
D
D
Figure 23. Half-Duplex Transceiver Configurations
Using independent enable lines provides the most flexible control because it allows the driver and the receiver to
be turned on and off individually. While this configuration requires two control lines, it allows for selective listening
into the bus traffic, whether the driver is transmitting data or not.
Combining the enable signals simplifies the interface to the controller by forming a single direction-control signal.
In this configuration, the transceiver operates as a driver when the direction-control line is high and as a receiver
when the direction-control line is low.
Additionally, only one line is required when connecting the receiver-enable input to ground and controlling only
the driver-enable input. In this configuration, a node receives the data from the bus and the data it sends; the
node can also verify that the correct data has been transmitted.
9.2 Typical Application
An RS-485 bus consists of multiple transceivers connecting in parallel to a bus cable. To eliminate line
reflections, each cable end is terminated with a termination resistor RT) whose value matches the characteristic
impedance (Z0) of the cable. This method, known as parallel termination, allows for higher data rates over longer
cable length.
R
R
RE
B
DE
D
R
A
R
A
RT
RT
D
A
R
B
A
D
R RE DE D
R
RE
B
DE
D
B
D
D
R RE DE D
Figure 24. Typical RS-485 Network With Half-Duplex Transceivers
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Typical Application (continued)
The PROFIBUS standard extends RS-485 by specifying the value of the termination resistor, the characteristic
impedance of the bus cable, and the value of fail-safe termination at both ends of the bus.
PROFIBUS requires that 220-Ω termination resistors be placed at both ends of the bus, the bus cable impedance
be between 135 Ω and 165 Ω, and that 390-Ω fail-safe resistors be placed on both the A and B lines at both
ends of the bus.
5V
5V
R
R
B
DE
D
D
R
390Ω
390Ω
A
RE
R
A
220Ω
220Ω
390Ω
390Ω
A
B
A
R
B
RE
B
DE
D
D
R
D
D
R RE DE D
R RE DE D
Figure 25. Typical PROFIBUS network
9.2.1 Design Requirements
RS-485 is a robust electrical standard suitable for long-distance networking that may be used in a wide range of
applications with varying requirements, such as distance, data rate, and number of nodes.
9.2.1.1 Data Rate and Bus Length
There is an inverse relationship between data rate and bus length, that is, the higher the data rate, the shorter
the cable length. Conversely, the lower the data rate, the longer the cable may be without introducing data
errors. While most RS-485 systems use data rates between 10 kbps and 100 kbps, some applications require
data rates up to 250 kbps at distances of 4000 feet and longer. Longer distances are possible by allowing for
small signal jitter of up to 5 or 10%.
10000
Cable Length (ft)
5%, 10%, and 20% Jitter
1000
Conservative
Characteristics
100
10
100
1k
10k
100k
1M
10M
100M
Data Rate (bps)
Figure 26. Cable Length vs Data Rate Characteristic
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Typical Application (continued)
9.2.1.2 Stub Length
When connecting a node to the bus, the distance between the transceiver inputs and the cable trunk, known as
the stub, should be as short as possible. Stubs present a nonterminated piece of bus line which can introduce
reflections as the length of the stub increases. As a general guideline, the electrical length, or round-trip delay, of
a stub should be less than one-tenth of the rise time of the driver, thus giving a maximum physical stub length as
shown in Equation 1.
Lstub ≤ 0.1 × tr × v × c
(1)
where:
tr is the 10/90 rise time of the driver
c is the speed of light (3 × 108 m/s)
v is the signal velocity of the cable or trace as a factor of c
Per Equation 1, the maximum recommended stub length for the minimum driver output rise time of the
SN65HVD1176 device for a signal velocity of 78% is 0.05 meters (0.16 feet).
9.2.1.3 Bus Loading
The RS-485 standard specifies that a compliant driver must be able to driver 32 unit loads (UL), where 1 unit
load represents a load impedance of approximately 12 kΩ. Because the SN65HVD1176 device is a 1/5 UL
transceiver, it is possible to connect up to 160 receivers to the bus.
9.2.1.4 Receiver Failsafe
The differential receiver of the SN65HVD1176 device is failsafe to invalid bus states caused by the following:
• Open bus conditions, such as a disconnected connector
• Shorted bus conditions, such as cable damage shorting the twisted-pair together
• Idle bus conditions that occur when no driver on the bus is actively driving
In any of these cases, the differential receiver will output a failsafe logic-high state so that the output of the
receiver is not indeterminate.
Receiver failsafe is accomplished by offsetting the receiver thresholds such that the input-indeterminate range
does not include zero volts differential.
To comply with the RS-422 and RS-485 standards, the receiver output must output a high when the differential
input VID is more positive than +200 mV, and must output a low when VID is more negative than –200 mV. The
receiver parameters that determine the fail-safe performance are VIT(+) and VIT(–).
As shown in Electrical Characteristics, differential signals more negative than –200 mV will always cause a low
receiver output, and differential signals more positive than –20 mV will always cause a high receiver output.
Thus, when the differential input signal is close to zero, it is still above the maximum VIT(+) threshold of –20 mV,
and the receiver output will be high.
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Typical Application (continued)
9.2.2 Detailed Design Procedure
To protect bus nodes against high-energy transients, the implementation of external transient protection devices
is necessary.
5V
100nF
100nF
10k
VCC
R1
R
RxD
RE
MCU/
UART
DE
TVS
A
HVD1176
DIR
B
D
TxD
R2
10k
GND
Figure 27. Transient Protection Against ESD, EFT, and Surge Transients
Figure 27 shows a protection circuit against 10-kV ESD (IEC 61000-4-2), 4-kV EFT (IEC 61000-4-4), and 1-kV
surge (IEC 61000-4-5) transients. Table 3 lists the associated Bill of Materials.
Table 3. Bill of Materials
Device
Function
Order Number
Manufacturer
XCVR
5-V, 40-Mbps ProfiBus Transceiver
SN65HVD1176
R1, R2
10-Ω, Pulse-Proof Thick-Film Resistor
CRCW0603010RJNEAHP
Vishay
Bidirectional 400-W Transient Suppressor
CDSOT23-SM712
Bourns
TVS
TI
9.2.3 Application Curve
Figure 28 demonstrates operation of the SN65HVD1179 at a signaling rate of 40 Mbps.
Figure 28. Differential Output of SN65HVD1176 Operation at 40 Mbps
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10 Power Supply Recommendations
To ensure reliable operation at all data rates and supply voltages, each supply must be buffered with a 100-nF
ceramic capacitor located as close to the supply pins as possible. The TPS76350 device is a linear voltage
regulator suitable for the 5-V supply.
11 Layout
11.1 Layout Guidelines
On-chip IEC-ESD protection is sufficient for laboratory and portable equipment but insufficient for EFT and surge
transients occurring in industrial environments. Therefore, robust and reliable bus-node design requires the use
of external transient protection devices.
Because ESD and EFT transients have a wide frequency bandwidth from approximately 3 MHz to 3 GHz, high
frequency layout techniques must be applied during PCB design.
1. Place the protection circuitry close to the bus connector to prevent noise transients from entering the board.
2. Use VCC and ground planes to provide low-inductance.
3. Design the protection components into the direction of the signal path. Do not force the transient currents to
divert from the signal path to reach the protection device.
4. Apply 100-nF to 220-nF bypass capacitors as close as possible to the VCC pins of the transceiver, the
UART, or the controller ICs on the board.
5. Use at least two vias for VCC and ground connections of bypass capacitors and protection devices to
minimize effective via inductance.
6. Use 1-kΩ to 10-kΩ pullup and pulldown resistors for enable lines to limit noise currents in these lines during
transient events.
7. Insert series pulse-proof resistors into the A and B bus lines if the TVS clamping voltage is higher than the
specified maximum voltage of the transceiver bus terminals. These resistors limit the residual clamping
current into the transceiver and prevent it from latching up.
8. While pure TVS protection is sufficient for surge transients up to 1 kV, higher transients require metal-oxide
varistors (MOVs) that reduce the transients to a few hundred volts of clamping voltage and transient blocking
units (TBUs) that limit transient current to less than 1 mA.
11.2 Layout Example
5
Via to ground
Via to VCC
4
6 R
1
R
MCU
R
7
5
R
6 R
SN65HVD1176
JMP
C
R
TVS
5
Figure 29. SNx5HVD08 Layout Example
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12 Device and Documentation Support
12.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
12.2 Documentation Support
For related documentation see the following: ISO1176 ISOLATED RS-485 PROFIBUS TRANSCEIVER
(SLLS897)
12.3 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 4. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
SN65HVD1176
Click here
Click here
Click here
Click here
Click here
SN75HVD1176
Click here
Click here
Click here
Click here
Click here
12.4 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.5 Trademarks
E2E is a trademark of Texas Instruments.
PROFIBUS is a registered trademark of PROFIBUS Nutzerorganisation e.V..
All other trademarks are the property of their respective owners.
12.6 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.7 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
SN65HVD1176D
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
VP1176
Samples
SN65HVD1176DG4
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
VP1176
Samples
SN65HVD1176DR
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
VP1176
Samples
SN65HVD1176DRG4
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
VP1176
Samples
SN75HVD1176D
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
VN1176
Samples
SN75HVD1176DR
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
VN1176
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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