SN65HVD179
www.ti.com .................................................................................................................................................... SLLS668C – FEBRUARY 2006 – REVISED JULY 2008
5-V FULL-DUPLEX RS-485/RS-422 DRIVER AND BALANCED RECEIVER
FEATURES
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DESCRIPTION
Designed for INTERBUS Applications
Balanced Receiver Thresholds
1/2 Unit-Load (up to 64 nodes on the bus)
Bus-Pin ESD Protection 15 kV HBM
Bus-Fault Protection of –7V to 12V
Thermal Shutdown Protection
Power-Up/Down Glitch-free Bus Inputs and
Outputs
Designed for RS-422 and RS-485 Networks
The SN65HVD179 is a differential line driver and
differential-input line receiver that operates with a 5-V
power supply. Each driver and receiver has separate
input and output pins for full-duplex bus
communication designs. They are designed for
balanced transmission lines and interoperation with
ANSI TIA/EIA-485A, TIA/EIA-422-B, ITU-T v.11, and
ISO 8482:1993 standard-compliant devices.
APPLICATIONS
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Digital Motor Control
Utility Meters
Chassis-to-Chassis Interconnections
Electronic Security Stations
Industrial, Process, and Building Automation
Point-of-Sale (POS) Terminals and Networks
DTE/DCE Interfaces
The differential bus driver and receiver are monolithic,
integrated
circuits
designed
for
full-duplex
bi-directional data communication on multipoint
bus-transmission lines at signaling rates (1) up to 25
Mbps. The SN65HVD179 is fully enabled with no
external enabling pins.
The 1/2 unit load receiver has a high receiver input
resistance. This results in lower bus leakage currents
over the common-mode voltage range, and reduces
the total amount of current that a 485 driver is forced
to source or sink when transmitting.
The balanced differential receiver input threshold
makes the SN65HVD179 fully compatible with
fieldbus requirements that define an external failsafe
structure.
(1)
The signaling rate of a line is the number of voltage
transitions that are made per second expressed in the units
bps (bits per second).
BALANCED RECEIVER INPUT THRESHOLDS
SN65HVD179
D PACKAGE (TOP VIEW)
VIT –(T Y P )
VIT+ (T Y P )
Recevier Output High
VCC
R
D
GND
8
2
7
3
6
4
5
A
B
Z
Y
0.20 V
0.15 V
0.10 V
0.05 V
0V
VID
-0.05 V
-0.10 V
-0.15 V
-0.20 V
Receiver Output Low
1
D
R
3
2
5
6
8
7
Y
Z
A
B
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006–2008, Texas Instruments Incorporated
SN65HVD179
SLLS668C – FEBRUARY 2006 – REVISED JULY 2008 .................................................................................................................................................... www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
AVAILABLE OPTIONS
SIGNALING RATE
UNIT LOADS
BASE PART NUMBER
SOIC MARKING
25 Mbps
1/2
SN65HVD179
SN65HVD179
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted) (1)
(2)
UNIT
VCC
Supply voltage range
–0.3 V to 6 V
VA, VB, VY, VZ
Voltage range at any bus terminal (A, B, Y, Z)
–9 V to 14 V
VTRANS
Voltage input, transient pulse through 100 Ω. See Figure 8 (A, B, Y, Z)
VI
Voltage input range (D, DE, RE)
PCONT
Continuous total power dissipation
IO
Output current (receiver output only, R)
(1)
(2)
(3)
(4)
(3)
–50 to 50 V
–0.5 V to 7 V
Internally limited (4)
11 mA
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values, except differential I/O bus voltages, are with respect to network ground terminal.
This tests survivability only and the output state of the receiver is not specified.
The Thermal shutdown of this device internally limits the continuous total power dissipation. Thermal shutdown typically occurs when the
junction temperature reaches 165°C.
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
VCC
Supply voltage
VI or VIC
Voltage at any bus terminal (separately or common mode)
1/tUI
Signaling rate
RL
Differential load resistance
VIH
High-level input voltage
D
2
VCC
VIL
Low-level input voltage
D
0
0.8
VID
Differential input voltage
–12
12
IOH
High-level output current
IOL
Low-level output current
TJ
Junction temperature (2)
(1)
(2)
4.5
5.5
–7 (1)
12
25
54
Driver
V
Mbps
Ω
60
–60
Receiver
UNIT
V
mA
–8
Driver
60
Receiver
8
–40
150
mA
°C
The algebraic convention, in which the least positive (most negative) limit is designated as minimum is used in this data sheet.
See thermal characteristics table for information regarding this specification.
ELECTROSTATIC DISCHARGE PROTECTION
PARAMETER
Human body model
Bus terminals and GND
Human body model (2)
Charged-device-model
(1)
(2)
(3)
2
TEST CONDITIONS
(3)
MIN
TYP (1)
MAX
UNIT
±16
All pins
±4
All pins
±1
kV
All typical values at 25°C and with a 5-V supply.
Tested in accordance with JEDEC Standard 22, Test Method A114-A.
Tested in accordance with JEDEC Standard 22, Test Method C101.
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SN65HVD179
www.ti.com .................................................................................................................................................... SLLS668C – FEBRUARY 2006 – REVISED JULY 2008
DRIVER ELECTRICAL CHARACTERISTICS
over recommended operating conditions unless otherwise noted
PARAMETER
VI(K)
MIN TYP (1)
TEST CONDITIONS
Input clamp voltage
II = –18 mA
IO = 0
|VOD(SS)|
Steady-state differential output voltage
4
1.7
2.6
RL = 100 Ω, See Figure 1 (RS-422)
2.4
3.2
Vtest = –7 V to 12 V, See Figure 2
1.6
Change in magnitude of steady-state
differential output voltage between states
RL = 54 Ω, See Figure 1 and Figure 2
VOD(RING)
Differential Output Voltage overshoot and
undershoot
RL = 54 Ω, CL = 50 pF, See Figure 5 and
Figure 3 for definition
VOC(PP)
Peak-to-peak common-mode output voltage
VOC(SS)
Steady-state common-mode output voltage
ΔVOC(SS)
Change in steady-state common-mode
output voltage
High-impedance state output current
IZ(S) or
IY(S)
Short Circuit output current (3)
II
Input current
C(OD)
Differential output capacitance
(1)
(2)
(3)
UNIT
VCC
RL = 54 Ω, See Figure 1 (RS-485)
Δ|VOD(SS)|
IZ(Z) or
IY(Z)
MAX
–1.5
–0.2
V
0.2
10% (2)
0.5
See Figure 4
2.2
3.3
–0.1
0.1
VCC = 0 V, VZ or VY = 12 V,
Other input at 0 V
90
µA
VCC = 0 V, VZ or VY = –7 V,
Other input at 0 V
VZ or VY = –7 V
VZ or VY = 12 V
V
–10
Other input
at 0 V
–250
250
–250
250
VI = 0, VI = 2
0
100
16
mA
µA
pF
All typical values are at 25°C and with a 5-V supply.
10% of the peak-to-peak Differential Output voltage swing, per TIA/EIA-485.
Under some conditions of short-circuit to negative voltages, output currents exceeding the ANSI TIA/EIA-485-A maximum current of
250 mA may occur. Continuous exposure may affect device reliability.
DRIVER SWITCHING CHARACTERISTICS
over recommended operating conditions unless otherwise noted
PARAMETER
TEST CONDITIONS
tPLH
Propagation delay time, low-to-high-level output
tPHL
Propagation delay time, high-to-low-level output
tr
Differential output signal rise time
tf
Differential output signal fall time
tsk(p)
tsk(pp)
(1)
(2)
TYP (1)
MAX
4
8
12
ns
3
6
12
ns
UNIT
RL = 54 Ω, CL = 50 pF,
See Figure 5
Pulse skew (|tPHL - tPLH|)
(2)
MIN
Part-to-part skew
1.4
ns
1
ns
All typical values are at 25°C and with a 5-V supply.
tsk(pp) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices
operate with the same supply voltages, at the same temperature, and have identical packages and test circuits.
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SN65HVD179
SLLS668C – FEBRUARY 2006 – REVISED JULY 2008 .................................................................................................................................................... www.ti.com
RECEIVER ELECTRICAL CHARACTERISTICS
over recommended operating conditions unless otherwise noted
PARAMETER
MIN TYP (1)
TEST CONDITIONS
VIT+
Positive-going differential input
threshold voltage
IO = –8 mA
VIT–
Negative-going differential input
threshold voltage
IO = 8 mA
Vhys
Hysteresis voltage (VIT+ – VIT–)
VO
Output voltage
V
–0.2
50
mV
4.0
VID = –200 mV, IO = 8 mA, See Figure 6
Bus input current
ICC
Supply current
UNIT
0.2
VID = 200 mV, IO = –8 mA, See Figure 6
IA or IB
VA or VB = 12 V
0.20
0.3
VA or VB = 12 V, VCC = 0 V
0.24
0.4
VA or VB = –7 V
V
0.3
Other input
at 0 V
VA or VB = –7 V, VCC = 0 V
(1)
MAX
–0.35
–0.19
–0.25
–0.14
D at 0 V or VCC and No Load
mA
2.7
mA
All typical values are at 25°C and with a 5-V supply.
RECEIVER SWITCHING CHARACTERISTICS
over recommended operating conditions unless otherwise noted
PARAMETER
TEST CONDITIONS
MIN TYP (1)
MAX
24
40
UNIT
tPLH
Propagation delay time, low-to-high-level output
tPHL
Propagation delay time, high-to-low-level output
tsk(p)
Pulse skew (|tPHL - tPLH|)
tsk(pp) (2)
Part-to-part skew
5
tr
Output signal rise time
2
4
ns
tf
Output signal fall time
2
4
ns
(1)
(2)
4
VI = 0 V to 3 V, CL = 15 pF,
See Figure 7
ns
5
CL = 15 pF, See Figure 7
ns
All typical values are at 25°C and with a 5-V supply
tsk(pp) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices
operate with the same supply voltages, at the same temperature, and have identical packages and test circuits.
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Product Folder Link(s): SN65HVD179
SN65HVD179
www.ti.com .................................................................................................................................................... SLLS668C – FEBRUARY 2006 – REVISED JULY 2008
THERMAL CHARACTERISTICS
over operating free-air temperature range unless otherwise noted (1)
PARAMETER
TEST CONDITIONS
MIN
TYP MAX
Low-K board (3), No airflow
230.8
High-K board (4), No airflow
135.1
θJA
Junction-to-ambient thermal resistance (2)
θJB
Junction-to-board thermal resistance
High-K board
44.4
θJC
Junction-to-case thermal resistance
No board
43.5
PD
Device power dissipation
RL= 60 Ω, CL = 50 pF, Input to D a 50% duty
cycle square wave at indicated signaling rate
TA
Ambient air temperature
TJSD
Thermal shutdown junction temperature
(1)
(2)
(3)
(4)
UNIT
°C/W
°C/W
°C/W
420
Low-K board, No airflow
–40
55
High-K board, No airflow
–40
85
165
mW
°C
°C
See Application Information section for an explanation of these parameters.
The intent of θJA specification is solely for a thermal performance comparison of one package to another in a standardized environment.
This methodology is not meant to and will not predict the performance of a package in an application-specific environment.
In accordance with the Low-K thermal metric definitions of EIA/JESD51-3.
In accordance with the High-K thermal metric definitions of EIA/JESD51-7.
PARAMETER MEASUREMENT INFORMATION
II
Y
375 Ω ±1%
IY
VOD
0 or 3 V
Z
RL
Y
D
VOD
0 or 3 V
IZ
60 Ω ±1%
+
_ −7 V < V(test) < 12 V
Z
VI
VZ
VY
375 Ω ±1%
Figure 1. Driver VOD Test Circuit: Voltage and Current
Definitions
Figure 2. Driver VOD With Common-Mode Loading Test
Circuit
VOD(RING) is measured at four points on the output waveform, corresponding to overshoot and undershoot from
theVOD(H) and VOD(L) steady state values.
VOD(SS)
VOD(RING)
0 V Differential
VOD(RING)
-VOD(SS)
Figure 3. VOD(RING) Waveform and Definitions
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SN65HVD179
SLLS668C – FEBRUARY 2006 – REVISED JULY 2008 .................................................................................................................................................... www.ti.com
PARAMETER MEASUREMENT INFORMATION (continued)
27 Ω ± 1%
D
Input
Y
Y
VY
Z
VZ
VOC(PP)
Z
27 Ω ± 1%
CL = 50 pF ±20%
VOC
∆VOC(SS)
VOC
CL Includes Fixture and
Instrumentation Capacitance
Input: PRR = 500 kHz, 50% Duty Cycle,t r
