SN65HVD252
SN65HVD253
www.ti.com
SLLSE37 – JUNE 2010
DeviceNet™ CAN Transceivers
Check for Samples: SN65HVD252, SN65HVD253
FEATURES
APPLICATIONS
•
•
•
•
•
•
•
•
•
1
2
•
•
•
•
DeviceNet Compliant Supporting 64 DeviceNet
Nodes
Loopback Function (HVD253)
Bus-Fault Protection of –36 V to 40 V
Power-Up/Down Glitch-Free Bus I/O
3.3-V Compatible Receiver Output
DeviceNet Networks (Vendor ID # 806)
Industrial Automation
HVAC Networks
Security Systems
Telecom Base Station Status and Control
CANopen Data Bus
SDS Data Bus
CAN Kingdom Data Bus
DESCRIPTION
The SN65HVD252 and SN65HVD253 CAN transceivers meet or exceed the specifications of DeviceNet and are
compatible to the ISO 11898-2:2003 standard for use in applications employing a controller area network (CAN).
This device provides differential transmit and receive capability at signaling rates up to 1 megabit per second
(Mbps).
Designed for operation in harsh industrial environments, these devices feature bus-pin voltage protection from
–36 V to 40 V, driver output current limiting, and overtemperature driver shutdown.
Pin 8 provides for two different modes of operation: normal and silent mode. The normal mode of operation is
selected by connecting S (pin 8) to ground. If a high logic level is applied to the S pin, the device enters a
listen-only silent mode during which the driver is inactive while the receiver remains fully functional.
The Vref pin 5 of the SN65HVD252 is a VCC/2 voltage reference for systems which use split termination.
The AB pin of the SN65HVD253 implements a listen-only loopback feature which allows the local node controller
to synchronize its baud rate with that of the CAN bus. In loopback mode, the driver differential outputs are placed
in high-impedance state while the receiver bus inputs remain active. For more information on the loopback mode,
see the Application Information section.
The SN65HVD252 and SN65HVD253 are characterized for operation from –40°C to 85°C.
SPACER
TXD
GND
VCC
RXD
1
8
2
7
3
4
6
VCC / 2
SN65HVD252
5
S
TXD
CANH
GND
CANL
VCC
VREF
RXD
1
8
2
7
3
6
4
5
S
CANH
CANL
AB
SN65HVD253
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
DeviceNet is a trademark of Open DeviceNet Vendor Association .
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2010, Texas Instruments Incorporated
SN65HVD252
SN65HVD253
SLLSE37 – JUNE 2010
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
HVD252
HVD253
TXD
1
8
S
TXD
1
8
S
GND
2
7
CANH
GND
2
7
CANH
VCC
3
6
CANL
VCC
3
6
CANL
RXD
4
5
VREF
RXD
4
5
AB
Table 1. DRIVER (SN65HVD252)
INPUTS
OUTPUTS
TXD
S
L
CAN_H
L or OPEN
H or OPEN
X
H
BUS STATE
CAN_L
H
L
Dominant
Z
Z
Recessive
Z
Z
Recessive
Table 2. RECEIVER (SN65HVD252)
INPUTS
OUTPUT
BUS STATE
VID = VCANH – VCANL
RXD
Dominant
VID ≥ 0.9 V
L
?
0.5 V < VID < 0.9 V
?
Recessive
VID < 0.5 V
H
OPEN
VID ≈ 0 V
H
Table 3. DRIVER (SN65HVD253)
INPUTS
TXD
OUTPUTS
AB
S
X
X
H
L
L or open
H or open
X
X
H
CAN_H
CAN_L
L or OPEN
BUS STATE
Z
Z
H
L
Recessive
Dominant
Z
Z
Recessive
Z
Z
Recessive
Table 4. RECEIVER (SN65HVD253)
INPUTS
AB
L or open
H
X
2
OUTPUT
BUS STATE
VID = VCANH – VCANL
Dominant
VID ≥ 0.9 V
?
0.5 V < VID < 0.9 V
Recessive
VID ≤ 0.5 V
Open
VID ≈ 0 V
Dominant
VID ≥ 0.9 V
?
0.5 V < VID < 0.9 V
Recessive
X
TXD
RXD
L
X
?
H
H
X
L
L
L
H
?
VID ≤ 0.5 V or open
H
H
X
L
L
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SLLSE37 – JUNE 2010
ABSOLUTE MAXIMUM RATINGS (1)
Supply voltage
(2)
, VCC
Voltage range at CANH, CANL, VREF
Voltage at CANH, CANL, transient pulse per ISO 7637, pulse 1, 2, 3a, 3b, 5, 6, 7
Voltage input range at logic inputs, VI (TXD, AB, RXD, S)
VALUE
UNIT
–0.3 to 6
V
–36 to 40
V
–200 to 200
V
–0.5 to 6
V
ESD, human-body model (HBM) per JEDEC Standard 22, test method A114, CANH, CANL vs GND
±12
kV
ESD, human-body model (HBM) per JEDEC Standard 22, test method A114, all pins
±5
kV
ESD, charged-device model (CDM) per JEDEC Standard 22, test method C101, all pins
±2
kV
ESD, machine model (MM) per JEDEC Standard 22, test method A115 CANH, CANL vs GND
±200
V
Receiver output current, IO
±20
mA
Junction temperature, TJ
170
°C
(1)
(2)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values, except differential I/O bus voltages, are with respect to ground terminal.
RECOMMENDED OPERATING CONDITIONS
VCC
MIN
MAX
UNIT
Supply voltage
4.75
5.25
V
Voltage at any bus terminal (separately or common mode)
–5 (1)
10
V
2
5.5
V
0
0.8
V
–7
7
V
–70
70
–2
2
–40
85
VIH
High-level input voltage
VIL
Low-level input voltage
VID
Differential input voltage
IOH
Output current
TA
Operating ambient free-air
temperature
(1)
TXD, S, AB inputs
Driver
Receiver
See Thermal Information Table
mA
°C
The algebraic convention, in which the least positive (most negative) limit is designated as minimum is used in this data sheet.
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SN65HVD252
SN65HVD253
SLLSE37 – JUNE 2010
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THERMAL INFORMATION
HVD252/53
THERMAL METRIC
Junction-to-ambient thermal resistance (1)
qJA
124.5
(2)
qJC(top)
Junction-to-case(top) thermal resistance
qJB
Junction-to-board thermal resistance
yJT
Junction-to-top characterization parameter
yJB
Junction-to-board characterization parameter
qJC(bottom)
PD
(1)
(2)
(3)
(4)
(5)
(6)
55.9
(3)
50.2
(4)
Junction-to-case(bottom) thermal resistance
Device power dissipation
UNITS
8 PINS SOIC
°C/W
4.9
(5)
46
(6)
n/a
VCC = 5 V, TJ = 27°C, RL = 60Ω,
RS at 0 V, Input to D a 500-kHz
50% duty cycle square wave
189.1
mW
VCC = 5.25 V, TJ = 150°C, RL = 50Ω,
RS at 0 V, Input to D a 500-kHz
50% duty cycle square wave
274.8
mW
The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific
JEDEC-standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
The junction-to-top characterization parameter, yJT, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining qJA, using a procedure described in JESD51-2a (sections 6 and 7).
The junction-to-board characterization parameter, yJB, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining qJA , using a procedure described in JESD51-2a (sections 6 and 7).
The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific
JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
DRIVER ELECTRICAL CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER
CANH
VO(D)
Bus output voltage
(dominant)
VO(R)
Bus output voltage (recessive)
VOD(D)
MIN TYP (1)
TEST CONDITIONS
CANL
Differential output voltage
(dominant)
See Figure 1, TXD = 0 V, S = 0 V, AB = 0 V (HVD253),
RCM = open, CL = open, RL = 60 Ω
TXD = 3 V, S = 0 V
No Load
MAX
2.75
3.5
4.5
0.5
1.5
2.25
2
2.5
3
See Figure 1, TXD = 0 V, S = 0 V, RCM = open,
CL = open, 45 Ω ≤ RL ≤ 60 Ω
1.5
2.4
3.4
See Figure 1, TXD = 0 V, S = 0 V, RL = 60 Ω,
RCM = 330 Ω, CL = open, –5 V < VCM < 10 V
1.2
2.6
3.3
V
V
V
RL = 60 Ω
–12
12
–100
50
VOD(R)
Differential output voltage
(recessive)
See Figure 1, TXD = 3 V, S = 0 V,
RCM = open, CL = 100 pF
VSYM
Output symmetry (dominant or
recessive)
See Figure 1, S = 0 V, AB = 0 V (HVD253), RCM = open,
CL = open, RL = 60 Ω, VSYM = VCC – VCANH – VCANL
–400
IOS(ss)
Short-circuit steady-state output
current
–5 V < VCANH < 10 V, CANL open
–350
2.5
–5 V < VCANL < 10 V, CANH open
–2.5
350
(1)
UNIT
No load
0
400
mV
mV
mA
All typical values are at 25°C with VCC = 5 V.
DRIVER SWITCHING CHARACTERISTICS
PARAMETER
TEST CONDITIONS
MIN
TYP MAX
tpHR
Propagation delay time, high input to recessive output
50
70
tpLD
Propagation delay time, low input to dominant output
40
70
tr
Differential output signal rise time, 10% to 90%
15
30
tf
Differential output signal fall time, 90% to 10%
17
30
ten
4
Enable time from silent mode to dominant
See Figure 1, S = 0 V, RL = 60 Ω,
CL = 100 pF, RCM = open
RL = 60 Ω, CL = 15 pF,
CLD = 100 pF
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200
UNIT
ns
ns
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SN65HVD253
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SLLSE37 – JUNE 2010
RECEIVER ELECTRICAL CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER
VIT+
Positive-going input threshold voltage
VIT–
Negative-going input threshold voltage
Vhys
Hysteresis voltage (VIT+ – VIT–)
VOH
High-level output voltage
VOL
Low-level output voltage
IBL(off)
Bus leakage current, with power off
800
–5 V < VCM < 10 V
650
140
160
IO = –2 mA
2.4
3.3
3.7
IO = –20 µA
2.7
3.3
3.7
0.1
0.2
IO = 2 mA
mV
Vcc at 0 V
–600
600
TXD or S pin at
VCC
–600
600
IBL
CI
Input capacitance to ground, (CANH or CANL)
VI = 0.4 sin (4E6pt) + 2.5 V
CID
Differential input capacitance
VI = 0.4 sin (4E6pt)
RID
Differential input resistance
TXD at 3 V, S at 0 V
RIN
Input resistance, (CANH or CANL)
RI(M)
Input resistance matching
[1 – (RIN (CANH) / RIN (CANL))] × 100%
20
V
V
µA
pF
7
VCANH = VCANL
UNIT
900
500
CANH or CANL,
Bus leakage current, in silent mode or recessive state Other bus pin at 0 V
(1)
MIN TYP (1) MAX
TEST CONDITIONS
pF
30
60
80
kΩ
15
30
40
kΩ
–3%
0%
3%
All typical values are at 25°C with VCC = 5 V.
RECEIVER SWITCHING CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
tpRH
Propagation delay time, recessive input to high output
tpDL
Propagation delay time, dominant input to low output
tr
Output signal rise time, 10% to 90%
tf
Output signal fall time, 90% to 10%
MIN
See Figure 2, CL = 15 pF,
AB = 0 V or VCC (HVD253)
TYP MAX
55
80
50
80
20
UNIT
ns
20
DRIVER-TO-RECEIVER LOOP-SWITCHING CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER
tloop1
tloop2
tAB1
Total loop delay, driver input
to receiver output
TEST CONDITIONS
Recessive to
dominant
Dominant to recessive
Loopback delay, driver input to receiver output
(HVD253 only)
MIN
See Figure 4, S at 0 V, AB at 0 V,
RL = 60 Ω, CLD = 100 pF, CL = 15 pF
See Figure 5, S at 0 V, AB = VCC,
RL = 60 Ω, CLD = 100 pF, CL = 15 pF
TYP MAX
40
90
140
40
105
140
20
40
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UNIT
ns
ns
5
SN65HVD252
SN65HVD253
SLLSE37 – JUNE 2010
www.ti.com
LOGIC INPUT PIN CHARACTERISTICS (D, S, AND AB INPUTS)
over recommended operating conditions (unless otherwise noted)
MAX
UNIT
II
Input current
PARAMETER
0 V < VIN < VCC
TEST CONDITIONS
–100
MIN
TYP
100
µA
IOP(off)
Power-off leakage current
VCC at 0 V, 0 < VIN < VCC(MAX)
–100
100
µA
UNIT
VREF PIN CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
0.4 VCC
0.5VCC
0.6VCC
–50 µA < IO < 50 µA
0.43 VCC
0.5VCC
0.57 VCC
–5 µA < IO < 5 µA
0.45 VCC
0.5VCC
0.55 VCC
–100 µA < IO < 100 µA
VO
Output voltage
V
SUPPLY CURRENT
over recommended operating conditions (unless otherwise noted)
PARAMETER
HVD252
ICC
Supply current
HVD253
All
6
TEST CONDITIONS
TYP
MAX
S at VCC, TXD at VCC
13
17
S at VCC, AB at 0 V or VCC
13
17
Dominant
TXD at 0 V, 50-Ω load, S at 0 V
60
80
Recessive
TXD at VCC, no load, S at 0 V
13
17
Silent
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MIN
UNIT
mA
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SLLSE37 – JUNE 2010
PARAMETER MEASUREMENT INFORMATION
RCM
CANH
TXD
VCM
CL VOD
RL
CANL
RCM
3V
50%
TXD
50%
0V
tpHR
tpLD
0.9V
VOD
90%
10%
tr
0.5V
tf
Figure 1. Driver Test Circuit
CANH
RXD
VID
VO
CL
CANL
1 .5 V
0 .9 V
VID
0 .5 V
0V
tpDL
tpRH
VOH
90%
50%
10%
VO(RXD)
tr
VOL
tf
Figure 2. Receiver Test Circuit
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PARAMETER MEASUREMENT INFORMATION (continued)
CANH
3V
TXD
0V
CL
RL
S
50%
CANL
S
0V
VI
ten
RXD
VO
VOH
CL
RXD
50%
VOL
Figure 3. Enable Test Circuit
CANH
3V
TXD
VI
CLD
RL
50%
TXD
0V
S
CANL
0V
tloop1
RXD
VO
tloop2
VOH
CL
RXD
50%
VOL
Figure 4. Loop Time Measurements
8
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PARAMETER MEASUREMENT INFORMATION (continued)
CANH
VI
3V
TXD
RL
CLD
TXD
VCC
AB
0V
tAB(LH)
tAB(HL)
RXD
VO
50%
CANL
VOH
CL
RXD
50%
VOL
Figure 5. Loopback Timing Measurement
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PARAMETER MEASUREMENT INFORMATION (continued)
EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS
TXD Input
RXD Output
3.3 V
VCC
15 ?
4.3 k ?
Output
Input
6V
6V
CANH Input
CANL Input
VCC
VCC
10 k ?
Input
10 k ?
20 k ?
Input
40
V
10 k?
40 V
20 k ?
10 k ?
CANH and CANL Outputs
S and AB Inputs
VCC
VCC
CANH
4.3 k ?
Input
6V
CANL
140 k?
40 V
40 V
VREF Output
VCC
3 k?
Output
3 k?
10
40 V
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APPLICATION INFORMATION
USING THE SILENT MODE
The silent mode is selected by setting a logic high on pin 8 (S). In silent mode, the driver function of the
transceiver is disabled, whereas the receiver function remains active. This silent mode may be used to
implement babbling idiot protection, to ensure that the driver does not disrupt the entire network in case of a local
fault. The silent mode may also be used in redundant systems to select or de-select the redundant transceiver
until needed.
USING THE AUTOBAUD FEATURE OF THE SN65HVD253
The autobaud feature of the HVD253 is selected by placing a logic high on pin 5 (AB). In autobaud mode, the
normal bus-transmit function of the transceiver is disabled, whereas the bus-receive function and all of the other
normal operating functions of the device remain active. An internal loopback emulates the connection between
the driver outputs and the receiver inputs, allowing the receiver to respond to locally-generated dominant bits as
well as dominant bits from other nodes.
With the autobaud function engaged, normal bus activity, including activity from the local controller, can be
monitored by the local node as received data. However, if an error frame is generated by the local CAN
controller, it is not transmitted to the bus. Only the local microprocessor can detect the error frame.
Autobaud detection is well suited to applications that have a known selection of baud rates. For example,
DeviceNet (a common industrial protocol) has optional signaling rates of 125 kbps, 250 kbps, or 500 kbps. Once
a logic high has been applied to pin 5 (AB) of the HVD253, the local controller may assume a baud rate such as
125 kbps and then wait for a message to be transmitted by another node on the bus. If the wrong local signaling
rate has been selected, an error message is generated by the local CAN controller. However, because the
bus-transmit function of the transceiver has been disabled, no other nodes receive the error message from the
local controller.
This procedure makes use of the CAN controller status-register indications of message received and error
warning status to signal if the current signaling rate is correct or not. The warning status indicates that the CAN
controller error counters have been incremented. A message-received status indicates that a good message has
been received.
If an error is generated, the local CAN controller may assume another signaling rate and wait to receive another
message. When an error-free message has been received, the correct baud rate has been selected. A logic low
may now be applied to pin 5 (AB) of the HVD253, returning the bus-transmit normal operating function to the
transceiver.
USING THE VREF OUTPUT
The VREF output provides a stable voltage of half the power supply voltage. This can be used in split-termination
schemes to improve electromagnetic compatibility (EMC) of the system. It can also be used as a reference with
which to compare the single-ended inputs for degraded operation in the event of a wire-break fault on either the
CANH or CANL bus lines.
DeviceNet REQUIREMENTS
DeviceNet requires additional performance beyond the requirements of the ISO 11898-2 CAN standard. These
additional specifications address the conditions found in rugged industrial applications. The DeviceNet
specifications are maintained by ODVA. (www.odva.org) The HVD252 and HVD253 fully meet these
requirements under all recommended operating conditions.
PARAMETER
DeviceNet SPECIFICATION
HVD252, HVD253
Number of nodes
64
Yes
Minimum differential input resistance
20 kΩ
Yes
Minimum differential input capacitance
24 pF
Yes
Bus pin voltage range (survivable)
–25 V to 18 V
Yes
Bus pin voltage range (operation)
–5 V to 10 V
Yes
Differential output voltage
1.5 V with 50-Ω load
Yes
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
SN65HVD252D
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HVD252
SN65HVD252DR
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HVD252
SN65HVD253D
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HVD253
SN65HVD253DR
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HVD253
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of