SN65HVD379DRG4

SN65HVD379 www.ti.com .................................................................................................................................................... SLLS667B – FEBRUARY 2006 – REVISED JUNE 2008 3.3 V FULL-DUPLEX RS-485/RS-422 DRIVERS AND BALANCED RECEIVERS FEATURES 1 • • • • • • • • • • • Designed for INTERBUS Applications Designed for RS-422 and RS-485 Networks Balanced Receiver Thresholds 1/2 Unit-Load (up to 64 nodes on the bus) Bus-Pin ESD Protection 15 kV HBM Bus-Fault Protection of –7 V to 12 V Thermal Shutdown Protection Power-Up/Down Glitch-free Bus Inputs and Outputs High Input Impedance With Low VCC Monotonic Outputs During Power Cycling 5-V Tolerant Inputs APPLICATIONS • • • • • • • Digital Motor Control Utility Meters Chassis-to-Chassis Interconnections Electronic Security Stations Industrial, Process, and Building Automation Point-of-Sale (POS) Terminals and Networks DTE/DCE Interfaces DESCRIPTION The SN65HVD379 is a differential line driver and differential-input line receiver that operates with a 3.3-V power supply. Each driver and receiver has separate input and output pins for full-duplex bus communication designs. They are designed for balanced transmission lines and interoperation with ANSI TIA/EIA-485A, TIA/EIA-422-B, ITU-T v.11, and ISO 8482:1993 standard-compliant devices. These differential bus drivers and receivers are monolithic, integrated circuits designed for full-duplex bi-directional data communication on multipoint bus-transmission lines at signaling rates (1) up to 25 Mbps. The SN65HVD379 is fully enabled with no external enabling pins. The 1/2 unit load receiver has a higher receiver input resistance. This results in lower bus leakage currents over the common-mode voltage range, and reduces the total amount of current that an RS-485 driver is forced to source or sink when transmitting. The balanced differential receiver input threshold makes the SN65HVD379 more compatible with fieldbus requirements that define an external failsafe structure. (1) The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second). BALANCED RECEIVER INPUT THRESHOLDS SN65HVD379 D PACKAGE (TOP VIEW) VIT–(TYP) VIT+(TYP) Receiver Output High 0.15 V 0.1 V 0.05 V 0 –0.05 V –0.1 V –0.15 V –0.2 V 0.2 V VID Receiver Output Low VCC R D GND 1 8 2 7 3 6 4 5 A B Z Y 8 2 R A 7 B 5 3 D Y 6 Z 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2006–2008, Texas Instruments Incorporated SN65HVD379 SLLS667B – FEBRUARY 2006 – REVISED JUNE 2008 .................................................................................................................................................... www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION SIGNALING RATE UNIT LOADS PART NUMBER (1) 25 Mbps 1/2 SN65HVD379 (1) SOIC MARKING These are The D package is available taped and reeled. Add an R suffix to the part number (ie. SN65HVD379DR). ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range unless otherwise noted (1) (2) UNIT VCC Supply voltage range –0.3 V to 6 V VA, VB, VY, VZ Voltage range at any bus terminal (A, B, Y, Z) –9 V to 14 V VTRANS Voltage input, transient pulse through 100 Ω. See Figure 8 (A, B, Y, Z) (3) –50 to 50 V VI Input voltage range (D, DE, RE) -0.5 V to 7 V PCONT Continuous total power dissipation IO Output current (receiver output only, R) (1) (2) (3) (4) Internally limited (4) 11 mA Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values, except differential I/O bus voltages, are with respect to network ground terminal. This tests survivability only and the output state of the receiver is not specified. The Thermal shutdown protection circuit internally limits the continuous total power dissipation. Thermal shutdown typically occurs when the junction temperature reaches 165C. RECOMMENDED OPERATING CONDITIONS over operating free-air temperature range unless otherwise noted PARAMETER MIN NOM MAX VCC Supply voltage VI or VIC Voltage at any bus terminal (separately or common mode) 1/tUI Signaling rate RL Differential load resistance VIH High-level input voltage D 2 VCC VIL Low-level input voltage D 0 0.8 VID Differential input voltage –12 12 IOH High-level output current IOL Low-level output current TA Ambient still-air temperature (1) 2 3 3.6 –7 (1) 12 SN65HVD379 25 54 Driver 60 Receiver 8 –40 Mbps V mA –8 Driver V Ω 60 –60 Receiver UNIT 85 mA C The algebraic convention, in which the least positive (most negative) limit is designated as minimum is used in this data sheet. Submit Documentation Feedback Copyright © 2006–2008, Texas Instruments Incorporated Product Folder Link(s): SN65HVD379 SN65HVD379 www.ti.com .................................................................................................................................................... SLLS667B – FEBRUARY 2006 – REVISED JUNE 2008 ELECTROSTATIC DISCHARGE PROTECTION PARAMETER MIN TYP (1) TEST CONDITIONS Human body model Bus terminals and GND Human body model (2) All pins 4 Charged-device-model (3) All pins 1 (1) (2) (3) MAX UNIT 16 kV All typical values at 25C with 3.3-V supply. Tested in accordance with JEDEC Standard 22, Test Method A114-A. Tested in accordance with JEDEC Standard 22, Test Method C101. DRIVER ELECTRICAL CHARACTERISTICS over recommended operating conditions unless otherwise noted PARAMETER VI(K) MIN TYP (1) TEST CONDITIONS Input clamp voltage II = –18 mA IO = 0 2 RL = 54 Ω, See Figure 1 (2) (RS-485) |VOD(SS)| Steady-state differential output voltage Δ|VOD(SS)| Change in magnitude of steady-state differential output voltage between states RL = 54 Ω, See Figure 1 and Figure 2 VOD(RING) Differential output voltage overshoot and undershoot RL = 54 Ω, CL = 50 pF, See Figure 5 (Figure 3 for definitions) VOC(PP) Peak-to-peak common-mode output voltage VOC(SS) Steady-state common-mode output voltage ΔVOC(SS) Change in steady-state common-mode output voltage RL = 100 Ω, See Figure 1 (RS-422) Vtest = –7 V to 12 V, See Figure 2 Short-circuit output current (4) II Input current C(OD) (1) (2) (3) (4) 2.0 2 2.3 1.5 –0.2 0.2 See Figure 3 VZ or VY = –7 V VZ or VY = 12 V 10% (3) 1.6 2.3 –0.05 0.05 90 µA –10 Other input at 0 V VI = 0 or VI = 2.0 –250 250 –250 250 0 100 VOD = 0.4 sin (4E6πt) + 0.5 V, VCC at 0 V Differential output capacitance V 0.5 VCC = 0 V, VZ or VY = –7 V, Other input at 0 V D UNIT VCC 1.5 VCC = 0 V, VZ or VY = 12 V, Other input at 0 V IZ(Z) or IY(Z) High-impedance state output current IZ(S) or IY(S) MAX –1.5 16 mA A pF All typical values are at 25C and with a 3.3-V supply. VCC is 3.3 Vdc 5% 10% of the peak-to-peak differential-output voltage swing, per TIA/EIA-485. Under some conditions of short-circuit to negative voltages, output currents exceeding the ANSI TIA/EIA-485-A maximum current of 250 mA may occur. Continuous exposure may affect device reliability. DRIVER SWITCHING CHARACTERISTICS over recommended operating conditions unless otherwise noted PARAMETER TEST CONDITIONS tPLH Propagation delay time, low-to-high-level output tPHL Propagation delay time, high-to-low-level output tr Differential output signal rise time tf Differential output signal fall time tsk(p) Pulse skew (|tPHL – tPLH|) tsk(pp) (2) Part-to-part skew (1) (2) RL = 54 Ω, CL = 50 pF, See Figure 5 MIN TYP (1) MAX 4 10 18 ns 2.5 5 12 ns UNIT 0.6 ns 1 ns All typical values are at 25C and with a 3.3-V supply. tsk(pp) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices operate with the same supply voltages, at the same temperature, and have identical packages and test circuits. Submit Documentation Feedback Copyright © 2006–2008, Texas Instruments Incorporated Product Folder Link(s): SN65HVD379 3 SN65HVD379 SLLS667B – FEBRUARY 2006 – REVISED JUNE 2008 .................................................................................................................................................... www.ti.com RECEIVER ELECTRICAL CHARACTERISTICS over recommended operating conditions unless otherwise noted PARAMETER TEST CONDITIONS VIT+ Positive-going differential input threshold voltage IO = –8 mA VIT– Negative-going differential input threshold voltage Vhys Hysteresis voltage (VIT+ – VIT–) VO MIN MAX UNIT 0.2 IO = 8 mA V –0.2 50 VID = 200 mV, IO = –8 mA, See Figure 7 Output voltage mV 2.4 VID = –200 mV, IO = 8 mA, See Figure 7 0.20 0.35 VA or VB = 12 V, VCC = 0 V 0.24 0.40 Bus input current CID Differential input capacitance VID = 0.4 sin (4E6πt) + 0.5 V, DE at 0 V ICC Supply current D at 0 V or VCC and No Load VA or VB = -7 V Other input at 0 V VA or VB = -7 V, VCC = 0 V V 0.4 VA or VB = 12 V IA or IB (1) TYP (1) –0.35 –0.18 –0.25 –0.13 mA 15 pF 2.1 mA TYP (1) MAX UNIT 26 45 All typical values are at 25C and with a 3.3-V supply. RECEIVER SWITCHING CHARACTERISTICS over recommended operating conditions unless otherwise noted PARAMETER TEST CONDITIONS tPLH Propagation delay time, low-to-high-level output tPHL Propagation delay time, high-to-low-level output tsk(p) Pulse skew (|tPHL - tPLH|) MIN VID = –1.5 V to 1.5 V, CL = 15 pF, See Figure 7 7 (2) tsk(pp) Part-to-part skew tr Output signal rise time 5 tf Output signal fall time 6 (1) (2) ns 5 All typical values are at 25C and with a 3.3-V supply tsk(pp) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices operate with the same supply voltages, at the same temperature, and have identical packages and test circuits. DEVICE POWER DISSIPATION – PD PARAMETER PD TEST CONDITIONS Device power dissipation MIN TYP MAX UNIT 197 mW RL = 60 , CL = 50 pF, Input to D a 50% duty cycle square wave at indicated signaling rate TA = 85C FUNCTION TABLES DRIVER INPUT 4 RECEIVER OUTPUTS Z DIFFERENTIAL INPUTS OUTPUTS VID = VA–VB R L D Y H H L VID ≤ –0.2 V L L H –0.2 V < VID < 0.2 V ? Open L H 0.2 V ≤ VID H Submit Documentation Feedback Copyright © 2006–2008, Texas Instruments Incorporated Product Folder Link(s): SN65HVD379 SN65HVD379 www.ti.com .................................................................................................................................................... SLLS667B – FEBRUARY 2006 – REVISED JUNE 2008 PARAMETER MEASUREMENT INFORMATION 375 Ω ±1% II Y IY VOD 0 V or 3 V Z RL Y D VOD 0 V or 3 V IZ 60 Ω ±1% Z + _ −7 V < V(test) < 12 V VI VZ 375 Ω ±1% VY Figure 1. Driver VOD Test Circuit and Voltage and Current Definitions Figure 2. Driver VOD With Common-Mode Loading Test Circuit VOD(SS) VOD(RING) 0 V Differential VOD(RING) –VOD(SS) Figure 3. VOD(RING) Waveform and Definitions VOD(RING) is measured at four points on the output waveform, corresponding to overshoot and undershoot from theVOD(H) and VOD(L) steady state values. 27 Ω ±1% Input D Y Y VY Z VZ VOC(PP) Z 27 Ω ±1% CL = 50 pF ±20% VOC ∆VOC(SS) VOC CL Includes Fixture and Instrumentation Capacitance Input: PRR = 500 kHz, 50% Duty Cycle, tr < 6 ns, tf < 6 ns, ZO = 50 W Figure 4. Test Circuit and Definitions for the Driver Common-Mode Output Voltage Submit Documentation Feedback Copyright © 2006–2008, Texas Instruments Incorporated Product Folder Link(s): SN65HVD379 5 SN65HVD379 SLLS667B – FEBRUARY 2006 – REVISED JUNE 2008 .................................................................................................................................................... www.ti.com PARAMETER MEASUREMENT INFORMATION (continued) Y W » W Z » Generator: PRR = 500 kHz, 50% Duty Cycle, tr < 6 ns, tf < 6 ns, ZO = 50 W Figure 5. Driver Switching Test Circuit and Voltage Waveforms IA A IO R VA VID VIC VA + VB 2 VB B VO IB Figure 6. Receiver Voltage and Current Definitions A R Input Generator VI 50 Ω 1.5 V B 3V VO 1.5 V VI 0V CL = 15 pF ±20% CL Includes Fixture and Instrumentation Capacitance 1.5 V t PLH VO t PHL Generator: PRR = 500 kHz, 50% Duty Cycle, tr < 6 ns, tf < 6 ns, ZO = 50 W VOH 90% 90% 1.5 V 10% tr 1.5 V 10% V OL tf Figure 7. Receiver Switching Test Circuit and Voltage Waveforms A Y D R Z 100 W ±1% + - Pulse Generator 15 ms duration 1% Duty Cycle tr, tf £ 100 ns 100 W ±1% B + - Figure 8. Test Circuit, Transient Over Voltage Test 6 Submit Documentation Feedback Copyright © 2006–2008, Texas Instruments Incorporated Product Folder Link(s): SN65HVD379 SN65HVD379 www.ti.com .................................................................................................................................................... SLLS667B – FEBRUARY 2006 – REVISED JUNE 2008 EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS D Input R Output VCC VCC 470 W 5W Input Output 9V 9V 125 kW A Input B Input VCC 22 V VCC R1 R1 22 V R3 R3 Input Input 22 V R2 22 V R2 Y and Z Outputs VCC 16 V Output 16 V SN65HVD379 R1/R2 R3 9 kΩ 45 kΩ Submit Documentation Feedback Copyright © 2006–2008, Texas Instruments Incorporated Product Folder Link(s): SN65HVD379 7 SN65HVD379 SLLS667B – FEBRUARY 2006 – REVISED JUNE 2008 .................................................................................................................................................... www.ti.com TYPICAL CHARACTERISTICS RMS SUPPLY CURRENT vs SIGNALING RATE BUS INPUT CURRENT vs BUS INPUT VOLTAGE 250 55 TA = 25°C RL = 54 W RE = VCC CL = 50 pF DE = VCC 50 150 II - Bus Input Current - mA ICC - RMS Supply Current - mA TA = 25°C RE = 0 V DE = 0 V 200 45 VCC = 3.3 V 40 100 50 VCC = 3.3 V 0 –50 –100 35 –150 –200 –7 30 0 5 10 15 20 25 2 5 8 11 Figure 9. Figure 10. DRIVER LOW-LEVEL OUTPUT CURRENT vs LOW-LEVEL OUTPUT VOLTAGE DRIVER HIGH-LEVEL OUTPUT CURRENT vs HIGH-LEVEL OUTPUT VOLTAGE 14 0.01 0.12 IOH - Driver High-Level Output Current - A VCC = 3.3 V DE = VCC D=0V 0.1 0.08 0.06 0.04 0.02 0 –0.02 VCC = 3.3 V DE = VCC D=0V –0.01 –0.03 –0.05 –0.07 –0.09 –0.11 –0.13 0 0.5 1 1.5 2 2.5 3 3.5 0 VOL - Low-Level Output Voltage - V Figure 11. 8 –1 VI - Bus Input Voltage - V 0.14 IOL - Driver Low-Level Output Current - A –4 Signaling Rate - Mbps 0.5 1 1.5 2 2.5 3 3.5 VOH - High-Level Output Voltage - V Figure 12. Submit Documentation Feedback Copyright © 2006–2008, Texas Instruments Incorporated Product Folder Link(s): SN65HVD379 SN65HVD379 www.ti.com .................................................................................................................................................... SLLS667B – FEBRUARY 2006 – REVISED JUNE 2008 TYPICAL CHARACTERISTICS (continued) DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE DRIVER OUTPUT CURRENT vs SUPPLY VOLTAGE 40 VCC = 3.3 V DE = VCC D = VCC TA = 25°C RL = 54 W D = VCC DE = VCC 35 IO - Driver Output Current - mA VOD - Driver Differential Output Voltage - V 2.2 2.1 2.0 1.9 30 25 20 15 10 5 0 1.8 –40 –15 10 35 60 85 0 TA - Free-Air Temperature - °C Figure 13. 0.5 1 1.5 2 2.5 3 3.5 VCC - Supply Voltage - V Figure 14. Submit Documentation Feedback Copyright © 2006–2008, Texas Instruments Incorporated Product Folder Link(s): SN65HVD379 9 PACKAGE OPTION ADDENDUM www.ti.com 13-Aug-2021 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) SN65HVD379D ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 VP379 SN65HVD379DG4 ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 VP379 SN65HVD379DR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 VP379 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of