SN65LBC175DRG4

 
         
SLLS171G − OCTOBER 1993 − REVISED MARCH2009 D Meets or Exceeds the EIA Standards D D D D D D D D, DW, OR N PACKAGE (TOP VIEW) RS-422-A, RS-423-A, RS-485, and CCITT Recommendation V.11 Designed to Operate With Pulse Durations as Short as 20 ns Designed for Multipoint Transmission on Long Bus Lines in Noisy Environments Input Sensitivity . . . ± 200 mV Low-Power Consumption . . . 20 mA Max Open-Circuit Fail-Safe Design Common-Mode Input Voltage Range of −7 V to 12 V Pin Compatible With SN75175 and LTC489 1B 1A 1Y 1,2EN 2Y 2A 2B GND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC 4B 4A 4Y 3,4EN 3Y 3A 3B description The SN65LBC175 and SN75LBC175 are monolithic, quadruple, differential line receivers with 3-state outputs designed to meet the requirements of the EIA standards RS-422-A, RS-423-A, RS-485, and CCITT Recommendation V.11. The devices are optimized for balanced multipoint bus transmission at data rates up to and exceeding 10 million bits per second. The receivers are enabled in pairs, with an active-high enable input. Each differential receiver input features high impedance, hysteresis for increased noise immunity, and sensitivity of ±200 mV over a common-mode input voltage range of 12 V to −7 V. The fail-safe design ensures that when the inputs are open-circuited, the outputs are always high. Both devices are designed using the TI proprietary LinBiCMOStechnology allowing low power consumption, high switching speeds, and robustness. These devices offer optimum performance when used with the SN75LBC172 or SN75LBC174 quadruple line drivers. The SN65LBC175 is available in the 16-pin DIP (N), small-outline package (D), and the wide small-outline package (DW). The SN75LBC175 is available in the 16-pin DIP (N) and the small-outline package (D). The SN65LBC175 is characterized over the industrial temperature range of −40°C to 85°C. The SN75LBC175 is characterized for operation over the commercial temperature range of 0°C to 70°C. AVAILABLE OPTIONS TEMPERATURE RANGE PACKAGE 0°C to 70°C −40°C to 85°C SN75LBC175D SN65LBC175D Wide SOIC  SN65LBC175DW PDIP SN75LBC175N SN65LBC175N SOIC Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. LinBiCMOS is a trademark of Texas Instruments. Copyright  2009 Texas Instruments Incorporated    ! " #$%! "  &$'(#! )!%* )$#!" # ! "&%##!" &% !+% !%"  %," "!$%!" "!)) -!.* )$#! &#%""/ )%" ! %#%""(. #($)% !%"!/  (( &%!%"* POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 
 
         
SLLS171G − OCTOBER 1993 − REVISED MARCH2009 logic symbol† 1,2EN 1A 1B 2A 2B 4 logic diagram (positive logic) EN 1,2EN 2 3 1 1A 1Y 1B 6 5 7 2Y 2A 2B 3,4EN 12 EN 3,4EN 3A 3B 4A 4B 10 11 9 3Y 3A 14 13 15 3B 4Y 4A † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. 4B 4 2 1 6 7 3 5 1Y 2Y 12 10 9 14 15 11 13 3Y 4Y FUNCTION TABLE (each receiver) DIFFERENTIAL INPUTS A −B ENABLE OUTPUT Y VID ≥ 0.2 V −0.2 V < VID < 0.2 V H H H ? VID ≤ − 0.2 V X H L L Z Open circuit H H H = high level, L = low level, X = irrelevant, Z = high impedance (off), ? = indeterminate schematics of inputs and outputs EQUIVALENT OF A AND B INPUTS TYPICAL OF ALL OUTPUTS VCC VCC 100 kΩ (A Only) VCC 3 kΩ Input Receiver Input 18 kΩ 100 kΩ (B Only) TYPICAL OF EN INPUT Y Output 12 kΩ 1 kΩ 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Output 
 
         
SLLS171G − OCTOBER 1993 − REVISED MARCH2009 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 7 V Input voltage, VI (A or B inputs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 25 V Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 25 V Voltage range at Y, 1/2EN, 3/4EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to VCC + 0.5 V Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature range, TA: SN65LBC175 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 85°C SN75LBC175 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C Electrostatic Discharge (ESD): Human Body Model (HBM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 kV Machine Model (MM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 V Charged Device Model (CDM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 kV † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values are with respect to GND. 2. Differential input voltage is measured at the noninverting input with respect to the corresponding inverting input. DISSIPATION RATING TABLE PACKAGE TA ≤ 25°C POWER RATING DERATING FACTOR ABOVE TA = 25°C TA = 70°C POWER RATING TA = 85°C POWER RATING D 1100 mW 8.7 mW/°C 709 mW 578 mW DW 1200 mW 9.6 mW/°C 770 mW 625 mW N 1150 mW 9.2 mW/°C 736 mW 598 mW recommended operating conditions Supply voltage, VCC Common-mode input voltage, VIC MIN NOM MAX UNIT 4.75 5 5.25 V 12 V ±6 V −7 Differential input voltage, VID High-level input voltage, VIH Low-level input voltage, VIL 2 EN inputs V 0.8 V High-level output current, IOH −8 mA Low-level output current, IOL 8 mA Operating free-air temperature, TA SN65LBC175 −40 85 SN75LBC175 0 70 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 °C 3 
 
         
SLLS171G − OCTOBER 1993 − REVISED MARCH2009 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS VIT + VIT − Positive-going input threshold voltage Vhys VIK Hysteresis voltage ( VIT + − VIT − ) VOH VOL High-level output voltage IOZ High-impedance-state output current Negative-going input threshold voltage Enable input clamp voltage Low-level output voltage II Bus input current A or B inputs IIH IIL High-level enable input current IOS Short-circuit output current ICC Supply current Low-level enable input current IO = − 8 mA IO = 8 mA MIN TYP† MAX 0.2 −0.2 VID = − 200 mV, VO = 0 V to VCC −0.9 IOH = − 8 mA IOL = 8 mA 3.5 mV −1.5 4.5 0.3 V V ± 20 µA VCC = 5 V, VCC = 0 V, Other inputs at 0 V 0.7 1 Other inputs at 0 V 0.8 1 VIH = − 7 V, VIH = − 7 V, VCC = 5 V, VCC = 0 V, Other inputs at 0 V −0.5 −0.8 Other inputs at 0 V −0.4 −0.8 ± 20 VIH = 5 V VIL = 0 V −80 IO = 0, VID = 5 V Outputs disabled V 0.5 VIH = 12 V, VIH = 12 V, VO = 0 Outputs enabled, V V 45 II = − 18 mA VID = 200 mV, UNIT mA µA −20 µA −120 mA 11 20 0.9 1.4 mA † All typical values are at VCC = 5 V and TA = 25°C. switching characteristics, VCC = 5 V, CL = 15 pF, TA = 25°C PARAMETER TEST CONDITIONS MIN TYP† MAX 11 22 30 ns 11 22 30 ns UNIT tPHL tPLH Propagation delay time, high- to low-level output Propagation delay time, low- to high-level output VID = − 1.5 V to 1.5 V, See Figure 1 tPZH tPZL Output enable time to high level See Figure 2 17 30 ns Output enable time to low level See Figure 3 18 30 ns tPHZ tPLZ Output disable time from high level See Figure 2 30 40 ns Output disable time from low level See Figure 3 23 30 ns tsk(p) tt Pulse skew (|tPHL − tPLH|) See Figure 2 4 6 ns Transition time See Figure 1 3 10 ns 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 
 
         
SLLS171G − OCTOBER 1993 − REVISED MARCH2009 PARAMETER MEASUREMENT INFORMATION 1.5 V Generator (see Note A) Input 0V 0V −1.5 V 50 Ω Output tPLH CL = 15 pF (see Note B) tPHL VOH 90% Output 1.3 V 10% 1.3 V VOL tt 2V TEST CIRCUIT tt VOLTAGE WAVEFORMS Figure 1. tPLH and tPHL Test Circuit and Voltage Waveforms VCC Output 2 kΩ S1 1.5 V Input CL = 15 pF (see Note B) 5 kΩ 3V 1.3 V 1.3 V 0V tPHZ tPZH See Note C Generator (see Note A) Output S1 Open 50 Ω 0.5 V 1.3 V 0V VOH S1 Closed ≈ 1.4 V VOLTAGE WAVEFORMS TEST CIRCUIT NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, duty cycle = 50%, tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω. B. CL includes probe and jig capacitance. C. All diodes are 1N916 or equivalent. Figure 2. tPHZ and tPZH Test Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 
 
         
SLLS171G − OCTOBER 1993 − REVISED MARCH2009 PARAMETER MEASUREMENT INFORMATION VCC Output 2 kΩ 1.5 V 3V Input CL = 15 pF (see Note B) 1.3 V 1.3 V 0V 5 kΩ See Note C tPZL Generator (see Note A) tPLZ S2 Open Output 50 Ω S2 Closed ≈ 1.4 V 1.3 V VOL S2 0.5 V VOLTAGE WAVEFORMS TEST CIRCUIT NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, duty cycle = 50%, tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω. B. CL includes probe and jig capacitance. C. All diodes are 1N916 or equivalent. Figure 3. tPZL and tPLZ Test Circuit and Voltage Waveforms TYPICAL CHARACTERISTICS HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT OUTPUT VOLTAGE vs DIFFERENTIAL INPUT VOLTAGE 5.5 4.5 VIC = 12 V VIC = 0 V VIC = 12 V 2 VIC = 0 V 2.5 VIC = − 7 V 3 1.5 1 0.5 0 0 10 20 30 40 50 60 70 80 90 100 VOH − High-Level Output Voltage − V 3.5 VIC = − 7 V VO − Output Voltage − V 5 VCC = 5 V TA = 25°C 4 4 VCC = 5 V 3.5 VCC = 4.75 V 3 2.5 2 1.5 1 0.5 VID = 0.2 V TA = 25°C 0 0 −4 −8 −12 −16 −20 −24 −28 −32 −36 −40 IOH − High-Level Output Current − mA VID − Differential Input Voltage − mV Figure 4 6 VCC = 5.25 V 4.5 Figure 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 
 
         
SLLS171G − OCTOBER 1993 − REVISED MARCH2009 TYPICAL CHARACTERISTICS LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT AVERAGE SUPPLY CURRENT vs FREQUENCY 660 540 I CC − Average Supply Current − mA 600 VOL − Low-Level Output Voltage − mV 14 TA = 25°C VCC = 5 V VID = 200 mV 480 420 360 300 240 180 120 TA = 25°C VCC = 5 V 12 10 8 6 4 2 60 0 0 3 6 9 12 15 18 21 24 27 0 10k 30 100k IOL − Low-Level Output Current − mA 1M Figure 6 I I − Input Current − mA 0.6 0.4 0.2 0 −0.2 −0.4 −0.6 −0.8 ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ −1 −8 PROPAGATION DELAY TIME vs FREE-AIR TEMPERATURE 24.5 TA = 25°C VCC = 5 V The shaded region of this graph represents more than 1 unit load per RS-485. −6 −4 −2 0 2 4 6 8 10 12 t pd − Propagation Delay Time − ns 0.8 100M Figure 7 INPUT CURRENT vs INPUT VOLTAGE (COMPLEMENTARY INPUT AT 0 V) 1 10M f − Frequency − Hz VCC = 5 V CL = 15 pF VIO = ± 1.5 V 24 tPHL 23.5 23 tPLH 22.5 22 −40 −20 0 20 40 60 80 100 TA − Free-Air Temperature − °C VI − Input Voltage − V Figure 9 Figure 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) SN65LBC175D ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 65LBC175 Samples SN65LBC175DG4 ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 65LBC175 Samples SN65LBC175DR ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 65LBC175 Samples SN65LBC175DW ACTIVE SOIC DW 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 65LBC175 Samples SN65LBC175DWG4 ACTIVE SOIC DW 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 65LBC175 Samples SN65LBC175DWR ACTIVE SOIC DW 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 65LBC175 Samples SN65LBC175N ACTIVE PDIP N 16 25 RoHS & Green NIPDAU N / A for Pkg Type -40 to 85 SN65LBC175N Samples SN75LBC175D ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 75LBC175 Samples SN75LBC175DR ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 75LBC175 Samples SN75LBC175N ACTIVE PDIP N 16 25 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 SN75LBC175N Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of