User's Guide
SLLU151 – July 2011
SN65LVDS4 Evaluation Module
The Texas Instruments SN65LVDS4 Evaluation Module board is used to evaluate the SN65LVDS4 LVDS
receiver with selectable output levels.
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Contents
Introduction ..................................................................................................................
SN65LVDS4EVM Kit Contents ............................................................................................
SN65LVDS4EVM Board Configuration ..................................................................................
Power Supply Configuration ...............................................................................................
Test Setup ...................................................................................................................
Schematic, Bill of Materials, and Board Layouts ........................................................................
6.1
Schematic ...........................................................................................................
6.2
Bill of Materials .....................................................................................................
6.3
Board Layouts ......................................................................................................
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3
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6
List of Figures
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SN65LVDS4EVM Board ................................................................................................... 2
2
SN65LVDS4 Schematic .................................................................................................... 4
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SN65LVDS4EVM Board Layout, Top – Layer 1 ........................................................................ 6
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SN65LVDS4EVM Board Layout, GND – Layer 2 ....................................................................... 7
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SN65LVDS4EVM Board Layout, POWER – Layer 3
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..................................................................
SN65LVDS4EVM Board Layout, Bottom – Layer 4 ....................................................................
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List of Tables
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Power Supply Acceptable Combinations ................................................................................ 3
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EVM and Device Connections
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4
............................................................................................
SN65LVDS4EVM Bill of Materials ........................................................................................
SN65LVDS4EVM Printed-Circuit Board Layer Construction ..........................................................
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1
Introduction
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Introduction
The Texas Instruments SN65LVDS4 Evaluation Module (EVM) board is used to evaluate the SN65LVDS4
LVDS receiver. The device can provide output voltage logic levels based on an external VDD pin, thus
eliminating the need for external level translation. The board enables the system designer to connect 50-Ω
coaxial cables via SMA connectors at the inputs and an SMA or high-impedance probe at the output.
WARNING
This equipment is intended for use in a laboratory test environment
only. It generates, uses, and can radiate radio frequency energy
and has not been tested for compliance with the limits of
computing devices pursuant to subpart J of part 15 of FCC rules,
which are designed to provide reasonable protection against radio
frequency interference. Operation of this equipment in other
environments may cause interference with radio communications,
in which case, users at their own expense will be required to take
whatever measures may be required to correct this interference.
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SN65LVDS4EVM Kit Contents
The SN65LVDS4EVM kit contains the following:
• SN65LVDS4EVM board
• SN65LVDS4EVM User’s Guide (this document)
3
SN65LVDS4EVM Board Configuration
The SN65LVDS4 input differential pair (J1, J3) and single-ended output (J2) are available through the
edge launch SMA connectors.
Figure 1. SN65LVDS4EVM Board
2
SN65LVDS4 Evaluation Module
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Power Supply Configuration
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4
Power Supply Configuration
Two power supplies are needed to bias the SN65LVDS4 – VCC, the core power supply, and VDD, the
output drive power supply. For proper device operation, it is recommended that VCC is powered up first
and then VDD or VCC applied at the same time as VDD (In the later case, VCC and VDD are tied
together). Further, it is also recommended that VCC is equal to or less than VDD as shown in Table 1.
Table 1. Power Supply Acceptable Combinations
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VCC (V)
VDD (V)
Recommended
1.8
1.8
Yes
1.8
2.5
Yes
1.8
3.3
Yes
2.5
1.8
No
2.5
2.5
Yes
2.5
3.3
Yes
Test Setup
Measuring the output signal on J2 with a 50-Ω cable terminated into 50 Ω at the scope attenuates the
signal due to the 453-Ω resistor (R1) in series with the receiver output on the EVM board. The resistor is
installed as a current limit for termination into a 50-Ω load, thus providing a 10x attenuation on the
measured output signal.
Measuring the output signal with a high-impedance probe on JMP1 requires removing R1, the 453-Ω
resistor, and installing a 0-Ω resistor on R4 (0402). Measuring the output signal on JMP1 allows the user
to see absolute signal levels out of the device.
See Table 2 for input and output connections.
Table 2. EVM and Device Connections
EVM Connection
Pin
I/O
Description
Name
No.
J1
A
2
I
LVDS input, positive
J3
B
3
I
LVDS input, negative
P2
GND
1, 7
—
Ground
—
NC
4, 6, 9
—
No connect
J2
R
8
O
1.8/2.5 LVCMOS/3.3 LVTTL output
P1
VCC
5
—
Core supply voltage
P3
VDD
10
—
Output supply voltage
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Schematic, Bill of Materials, and Board Layouts
6
Schematic, Bill of Materials, and Board Layouts
6.1
Schematic
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Figure 2. SN65LVDS4 Schematic
4
SN65LVDS4 Evaluation Module
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Schematic, Bill of Materials, and Board Layouts
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6.2
Bill of Materials
Table 3. SN65LVDS4EVM Bill of Materials
Qty
Reference
Value
Part
Part Number
Manufacturer
2
C1,C4
0.01 µF
CC0201
GRM033R70J103KA01D
Murata
2
C2,C5
0.1 µF
CC0201
GRM033R60J104KE19D
Murata
1
C3
10 pF
CC0402
ECD-G0E100C
Panasonic - ECG
2
C6,C10
68 µF
CT7343
TAJE686K025R
AVX
2
C7,C11
47 µF
CC1210
EMK325BJ476MM-T
Taiyo Yuden
2
C8,C12
22 µF
CC1206
C1206X5R6R3-226KNE
Venkel
2
C9,C13
10 µF
CT7343
C1206X7R160-106KNE
Venkel
1
JMP1
3 Pin Berg Jumper
HDR1X3
HTSW-150-07-G-S
Samtec
3
J1,J2,J3
sma_edge
JOHNSON_142-0701-801
142-0701-801
EF Johnson
3
P1,P2,P3
Banana-Jack
JOHNSON_108-0740-001
108-0740-001
Emerson Network Power
1
R1
453
R0402
RMCF0402FT453R
Stackpole Electronics
1
R2
100
R0201
ERJ-1GEJ101C
Panasonic - ECG
1
R3
0
R0402
RMCF0402ZT0R00
Stackpole Electronics
1
R4
DNI_0
R0402
RMCF0402ZT0R00
Stackpole Electronics
1
U1
SN65LVDS4
10-pin RSE
SN65LVDS4
Texas Instruments
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Schematic, Bill of Materials, and Board Layouts
6.3
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Board Layouts
Table 4. SN65LVDS4EVM Printed-Circuit Board Layer Construction
Subclass
Name
TOP
L2_GND
L3_POWER
BOTTOM
(1)
Type
Material
SURFACE
AIR
MASK
LPI
FINISH
ENIG
CONDUCTOR
COPPER
DIELECTRIC
FR-4
PLANE
COPPER
DIELECTRIC
FR-4
CONDUCTOR
COPPER
DIELECTRIC
FR-4
CONDUCTOR
COPPER
FINISH
ENIG
MASK
LPI
SURFACE
AIR
Thickness
(mil)
Conductivity
(mho/cm)
Dielectric
Constant
Loss
Tangent
Artwork
Width
(mil)
Impedance
(Ω) (1)
10
50
1.29
0.689
595900
1
0
6
0
4.2
0.035
1.378
595900
1
0
10
0
4.2
0.035
1.378
595900
1
0
6
0
4.2
0.035
0.689
595900
1
0
POSITIVE
POSITIVE
POSITIVE
POSITIVE
N/A
1.29
Always consult with your board manufacturer for their process/design requirements to ensure the desired impedance is
achieved.
Figure 3. SN65LVDS4EVM Board Layout, Top – Layer 1
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SN65LVDS4 Evaluation Module
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Schematic, Bill of Materials, and Board Layouts
Figure 4. SN65LVDS4EVM Board Layout, GND – Layer 2
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Schematic, Bill of Materials, and Board Layouts
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Figure 5. SN65LVDS4EVM Board Layout, POWER – Layer 3
8
SN65LVDS4 Evaluation Module
Copyright © 2011, Texas Instruments Incorporated
SLLU151 – July 2011
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Schematic, Bill of Materials, and Board Layouts
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Figure 6. SN65LVDS4EVM Board Layout, Bottom – Layer 4
SLLU151 – July 2011
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SN65LVDS4 Evaluation Module
Copyright © 2011, Texas Instruments Incorporated
9
Evaluation Board/Kit Important Notice
Texas Instruments (TI) provides the enclosed product(s) under the following conditions:
This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION
PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the
product(s) must have electronics training and observe good engineering practice standards. As such, the goods being provided are
not intended to be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations,
including product safety and environmental measures typically found in end products that incorporate such semiconductor
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electromagnetic compatibility, restricted substances (RoHS), recycling (WEEE), FCC, CE or UL, and therefore may not meet the
technical requirements of these directives or other related directives.
Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30
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FCC Warning
This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION
PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. It generates, uses, and
can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15
of FCC rules, which are designed to provide reasonable protection against radio frequency interference. Operation of this
equipment in other environments may cause interference with radio communications, in which case the user at his own expense
will be required to take whatever measures may be required to correct this interference.
EVM Warnings and Restrictions
It is important to operate this EVM within the input voltage range of 1.62 V to 2.75 V and the output voltage range of 1.62 V to 3.6
V.
Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are
questions concerning the input range, please contact a TI field representative prior to connecting the input power.
Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the
EVM. Please consult the EVM User's Guide prior to connecting any load to the EVM output. If there is uncertainty as to the load
specification, please contact a TI field representative.
During normal operation, some circuit components may have case temperatures greater than 40° C. The EVM is designed to
operate properly with certain components above 40° C as long as the input and output ranges are maintained. These components
include but are not limited to linear regulators, switching transistors, pass transistors, and current sense resistors. These types of
devices can be identified using the EVM schematic located in the EVM User's Guide. When placing measurement probes near
these devices during operation, please be aware that these devices may be very warm to the touch.
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