SGLS207A − OCTOBER 2003 − REVISED MAY 2008
D Qualified for Automotive Applications
D 21:3 Data Channel Compression at up to
DGG PACKAGE
(TOP VIEW)
1.36 Gigabits per Second Throughput
D4
VCC
D5
D6
GND
D7
D8
VCC
D9
D10
GND
D11
D12
VCC
D13
D14
GND
D15
D16
D17
VCC
D18
D19
GND
D Suited for Point-to-Point Subsystem
D
D
D
D
D
D
D
D
D
D
D
D
Communication With Very Low EMI
21 Data Channels Plus Clock in
Low-Voltage TTL and 3 Data Channels Plus
Clock Out Low-Voltage Differential
Operates From a Single 3.3-V Supply and
250 mW (Typ)
5-V Tolerant Data Inputs
’LVDS95 Has Rising Clock Edge Triggered
Inputs
Bus Pins Tolerate 6-kV HBM ESD
Packaged in Thin Shrink Small-Outline
Package With 20 Mil Terminal Pitch
Consumes
很抱歉,暂时无法提供与“SN65LVDS95DGGRQ1”相匹配的价格&库存,您可以联系我们找货
免费人工找货