SN74ABT273DWR

SN54ABT273, SN74ABT273 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR SCBS185B – FEBRUARY 1991 – REVISED JANUARY 1997 D D D D State-of-the-Art EPIC-ΙΙB  BiCMOS Design Significantly Reduces Power Dissipation Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C High-Drive Outputs (–32-mA IOH, 64-mA IOL) Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK), Plastic (N) and Ceramic (J) DIPs, and Ceramic Flat (W) Package SN54ABT273 . . . J OR W PACKAGE SN74ABT273 . . . DB, DW, N, OR PW PACKAGE (TOP VIEW) CLR 1Q 1D 2D 2Q 3Q 3D 4D 4Q GND description 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC 8Q 8D 7D 7Q 6Q 6D 5D 5Q CLK SN54ABT273 . . . FK PACKAGE (TOP VIEW) 1D 1Q CLR VCC The ’ABT273 are 8-bit positive-edge-triggered D-type flip-flops with a direct clear (CLR) input. They are particularly suitable for implementing buffer and storage registers, shift registers, and pattern generators. 2D 2Q 3Q 3D 4D 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 8D 7D 7Q 6Q 6D 4Q GND CLK 5Q 5D Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock (CLK) input is at either the high or low level, the D input signal has no effect at the output. 8Q D The SN54ABT273 is characterized for operation over the full military temperature range of –55°C to 125°C. The SN74ABT273 is characterized for operation from –40°C to 85°C. FUNCTION TABLE (each flip-flop) INPUTS CLR CLK D OUTPUT Q L X X L H ↑ H H H ↑ L L H H or L X Q0 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC-ΙΙB is a trademark of Texas Instruments Incorporated. Copyright  1997, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54ABT273, SN74ABT273 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR SCBS185B – FEBRUARY 1991 – REVISED JANUARY 1997 logic symbol† CLR CLK 1D 2D 3D 4D 5D 6D 7D 8D 1 R 11 C1 3 2 1D 4 5 7 6 8 9 13 12 14 15 17 16 18 19 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. logic diagram (positive logic) 2D 1D CLK 11 3 3D 4 7 5D 8 6D 13 7D 14 8D 17 18 CLK(I) 1D 1D C1 1 1D C1 R CLR 4D 1D C1 R 1D C1 R 1D C1 R 1D C1 R 1D C1 R C1 R R R 2 1Q 5 2Q 6 3Q 9 4Q 12 5Q 15 6Q 16 7Q 19 8Q absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡ Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Voltage range applied to any output in the high or power-off state, VO . . . . . . . . . . . . . . . . . . . –0.5 V to 5.5 V Current into any output in the low state, IO: SN54ABT273 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA SN74ABT273 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –18 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA Package thermal impedance, θJA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115°C/W DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C ‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. The package thermal impedance is calculated in accordance with EIA/JEDEC Std JESD51, except for through-hole packages, which use a trace length of zero. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54ABT273, SN74ABT273 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR SCBS185B – FEBRUARY 1991 – REVISED JANUARY 1997 recommended operating conditions (see Note 3) SN54ABT273 SN74ABT273 MIN MAX MIN MAX 4.5 5.5 4.5 5.5 UNIT VCC VIH Supply voltage VIL VI Low-level input voltage IOH IOL High-level output current VCC –24 Low-level output current 48 64 mA ∆t/∆v Input transition rise or fall rate 10 10 ns/V 85 °C High-level input voltage 2 2 0.8 Input voltage 0 TA Operating free-air temperature NOTE 3: Unused inputs must be held high or low to prevent them from floating. –55 125 V 0.8 0 –40 V VCC –32 V V mA electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V, II = –18 mA IOH = –3 mA VCC = 5 V, VCC = 4 4.5 5V VOL Vhys II Ioff ICEX IO‡ VCC = 4 4.5 5V MIN TA = 25°C TYP† MAX SN54ABT273 MIN –1.2 MAX SN74ABT273 MIN –1.2 MAX –1.2 2.5 2.5 2.5 IOH = –3 mA IOH = –24 mA 3 3 3 2 2 IOH = –32 mA IOL = 48 mA 2* IOL = 64 mA V 0.55 0.55* 0.55 100 VI = VCC or GND VI or VO ≤ 4.5 V VCC = 5.5 V, VCC = 5.5 V, VO = 5.5 V VO = 2.5 V ±1 ∆ICC¶ VCC = 5.5 V, One input at 3.4 V, Other inputs at VCC or GND ±1 µA µA 50 –200§ µA –100 Outputs high 1 400§ 400§ 400§ µA Outputs low 24 30 30 30 mA 1.5 1.5 1.5 mA –50 50 –200§ ±1 ±100 50 –200§ –50 VCC = 5.5 V,, IO = 0,, VI = VCC or GND V mV ±100 Outputs high ICC V 2 0.55 VCC = 5.5 V, VCC = 0, UNIT –50 Ci VI = 2.5 V or 0.5 V 7 * On products compliant to MIL-PRF-38535, this parameter does not apply. † All typical values are at VCC = 5 V. ‡ Not more than one output should be tested at a time, and the duration of the test should not exceed one second. § This data sheet limit may vary among suppliers. ¶ This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 mA pF 3 SN54ABT273, SN74ABT273 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR SCBS185B – FEBRUARY 1991 – REVISED JANUARY 1997 timing requirements over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 1) VCC = 5 V, TA = 25°C fclock Clock frequency tw Pulse duration Setup time before CLK↑ ↑ th Hold time after CLK↑ † This data sheet limit may vary among suppliers. SN74ABT273 MIN MAX MIN MAX MIN MAX 0 150 0 150 0 150 UNIT MHz CLK high or low 3.3 3.3 3.3 CLR low 3.3 3.3 3.3 2 2 2 Data low 2.5 2.5 2.5 ns CLR high 2 1.2† 2 1.4† 2 1.2† ns Data high tsu SN54ABT273 Data high or low ns switching characteristics over recommended ranges of supply voltage and operating free-air temperature, CL = 50 pF (unless otherwise noted) (see Figure 1) PARAMETER fmax tPLH FROM (INPUT) TO (OUTPUT) MIN SN54ABT273 MAX 150 CLK Q CLR † This data sheet limit may vary among suppliers. Q tPHL tPHL VCC = 5 V, TA = 25°C MIN 150 MHz 2.5 6 2.5 7 3.3 6.8 7.5† 3.3 7.5 2.5 8.2 2.5 UNIT MAX ns ns switching characteristics over recommended ranges of supply voltage and operating free-air temperature, CL = 50 pF (unless otherwise noted) (see Figure 1) PARAMETER fmax tPLH FROM (INPUT) TO (OUTPUT) Q CLR † This data sheet limit may vary among suppliers. Q 4 MIN SN74ABT273 MAX 150 CLK tPHL tPHL VCC = 5 V, TA = 25°C POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MIN 150 MHz 2.5 6 2.5 6.5 3.3 6.8 6.7† 3.3 7.3 7.4† 2.5 2.5 UNIT MAX ns ns SN54ABT273, SN74ABT273 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR SCBS185B – FEBRUARY 1991 – REVISED JANUARY 1997 PARAMETER MEASUREMENT INFORMATION 500 Ω From Output Under Test S1 7V Open GND CL = 50 pF (see Note A) 500 Ω TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 7V Open 3V LOAD CIRCUIT Timing Input 1.5 V 0V tw tsu 3V th 3V 1.5 V Input 1.5 V Data Input 0V 1.5 V 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATION 3V 3V 1.5 V Input Output Control 1.5 V 0V 1.5 V 1.5 V VOL tPLH tPHL VOH Output 1.5 V 1.5 V VOL 1.5 V 0V tPLZ Output Waveform 1 S1 at 7 V (see Note B) VOH Output 1.5 V tPZL tPHL tPLH 1.5 V Output Waveform 2 S1 at Open (see Note B) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS 1.5 V 3.5 V VOL + 0.3 V VOL tPHZ tPZH 1.5 V VOH – 0.3 V VOH ≈0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 PACKAGE OPTION ADDENDUM www.ti.com 14-Jun-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) 5962-9321701Q2A ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 59629321701Q2A SNJ54ABT 273FK 5962-9321701QRA ACTIVE CDIP J 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9321701QR A SNJ54ABT273J 5962-9321701QSA ACTIVE CFP W 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9321701QS A SNJ54ABT273W SN74ABT273DBR ACTIVE SSOP DB 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 AB273 Samples SN74ABT273DBRG4 ACTIVE SSOP DB 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 AB273 Samples SN74ABT273DW ACTIVE SOIC DW 20 25 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 ABT273 Samples SN74ABT273DWR ACTIVE SOIC DW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 ABT273 Samples SN74ABT273DWRG4 ACTIVE SOIC DW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 ABT273 Samples SN74ABT273N ACTIVE PDIP N 20 20 RoHS & Green NIPDAU N / A for Pkg Type -40 to 85 SN74ABT273N Samples SN74ABT273NSR ACTIVE SO NS 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 ABT273 Samples SN74ABT273PW ACTIVE TSSOP PW 20 70 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 AB273 Samples SN74ABT273PWR ACTIVE TSSOP PW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 AB273 Samples SNJ54ABT273FK ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 59629321701Q2A SNJ54ABT 273FK SNJ54ABT273J ACTIVE CDIP J 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9321701QR A SNJ54ABT273J SNJ54ABT273W ACTIVE CFP W 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9321701QS A SNJ54ABT273W Addendum-Page 1 Samples Samples Samples Samples Samples Samples PACKAGE OPTION ADDENDUM www.ti.com 14-Jun-2022 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of