SN74ACT1071D

SN74ACT1071 10-BIT BUS-TERMINATION ARRAY WITH BUS-HOLD FUNCTION SCAS192 – D3994, MARCH 1992 – REVISED APRIL 1993 • • • • • • • D PACKAGE (TOP VIEW) Designed to Ensure Defined Voltage Levels on Floating Bus Lines in CMOS Systems Reduces Undershoot and Overshoot Caused By Line Reflections Repetitive Peak Forward Current . . . IFRM = 100 mA Inputs Are TTL-Voltage Compatible Low Power Consumption (Like CMOS) ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Center-Pin VCC and GND Configuration Minimizes High-Speed Switching Noise D1 D2 GND GND D3 D4 D5 1 14 2 13 3 12 4 11 5 10 6 9 7 8 D10 D9 D8 VCC VCC D7 D6 description This device is designed to terminate bus lines in CMOS systems. The integrated low-impedance diodes clamp the voltage of undershoots and overshoots caused by line reflections and ensure signal integrity. The device also contains a bus-hold function that consists of a CMOS-buffer stage with a high-resistance feedback path between its output and its input. The SN74ACT1071 prevents bus lines from floating without using pullup or pulldown resistors. The high-impedance inputs of these internal buffers are connected to the input terminals of the device. The feedback path on each internal buffer stage keeps a bus line tied to the bus holder at the last valid logic state generated by an active driver before the bus switches to the high-impedance state. The SN74ACT1071 is characterized for operation from – 40°C to 85°C. logic diagram, one of ten channels (positive logic) D1 VCC VCC 1 11 10 TG GND GND 3 4 Copyright  1993, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 4–1 SN74ACT1071 10-BIT BUS-TERMINATION ARRAY WITH BUS-HOLD FUNCTION SCAS192 – D3994, MARCH 1992 – REVISED APRIL 1993 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to VCC + 0.5 V Continuous input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 mA Positive-peak input clamp current, IIK (VI > VCC) (tw < 1 µs, duty cycle < 20%) . . . . . . . . . . . . . . . . . 100 mA Negative-peak input clamp current, IIK (VI < 0) (tw < 1 µs, duty cycle < 20%) . . . . . . . . . . . . . . . . . . –100 mA Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The input negative-voltage rating may be exceeded if the input clamp-current rating is observed. recommended operating conditions MIN MAX VCC VIH Supply voltage 4.5 5.5 High-level input voltage 2.5 VIL VI Low-level input voltage TA Operating free-air temperature Input voltage UNIT V V 0 – 40 0.8 V VCC 85 °C V electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IIL IIH VCC = 4.5 to 5.5 V, VCC = 4.5 to 5.5 V, VIKL VIKH ICC‡ IIN = –18 mA IIN = 18 mA ∆ICC§ Ci VCC = 5.5 V, One input at 3.4 V, VI = 0.8 V VI = 2.5 V MIN TA = 25°C TYP† MAX MIN MAX 0.15 0.3 0.9 0.1 1 mA – 0.2 – 0.5 –1.4 – 0.15 –1.5 mA –1.5 –1.5 V VCC + 2 4 VCC + 2 40 µA Inputs open Other inputs at VCC or GND 0.9 VI = VCC or GND 3 † All typical values are at VCC = 5 V. ‡ Inputs may be set high or low prior to the ICC measurement. § This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC. 4–2 POST OFFICE BOX 655303 UNIT • DALLAS, TEXAS 75265 1 V mA pF SN74ACT1071 10-BIT BUS-TERMINATION ARRAY WITH BUS-HOLD FUNCTION SCAS192 – D3994, MARCH 1992 – REVISED APRIL 1993 TYPICAL CHARACTERISTICS FORWARD CURRENT vs INPUT VOLTAGE (LOWER CLAMPING DIODE) 60 5 55 0 50 –5 I F – Forward Current – mA I F – Forward Current – mA FORWARD CURRENT vs INPUT VOLTAGE (UPPER CLAMPING DIODE) 45 40 35 30 25 20 – 10 – 15 – 20 – 25 – 30 – 35 – 40 15 – 45 10 – 50 5 – 55 0 5.5 6 6.5 7 8 7.5 8.5 – 60 –2 9 –1.75 –1.5 –1.25 VI – Input Voltage – V Figure 1 0 Figure 2 INPUT CURRENT vs INPUT VOLTAGE SUPPLY CURRENT vs INPUT VOLTAGE 1 5 0.8 4.5 0.6 4 I CC – Supply Current – mA I I – Input Current – mA –1 – 0.75 – 0.5 – 0.25 VI – Input Voltage – V 0.4 0.2 0 – 0.2 – 0.4 3.5 3 2.5 2 1.5 – 0.6 1 – 0.8 0.5 0 –1 0 1 2 3 4 5 6 0 0.5 VI – Input Voltage – V 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 VI – Input Voltage – V Figure 3 Figure 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 4–3 SN74ACT1071 10-BIT BUS-TERMINATION ARRAY WITH BUS-HOLD FUNCTION SCAS192 – D3994, MARCH 1992 – REVISED APRIL 1993 APPLICATION INFORMATION The SN74ACT1071 terminates the output of a driving device and holds the input of the driven device at the logic level of the driver output prior to establishment of the high-impedance state on that output (see Figure 5). Bus Typical Output Input CMOS Input D1 (external connection point) VCC 10 11 1 SN74ACT1071 3 4 GND Figure 5. Bus-Hold Application 4–4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Output PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) SN74ACT1071D ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 ACT1071 SN74ACT1071DR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 ACT1071 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of