SN74ACT240DBRG4

SN54ACT240, SN74ACT240 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCAS515C − JUNE 1995 − REVISED OCTOBER 2002 D 4.5-V to 5.5-V VCC Operation D Inputs Accept Voltages to 5.5 V D Max tpd of 8.5 ns at 5 V D Inputs Are TTL Compatible 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC 2OE 1Y1 2A4 1Y2 2A3 1Y3 2A2 1Y4 2A1 1A2 2Y3 1A3 2Y2 1A4 2OE 1 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 1Y1 2A4 1Y2 2A3 1Y3 2Y1 GND 2A1 1Y4 2A2 1OE 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 GND SN54ACT240 . . . FK PACKAGE (TOP VIEW) 2Y4 1A1 1OE VCC SN54ACT240 . . . J OR W PACKAGE SN74ACT240 . . . DB, DW, N, NS, OR PW PACKAGE (TOP VIEW) description/ordering information These octal buffers and line drivers are designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’ACT240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. ORDERING INFORMATION PDIP − N −55°C to 125°C † TOP-SIDE MARKING Tube SN74ACT240N Tube SN74ACT240DW Tape and reel SN74ACT240DWR SOP − NS Tape and reel SN74ACT240NSR ACT240 SSOP − DB Tape and reel SN74ACT240DBR AD240 TSSOP − PW Tape and reel SN74ACT240PWR AD240 CDIP − J Tube SNJ54ACT240J SNJ54ACT240J CFP − W Tube SNJ54ACT240W SNJ54ACT240W LCCC − FK Tube SNJ54ACT240FK SNJ54ACT240FK SOIC − DW −40°C 40°C to 85°C ORDERABLE PART NUMBER PACKAGE† TA SN74ACT240N ACT240 Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright © 2002, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54ACT240, SN74ACT240 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCAS515C − JUNE 1995 − REVISED OCTOBER 2002 FUNCTION TABLE (each buffer) INPUTS OE A OUTPUT Y L H L L L H H X Z logic diagram (positive logic) 1OE 1A1 1A2 1A3 1A4 1 2OE 2 18 4 16 6 14 8 12 1Y1 2A1 1Y2 2A2 1Y3 2A3 1Y4 2A4 19 11 9 13 7 15 5 17 3 2Y1 2Y2 2Y3 2Y4 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±200 mA Package thermal impedance, θJA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54ACT240, SN74ACT240 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCAS515C − JUNE 1995 − REVISED OCTOBER 2002 recommended operating conditions (see Note 3) SN54ACT240 SN74ACT240 MIN MAX MIN MAX 4.5 5.5 4.5 5.5 UNIT VCC Supply voltage VIH High-level input voltage VIL Low-level input voltage 0.8 V VI Input voltage 0 VCC 0 VCC V VO Output voltage 0 VCC 0 VCC V IOH High-level output current −24 −24 mA IOL Low-level output current 24 24 mA Δt/Δv Input transition rise or fall rate 8 ns/V TA Operating free-air temperature 85 °C 2 2 0.8 8 −55 125 −40 V V NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = −50 50 μA A VOH IOH = −24 24 mA 4.4 4.49 4.4 5.5 V 5.4 5.49 5.4 5.4 4.5 V 3.86 3.7 3.76 5.5 V 4.86 4.7 4.76 5.5 V VI = VCC or GND VI = VCC or GND, ΔICC‡ One input at 3.4 V, Other inputs at GND or VCC Ci Co IO = 0 MAX UNIT 4.4 V 3.85 3.85 0.1 0.1 0.001 0.1 0.1 0.1 4.5 V 0.36 0.5 0.44 5.5 V 0.36 0.5 0.44 5.5 V ICC MIN 0.001 5.5 V II MAX 5.5 V mA† VO = VCC or GND MIN 4.5 V IOL = 50 mA† IOL = 75 MAX SN74ACT240 4.5 V 5.5 V IOZ SN54ACT240 TYP IOH = −75 mA† IOL = 24 mA TA = 25°C MIN IOH = −50 mA† IOL = 50 μA A VOL VCC 0.1 V 1.65 1.65 5.5 V ±0.25 ±5 ±2.5 μA 5.5 V ±0.1 5.5 V 4 ±1 ±1 μA 80 40 μA 1.6 1.5 mA 5.5 V 0.6 VI = VCC or GND 5V 2.5 pF VI = VCC or GND 5V 8 pF † Not more than one output should be tested at a time, and the duration of the test should not exceed 2 ms. ‡ This is the increase in supply current for each input that is at one of the specified TTL voltage levels, rather than 0 V or V . CC POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN54ACT240, SN74ACT240 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCAS515C − JUNE 1995 − REVISED OCTOBER 2002 switching characteristics over recommended operating VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER tPLH tPHL tPZH tPZL tPHZ tPLZ FROM (INPUT) TO (OUTPUT) A Y OE Y OE Y free-air TA = 25°C MIN temperature SN54ACT240 range, SN74ACT240 TYP MAX MIN MAX MIN MAX 1.5 6 8.5 1 9.5 1.5 9.5 1.5 5.5 7.5 1 9 1.5 8.5 1.5 7 8.5 1 10 1 9.5 2 7 9.5 1 11.5 1.5 10.5 2 8 9.5 1 11 2 10.5 2.5 6.5 10 1 11.5 2 10.5 UNIT ns ns ns operating characteristics, VCC = 5 V, TA = 25°C PARAMETER Cpd TEST CONDITIONS Power dissipation capacitance per buffer/driver CL = 50 pF, TYP f = 1 MHz 45 UNIT pF PARAMETER MEASUREMENT INFORMATION 2 × VCC S1 500 Ω From Output Under Test CL = 50 pF (see Note A) Open 500 Ω LOAD CIRCUIT Output Control (low-level enabling) 3V Input 1.5 V 1.5 V 0V tPLH tPHL 50% VCC S1 Open 2 × VCC Open 3V 1.5 V 50% VCC VOL 1.5 V 0V tPZL tPLZ Output Waveform 1 S1 at 2 × VCC (see Note B) ≈VCC 50% VCC tPZH VOH Output TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH VOL tPHZ Output Waveform 2 S1 at Open (see Note B) VOLTAGE WAVEFORMS VOL + 0.3 V 50% VCC VOH − 0.3 V VOH ≈0 V VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time with one input transition per measurement. Figure 1. Load Circuit and Voltage Waveforms 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) 5962-8775901M2A ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 59628775901M2A SNJ54ACT 240FK 5962-8775901MRA ACTIVE CDIP J 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-8775901MR A SNJ54ACT240J 5962-8775901MSA ACTIVE CFP W 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-8775901MS A SNJ54ACT240W SN74ACT240DBR ACTIVE SSOP DB 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 AD240 Samples SN74ACT240DW ACTIVE SOIC DW 20 25 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 ACT240 Samples SN74ACT240DWR ACTIVE SOIC DW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 ACT240 Samples SN74ACT240N ACTIVE PDIP N 20 20 RoHS & Green NIPDAU N / A for Pkg Type -40 to 85 SN74ACT240N Samples SN74ACT240NSR ACTIVE SO NS 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 ACT240 Samples SN74ACT240PW ACTIVE TSSOP PW 20 70 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 AD240 Samples SN74ACT240PWG4 ACTIVE TSSOP PW 20 70 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 AD240 Samples SN74ACT240PWR ACTIVE TSSOP PW 20 2000 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 85 AD240 Samples SN74ACT240PWRG4 ACTIVE TSSOP PW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 AD240 Samples SNJ54ACT240FK ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 59628775901M2A SNJ54ACT 240FK SNJ54ACT240J ACTIVE CDIP J 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-8775901MR A SNJ54ACT240J SNJ54ACT240W ACTIVE CFP W 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-8775901MS A SNJ54ACT240W Addendum-Page 1 Samples Samples Samples Samples Samples Samples PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of