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SN74AHC02QPWRQ1

SN74AHC02QPWRQ1

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    TSSOP14

  • 描述:

    IC GATE NOR 4CH 2-INP 14TSSOP

  • 数据手册
  • 价格&库存
SN74AHC02QPWRQ1 数据手册
        SCLS524B − AUGUST 2003 − REVISED APRIL 2008  Qualified for Automotive Applications  ESD Protection Exceeds 1000 V Per  PW PACKAGE (TOP VIEW) MIL-STD-883, Method 3015; Exceeds 150 V Using Machine Model (C = 200 pF, R = 0) Operating Range 2-V to 5.5-V VCC 1Y 1A 1B 2Y 2A 2B GND description/ordering information The SN74AHC02 contains four independent 2-input NOR gates that perform the Boolean function Y = A  B or Y = A + B in positive logic. 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4Y 4B 4A 3Y 3B 3A ORDERING INFORMATION{ ORDERABLE PART NUMBER PACKAGE‡ TA TOP-SIDE MARKING −40°C to 125°C TSSOP − PW Tape and reel SN74AHC02QPWRQ1 AHC02Q1 † For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at http://www.ti.com. ‡ Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging. FUNCTION TABLE (each gate) INPUTS A B OUTPUT Y H X L X H L L L H logic diagram (positive logic) 1A 1B 2A 2B 2 1 3 1Y 3A 3B 5 4 6 2Y 4A 4B 8 10 9 11 12 13 3Y 4Y Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright  2008, Texas Instruments Incorporated     ! "#$ !  %#&'" ($) (#"! "  !%$""! %$ *$ $!  $+! !#$! !(( ,-) (#" %"$!!. ($!  $"$!!'- "'#($ $!.  '' %$$!) POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1         SCLS524B − AUGUST 2003 − REVISED APRIL 2008 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Package thermal impedance, θJA (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 3) VCC VIH Supply voltage VCC = 2 V VCC = 3 V High-level input voltage VCC = 5.5 V VCC = 2 V VIL VI VO IOH ∆t/∆v MAX 2 5.5 Low-level input voltage Input voltage Output voltage VCC = 2 V VCC = 3.3 V ± 0.3 V High-level output current Low-level output current Input transition rise or fall rate UNIT V 1.5 2.1 V 3.85 0.5 VCC = 3 V VCC = 5.5 V VCC = 5 V ± 0.5 V VCC = 2 V IOL MIN 0.9 V 1.65 0 5.5 V 0 VCC −50 mA V −4 −8 50 VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V 4 VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V 100 8 20 mA mA mA ns/V TA Operating free-air temperature −40 125 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265         SCLS524B − AUGUST 2003 − REVISED APRIL 2008 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = −50 mA VOH IOH = −4 mA IOH = −8 mA IOL = 50 mA VOL IOL = 4 mA IOL = 8 mA II ICC VI = 5.5 V or GND VI = VCC or GND, Ci VI = VCC or GND IO = 0 VCC MIN TA = 25°C TYP MAX MIN 2V 1.9 2 1.9 3V 2.9 3 2.9 4.5 V 4.4 4.5 4.4 3V 2.58 4.5 V 3.94 MAX UNIT V 2.48 3.8 2V 0.1 0.1 3V 0.1 0.1 4.5 V 0.1 0.1 V 3V 0.36 0.5 4.5 V 0.36 0.5 0 V to 5.5 V ±0.1 ±1 mA 2 20 mA 5.5 V 5V 4 10 pF switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE tPLH tPHL A or B Y CL = 15 pF tPLH tPHL A or B Y CL = 50 pF MIN TA = 25°C TYP MAX MIN MAX 5.6 7.9 1 9.5 5.6 7.9 1 9.5 8.1 11.4 1 13 8.1 11.4 1 13 MIN MAX UNIT ns ns switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE tPLH tPHL A or B Y CL = 15 pF tPLH tPHL A or B Y CL = 50 pF MIN TA = 25°C TYP MAX 3.6 5.5 1 6.5 3.6 5.5 1 6.5 5.1 7.5 1 8.5 5.1 7.5 1 8.5 MIN MAX UNIT ns ns noise characteristics, VCC = 5 V, CL = 50 pF, TA = 25°C (see Note 4) PARAMETER UNIT VOL(P) VOL(V) Quiet output, maximum dynamic VOL 0.8 V Quiet output, minimum dynamic VOL −0.8 V VOH(V) VIH(D) Quiet output, minimum dynamic VOH 4.9 High-level dynamic input voltage 3.5 VIL(D) Low-level dynamic input voltage NOTE 4: Characteristics are for surface-mount packages only. POST OFFICE BOX 655303 V V 1.5 • DALLAS, TEXAS 75265 V 3         SCLS524B − AUGUST 2003 − REVISED APRIL 2008 operating characteristics, VCC = 5 V, TA = 25°C PARAMETER Cpd TEST CONDITIONS Power dissipation capacitance No load, TYP f = 1 MHz UNIT 15 pF PA RAMETER MEASUREMENT INFORMATION From Output Under Test RL = 1 kΩ From Output Under Test Test Point S1 VCC Open TEST GND CL (see Note A) CL (see Note A) S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Drain Open VCC GND VCC LOAD CIRCUIT FOR 3-STATE AND OPEN-DRAIN OUTPUTS LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS VCC 50% VCC Timing Input tw tsu VCC Input 50% VCC 50% VCC 0V th VCC 50% VCC Data Input 50% VCC 0V 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATION VCC 50% VCC Input 50% VCC 0V tPLH In-Phase Output tPHL 50% VCC tPHL Out-of-Phase Output VOH 50% VCC VOL VCC Output Control Output Waveform 1 S1 at VCC (see Note B) 50% VCC 0V tPZL VOH 50% VCC VOL tPLZ ≈VCC 50% VCC tPZH tPLH 50% VCC 50% VCC Output Waveform 2 S1 at GND (see Note B) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS VOL + 0.3 V VOL tPHZ 50% VCC VOH − 0.3 V VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns. D. The outputs are measured one at a time with one input transition per measurement. E. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) SN74AHC02QPWRG4Q1 ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AHC02Q1 SN74AHC02QPWRQ1 ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AHC02Q1 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
SN74AHC02QPWRQ1 价格&库存

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