SN74AHC1G04QDCKRQ1

SN74AHC1G04-Q1 SINGLE INVERTER GATE SCLS540A − AUGUST 2003 − REVISED APRIL 2008 D Qualified for Automotive Applications D ESD Protection Exceeds JESD 22 D D ±8-mA Output Drive at 5 V D Latch-Up Performance Exceeds 250 mA Per − 1500-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) − 1000-V Charged-Device Model (C101) Operating Range of 2 V to 5.5 V JESD 17 DBV OR DCK PACKAGE (TOP VIEW) NC A GND description/ordering information The SN74AHC1G04 contains one inverter gate. The device performs the Boolean function Y = A. 1 5 VCC 4 Y 2 3 NC − No internal connection ORDERING INFORMATION{ −40°C 40°C to 125°C ORDERABLE PART NUMBER PACKAGE‡ TA TOP-SIDE MARKING§ SOT (SOT-23) − DBV Reel of 3000 SN74AHC1G04QDBVRQ1 A04_ SOT (SC-70) − DCK Reel of 3000 SN74AHC1G04QDCKRQ1 AC_ † For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at http://www.ti.com. ‡ Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging. § The actual top-side marking has one additional character that designates the wafer fab / assembly site. FUNCTION TABLE INPUT A OUTPUT Y H L L H logic diagram (positive logic) A 2 4 Y Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright  2008, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN74AHC1G04-Q1 SINGLE INVERTER GATE SCLS540A − AUGUST 2003 − REVISED APRIL 2008 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Package thermal impedance, θJA (see Note 2): DBV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206°C/W DCK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 252°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 3) VCC VIH Supply voltage High-level High level input voltage Low-level Low level input voltage MAX 2 5.5 VCC = 2 V 1.5 VCC = 3 V 2.1 VCC = 5.5 V VIL MIN UNIT V V 3.85 VCC = 2 V 0.5 VCC = 3 V 0.9 VCC = 5.5 V V 1.65 VI Input voltage 0 5.5 V VO Output voltage 0 VCC V −50 mA IOH High-level High level output current VCC = 2 V IOL Low-level Low level output current ∆t/∆v Input transition rise or fall rate TA Operating free-air temperature VCC = 3.3 V ± 0.3 V −4 VCC = 5 V ± 0.5 V −8 VCC = 2 V 50 VCC = 3.3 V ± 0.3 V 4 VCC = 5 V ± 0.5 V 8 VCC = 3.3 V ± 0.3 V mA mA mA 100 VCC = 5 V ± 0.5 V 20 −40 125 ns/V °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN74AHC1G04-Q1 SINGLE INVERTER GATE SCLS540A − AUGUST 2003 − REVISED APRIL 2008 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC TA = 25°C TYP 2V 1.9 2 1.9 3V 2.9 3 2.9 4.5 V 4.4 4.5 4.4 IOH = −4 mA 3V 2.58 IOH = −8 mA 4.5 V 3.94 IOH = −50 50 mA VOH IOL = 50 mA MAX MIN MIN MAX UNIT V 2.48 3.8 2V 0.1 0.1 3V 0.1 0.1 4.5 V 0.1 0.1 IOL = 4 mA 3V 0.36 0.5 IOL = 8 mA 4.5 V 0.36 0.5 0 V to 5.5 V ±0.1 ±1 mA 1 20 mA 10 10 pF VOL II VI = 5.5 V or GND ICC VI = VCC or GND, Ci VI = VCC or GND IO = 0 5.5 V 5V 2 V switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1) PARAMETER tPLH tPHL FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE A Y CL = 50 pF TA = 25°C MIN MIN MAX 10.6 1 14.5 10.6 1 14.5 TYP MAX 7.5 7.5 UNIT ns switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER tPLH tPHL FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE A Y CL = 50 pF TA = 25°C MIN MIN MAX 7.5 1 10 7.5 1 10 TYP MAX 5.3 5.3 UNIT ns operating characteristics, VCC = 5 V, TA = 25°C PARAMETER Cpd TEST CONDITIONS Power dissipation capacitance No load, POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 f = 1 MHz TYP 12 UNIT pF 3 SN74AHC1G04-Q1 SINGLE INVERTER GATE SCLS540A − AUGUST 2003 − REVISED APRIL 2008 PARAMETER MEASUREMENT INFORMATION VCC From Output Under Test RL = 1 kΩ From Output Under Test Test Point S1 Open TEST GND CL (see Note A) CL (see Note A) S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Drain Open VCC GND VCC LOAD CIRCUIT FOR 3-STATE AND OPEN-DRAIN OUTPUTS LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS VCC 50% VCC Timing Input tw tsu VCC 50% VCC 50% VCC Input 0V th VCC 50% VCC Data Input 50% VCC 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VCC 50% VCC Input 50% VCC 0V tPLH tPHL VOH In-Phase Output 50% VCC tPHL Out-of-Phase Output 50% VCC VOL Output Waveform 1 S1 at VCC (see Note B) VOH 50% VCC VOL 50% VCC tPLZ ≈VCC 50% VCC Output Waveform 2 S1 at GND (see Note B) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS 50% VCC 0V tPZL tPZH tPLH 50% VCC VCC Output Control VOL + 0.3 V VOL tPHZ 50% VCC VOH − 0.3 V VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns. D. The outputs are measured one at a time with one input transition per measurement. E. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) 1A1G04QDBVRG4Q1 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 A04S CAHC1G04QDCKRG4Q1 ACTIVE SC70 DCK 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 (ACS, ACU) SN74AHC1G04QDBVRQ1 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 A04S SN74AHC1G04QDCKRQ1 ACTIVE SC70 DCK 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 ACS (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of