SN74AHC245-EP
OCTAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCLS487A – MAY 2003 – REVISED JUNE 2003
D
D
D
D
D
D
D
D
DW OR PW PACKAGE
(TOP VIEW)
Controlled Baseline
– One Assembly/Test Site, One Fabrication
Site
Extended Temperature Performance of
–55°C to 125°C
Enhanced Diminishing Manufacturing
Sources (DMS) Support
Enhanced Product-Change Notification
Qualification Pedigree†
Operating Range 2-V to 5.5-V VCC
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds 1000 V Per
MIL-STD-833, Method 3015; Exceeds 100 V
Using Machine Model (C = 200 pF, R = 0)
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
VCC
OE
B1
B2
B3
B4
B5
B6
B7
B8
† Component qualification in accordance with JEDEC and industry
standards to ensure reliable operation over an extended
temperature range. This includes, but is not limited to, Highly
Accelerated Stress Test (HAST) or biased 85/85, temperature
cycle, autoclave or unbiased HAST, electromigration, bond
intermetallic life, and mold compound life. Such qualification
testing should not be viewed as justifying use of this component
beyond specified performance and environmental limits.
description/ordering information
The SN74AHC245 octal bus transceiver is designed for asynchronous two-way communication between data
buses. The control-function implementation minimizes external timing requirements.
This device allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on
the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the
device so that the buses effectively are isolated.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
PACKAGE‡
TA
–55°C
55°C to 125°C
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
SOIC – DW
Tape and reel
SN74AHC245MDWREP
AHC245MEP
TSSOP – PW
Tape and reel
SN74AHC245MPWREP
AHC245EP
‡ Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SN74AHC245-EP
OCTAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCLS487A – MAY 2003 – REVISED JUNE 2003
FUNCTION TABLE
(each transceiver)
INPUTS
OE
DIR
OPERATION
L
L
B data to A bus
L
H
A data to B bus
H
X
Isolation
logic symbol†
19
OE
1
DIR
2
A1
G3
3 EN1 [BA]
3 EN2 [AB]
18
1
B1
2
A2
A3
A4
A5
A6
A7
A8
3
17
4
16
5
15
6
14
7
13
8
12
9
11
B2
B3
B4
B5
B6
B7
B8
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
DIR
1
19
A1
2
18
To Seven Other Channels
2
OE
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
B1
SN74AHC245-EP
OCTAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCLS487A – MAY 2003 – REVISED JUNE 2003
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Input voltage range, VI (see Note 1): Control inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
I/O, output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0): Control inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –20 mA
I/O, output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±75 mA
Package thermal impedance, θJA (see Note 2): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
VCC
VIH
Supply voltage
VCC = 2 V
VCC = 3 V
High-level input voltage
VCC = 5.5 V
VCC = 2 V
MIN
MAX
2
5.5
UNIT
V
1.5
V
2.1
3.85
0.5
VIL
Low-level input voltage
VCC = 3 V
VCC = 5.5 V
VI
VO
Input voltage
OE or DIR
0
5.5
V
Output voltage
A or B
0
V
IOH
High-level output current
VCC = 2 V
VCC = 3.3 V ± 0.3 V
VCC = 5 V ± 0.5 V
VCC
–50
IOL
∆t/∆v
Low-level output current
Input transition rise or fall rate
0.9
V
1.65
–4
–8
VCC = 2 V
VCC = 3.3 V ± 0.3 V
VCC = 5 V ± 0.5 V
50
VCC = 3.3 V ± 0.3 V
VCC = 5 V ± 0.5 V
100
4
8
20
mA
mA
mA
mA
ns/V
TA
Operating free-air temperature
–55
125
°C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
SN74AHC245-EP
OCTAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCLS487A – MAY 2003 – REVISED JUNE 2003
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
IOH = –50 mA
VOH
IOH = –4 mA
IOH = –8 mA
IOL = 50 mA
VOL
IOL = 4 mA
IOL = 8 mA
A or B inputs
II
OE or DIR
VI = 5.5
5 5 V or GND
IOZ†
VO = VCC or GND,
VI (OE) = VIL or VIH
ICC
VI = VCC or GND,
Ci
OE or DIR
Cio
A or B inputs
IO = 0
VI = VCC or GND
VI = VCC or GND
† The parameter IOZ includes the input leakage current.
MIN
TA = 25°C
TYP
MAX
MIN
2V
1.9
2
1.9
3V
2.9
3
2.9
4.5 V
4.4
4.5
4.4
3V
2.58
4.5 V
3.94
VCC
UNIT
V
2.48
3.8
2V
0.1
0.1
3V
0.1
0.1
4.5 V
0.1
0.1
3V
0.36
0.5
4.5 V
0.36
0.5
5.5 V
±0.1
±1
0 V to 5.5 V
±0.1
±1
5.5 V
±0.25
±2.5
mA
5.5 V
4
40
mA
5V
2.5
5V
4
switching characteristics over recommended operating
VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
4
MAX
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
tPLH
tPHL
A or B
B or A
CL = 15 pF
tPZH
tPZL
OE
A or B
CL = 15 pF
tPHZ
tPLZ
OE
A or B
CL = 15 pF
tPLH
tPHL
A or B
B or A
CL = 50 pF
tPZH
tPZL
OE
A or B
CL = 50 pF
tPHZ
tPLZ
OE
A or B
CL = 50 pF
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
free-air
MIN
10
V
mA
pF
pF
temperature
TA = 25°C
TYP
MAX
MIN
MAX
5.8
8.4
1
10
5.8
8.4
1
10
8.5
13.2
1
15.5
8.5
13.2
1
15.5
8.9
12.5
1
15.5
8.9
12.5
1
15.5
8.3
11.9
1
13.5
8.3
11.9
1
13.5
11
16.7
1
19
11
16.7
1
19
11.5
15.8
1
18
11.5
15.8
1
18
range,
UNIT
ns
ns
ns
ns
ns
ns
SN74AHC245-EP
OCTAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCLS487A – MAY 2003 – REVISED JUNE 2003
switching characteristics over recommended operating
VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
tPLH
tPHL
A or B
B or A
CL = 15 pF
tPZH
tPZL
OE
A or B
CL = 15 pF
tPHZ
tPLZ
OE
A or B
CL = 15 pF
tPLH
tPHL
A or B
B or A
CL = 50 pF
tPZH
tPZL
OE
A or B
CL = 50 pF
tPHZ
tPLZ
OE
A or B
CL = 50 pF
free-air
MIN
temperature
TA = 25°C
TYP
MAX
MIN
MAX
4
5.5
1
6.5
4
5.5
1
6.5
5.8
8.5
1
10
5.8
8.5
1
10
5.6
7.8
1
9.2
5.6
7.8
1
9.2
5.5
7.5
1
8.5
5.5
7.5
1
8.5
7.3
10.6
1
12
7.3
10.6
1
12
7
9.7
1
11
7
9.7
1
11
MIN
TYP
MAX
range,
UNIT
ns
ns
ns
ns
ns
ns
noise characteristics, VCC = 5 V, CL = 50 pF, TA = 25°C (see Note 4)
PARAMETER
UNIT
VOL(P)
VOL(V)
Quiet output, maximum dynamic VOL
0.9
V
Quiet output, minimum dynamic VOL
–0.9
V
VOH(V)
VIH(D)
Quiet output, minimum dynamic VOH
4.3
V
High-level dynamic input voltage
3.5
VIL(D)
Low-level dynamic input voltage
NOTE 4: Characteristics are for surface-mount packages only.
V
1.5
V
TYP
UNIT
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER
Cpd
TEST CONDITIONS
Power dissipation capacitance
No load,
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
f = 1 MHz
14
pF
5
SN74AHC245-EP
OCTAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCLS487A – MAY 2003 – REVISED JUNE 2003
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
RL = 1 kΩ
From Output
Under Test
Test
Point
S1
VCC
Open
TEST
GND
CL
(see Note A)
CL
(see Note A)
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open Drain
Open
VCC
GND
VCC
LOAD CIRCUIT FOR
3-STATE AND OPEN-DRAIN OUTPUTS
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
VCC
50% VCC
Timing Input
tw
tsu
VCC
Input
50% VCC
50% VCC
0V
th
VCC
50% VCC
Data Input
50% VCC
0V
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
VCC
50% VCC
Input
50% VCC
0V
tPLH
In-Phase
Output
tPHL
50% VCC
tPHL
Out-of-Phase
Output
VOH
50% VCC
VOL
VCC
Output
Control
Output
Waveform 1
S1 at VCC
(see Note B)
50% VCC
0V
tPZL
VOH
50% VCC
VOL
tPLZ
≈VCC
50% VCC
tPZH
tPLH
50% VCC
50% VCC
Output
Waveform 2
S1 at GND
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOL + 0.3 V
VOL
tPHZ
50% VCC
VOH – 0.3 V
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns.
D. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
SN74AHC245MDWREP
ACTIVE
SOIC
DW
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-55 to 125
AHC245MEP
SN74AHC245MPWREP
ACTIVE
TSSOP
PW
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-55 to 125
AHC245EP
V62/03650-01XE
ACTIVE
TSSOP
PW
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-55 to 125
AHC245EP
V62/03650-01YE
ACTIVE
SOIC
DW
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-55 to 125
AHC245MEP
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of