SN74AHC74PWR

SN54AHC74, SN74AHC74 www.ti.com SCLS255K – DECEMBER 1995 – REVISED DECEMBER 2013 Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and Preset Check for Samples: SN54AHC74, SN74AHC74 FEATURES DESCRIPTION • • The ’AHC74 dual positive-edge-triggered devices are D-type flip-flops. 1 • Operating Range 2-V to 5.5-V VCC Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1995–2013, Texas Instruments Incorporated SN54AHC74, SN74AHC74 SCLS255K – DECEMBER 1995 – REVISED DECEMBER 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Table 1. Function Table (Each Flip-Flop) INPUTS (1) 2 OUTPUTS PRE CLR CLK D Q Q L H X X H L H L X X L H L L X X H (1) H (1) H H ↑ H H L H H ↑ L L H H H L X Q0 Q0 This configuration is unstable; that is, it does not persist when PRE or CLR returns to its inactive (high) level. Submit Documentation Feedback Copyright © 1995–2013, Texas Instruments Incorporated Product Folder Links: SN54AHC74 SN74AHC74 SN54AHC74, SN74AHC74 www.ti.com SCLS255K – DECEMBER 1995 – REVISED DECEMBER 2013 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) UNIT Supply voltage range, VCC –0.5 V to 7 V Input voltage range, VI ( (2)) –0.5 V to 7 V Output voltage range, VO ( (2)) –0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0) –20 mA Output clamp current, IOK (VO < 0 or VO > VCC) ±20 mA Continuous output current, IO (VO = 0 to VCC) ±25 mA Continuous current through VCC or GND ±50 mA D package Package thermal impedance, ΘJA 86°C/W DB package (3) 96°C/W DGV package (3) 127°C/W N package (3) 80°C/W NS package (3) 76°C/W PW package (3) 113°C/W RGY package (4) 47°C/W Storage temperature range, Tstg (1) (2) (3) (4) –65°C to 150°C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. The package thermal impedance is calculated in accordance with JESD 51-7. The package thermal impedance is calculated in accordance with JESD 51-5. Recommended Operating Conditions (1) SN54AHC74 VCC Supply voltage VCC = 2 V VIH High-level input voltage VCC = 3V VCC = 5.5 V VIL Low-level input voltage MAX 2 5.5 1.5 MIN MAX 2 5.5 UNIT V 1.5 2.1 2.1 3.85 3.85 V VCC = 2 V 0.5 VCC = 3 V 0.9 0.9 1.65 1.65 VCC = 5.5 V 0.5 V VI Input voltage 0 5.5 0 5.5 VO Output voltage 0 VCC 0 VCC V –50 –50 µA VCC = 3.3 V ± 0.3 V –4 –4 VCC = 5 V ± 0.5 V –8 –8 VCC = 2 V VCC = 2 V IOH IOL (1) SN74AHC74 MIN High-level output current Low-level output current Δt/Δv Input transition rise or fall rate TA Operating free-air temperature 50 50 VCC = 3.3 V ± 0.3 V 4 4 VCC = 5 V ± 0.5 V 8 8 100 100 20 20 VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V –55 125 –40 V mA µA mA ns/V 125 °C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. Copyright © 1995–2013, Texas Instruments Incorporated Product Folder Links: SN54AHC74 SN74AHC74 Submit Documentation Feedback 3 SN54AHC74, SN74AHC74 SCLS255K – DECEMBER 1995 – REVISED DECEMBER 2013 www.ti.com Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS 2V 1.9 2 1.9 1.9 1.9 3V 2.9 3 2.9 2.9 2.9 4.5 V 4.4 4.5 4.4 4.4 4.4 IOH = -4 mA 3V 2.58 2.48 2.48 2.48 IOH = -8 mA 4.5 V 3.94 (1) VI = VCC or GND 3.8 MIN UNIT MAX V 3.8 0.1 0.1 3V 0.1 0.1 0.1 0.1 4.5 V 0.1 0.1 0.1 0.1 3V 0.36 0.5 0.44 0.5 4.5 V 0.36 0.5 0.44 0.5 0 V to 5.5 V ±0.1 ±1 (1) ±1 ±1 µA 2 20 20 20 µA IOH = 8 mA Ci 3.8 MAX 0.1 IOL = 4 mA ICC MIN 0.1 VOL VI = VCC or GND, MAX 2V IOL = 50 mA VI = 5.5 V or GND MIN –40°C to 125°C SN74AHC74 TYP VOH MAX –40°C to 85°C SN74AHC74 MIN IOH = -50 mA II –55°C to 125°C SN54AHC74 TA = 25°C VCC IO = 0 5.5 V 5V 2 10 10 V pF On products compliant to MIL-PRF-38535, this parameter is not production tested at VCC = 0 V. Timing Requirements over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1) TA = 25°C MIN tw Pulse duration tsu Setup time before CLK↑ th Hold time, data after CLK↑ MAX SN54AHC74 MIN MAX –40°C to 85°C SN74AHC74 MIN MAX –40°C to 125°C SN74AHC74 MIN PRE or CLR low 6 7 7 7 CLK 6 7 7 7 Data 6 7 7 7 PRE or CLR inactive 5 5 5 5 0.5 0.5 0.5 0.5 UNIT MAX ns ns ns Timing Requirements over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) TA = 25°C MIN tw Pulse duration tsu Setup time before CLK↑ th Hold time, data after CLK↑ 4 MAX SN54AHC74 MIN MAX –40°C to 85°C SN74AHC74 MIN MAX –40°C to 125°C SN74AHC74 MIN PRE or CLR low 5 5 5 5 CLK 5 5 5 5 Data 5 5 5 5 PRE or CLR inactive 3 3 3 3 0.5 0.5 0.5 0.5 Submit Documentation Feedback UNIT MAX ns ns ns Copyright © 1995–2013, Texas Instruments Incorporated Product Folder Links: SN54AHC74 SN74AHC74 SN54AHC74, SN74AHC74 www.ti.com SCLS255K – DECEMBER 1995 – REVISED DECEMBER 2013 Switching Characteristics over recommended operating free-air temperature range, VCC = 3.3 V ± 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) fmax tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL (1) TA = 25°C LOAD CAPACITANCE MIN TYP CL = 15 pF 80 (1) 125 (1) CL = 50 pF 50 75 PRE or CLR Q or Q CL = 15 pF CLK Q or Q CL = 15 pF PRE or CLR Q or Q CL = 50 pF CLK Q or Q CL = 50 pF 7.6 –40°C to 85°C SN74AHC74 SN54AHC74 MAX MIN MAX 70 (1) 45 (1) 12.3 (1) 1 (1) 14.5 (1) MIN MAX –40°C to 125°C SN74AHC74 MIN 70 70 45 45 UNIT MAX MHz 1 14.5 1 14.5 7.6 12.3 1 (1) 14.5 (1) 1 14.5 1 14.5 6.7 11.9 1 (1) 14 (1) 1 14 1 14 6.7 11.9 1 (1) 14 (1) 1 14 1 14 10.1 15.8 1 18 1 18 1 18 10.1 15.8 1 18 1 18 1 18 9.2 15.4 1 17.5 1 17.5 1 17.5 9.2 15.4 1 17.5 1 17.5 1 17.5 ns ns ns ns On products compliant to MIL-PRF-38535, this parameter is not production tested. Switching Characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE fmax tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL (1) TA = 25°C SN54AHC74 MIN TYP 130 (1) 170 (1) 110 (1) 110 110 CL = 50 pF 90 115 75 75 75 Q or Q CL = 15 pF CLK Q or Q CL = 15 pF PRE or CLR Q or Q CL = 50 pF CLK Q or Q CL = 50 pF MIN MAX MIN MAX –40°C to 125°C SN74AHC74 CL = 15 pF PRE or CLR MAX –40°C to 85°C SN74AHC74 MIN MAX MHz 4.8 (1) 7.7 (1) 1 (1) 9 (1) 1 9 1 9 (1) (1) (1) 9 (1) 1 9 1 9 4.8 7.7 1 4.6 (1) 7.3 (1) 1 (1) 8.5 (1) 1 8.5 1 8.5 (1) (1) (1) 8.5 (1) 1 8.5 1 8.5 4.6 7.3 1 UNIT 6.3 9.7 1 11 1 11 1 11 6.3 9.7 1 11 1 11 1 11 6.1 9.3 1 10.5 1 10.5 1 10.5 6.1 9.3 1 10.5 1 10.5 1 10.5 ns ns ns ns On products compliant to MIL-PRF-38535, this parameter is not production tested. Noise Characteristics VCC = 5 V, CL = 50 pF, TA = 25°C (see (1) ) SN74AHCT74 PARAMETER MIN MAX UNIT VOL(P) Quiet output, maximum dynamic VOL 0.8 V VOL(V) Quiet output, minimum dynamic VOL –0.8 V VOH(V) Quiet output, minimum dynamic VOH 4.7 VIH(D) High-level dynamic input voltage 3.5 VIL(D) Low-level dynamic input voltage (1) V V 1.5 V Characteristics are for surface-mount packages only. Operating Characteristics VCC = 5 V, TA = 25°C PARAMETER Cpd TEST CONDITIONS Power dissipation capacitance No load, Copyright © 1995–2013, Texas Instruments Incorporated Product Folder Links: SN54AHC74 SN74AHC74 f = 1 MHz TYP 32 Submit Documentation Feedback UNIT pF 5 SN54AHC74, SN74AHC74 SCLS255K – DECEMBER 1995 – REVISED DECEMBER 2013 www.ti.com Figure 1. Load Circuit and Voltage Waveforms 6 Submit Documentation Feedback Copyright © 1995–2013, Texas Instruments Incorporated Product Folder Links: SN54AHC74 SN74AHC74 SN54AHC74, SN74AHC74 www.ti.com SCLS255K – DECEMBER 1995 – REVISED DECEMBER 2013 REVISION HISTORY Changes from Revision J (September 2002) to Revision K Page • Updated document to new TI data sheet format. ................................................................................................................. 1 • Added ESD warning. ............................................................................................................................................................ 2 • Removed Ordering Information table. ................................................................................................................................... 2 • Updated operating temperature range. ................................................................................................................................. 3 Copyright © 1995–2013, Texas Instruments Incorporated Product Folder Links: SN54AHC74 SN74AHC74 Submit Documentation Feedback 7 PACKAGE OPTION ADDENDUM www.ti.com 24-Aug-2018 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) 5962-9686001Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 59629686001Q2A SNJ54AHC 74FK 5962-9686001QCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9686001QC A SNJ54AHC74J 5962-9686001QDA ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9686001QD A SNJ54AHC74W SN74AHC74D ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 AHC74 SN74AHC74DBR ACTIVE SSOP DB 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 HA74 SN74AHC74DGVR ACTIVE TVSOP DGV 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 HA74 SN74AHC74DR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 AHC74 SN74AHC74DRE4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 AHC74 SN74AHC74N ACTIVE PDIP N 14 25 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type -40 to 125 SN74AHC74N SN74AHC74NSR ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 AHC74 SN74AHC74PW ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 HA74 SN74AHC74PWG4 ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 HA74 SN74AHC74PWR ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 HA74 SN74AHC74PWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 HA74 SN74AHC74RGYR ACTIVE VQFN RGY 14 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 HA74 Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 24-Aug-2018 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) SN74AHC74RGYRG4 ACTIVE VQFN RGY 14 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 HA74 SNJ54AHC74FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 59629686001Q2A SNJ54AHC 74FK SNJ54AHC74J ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9686001QC A SNJ54AHC74J SNJ54AHC74W ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9686001QD A SNJ54AHC74W (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of