SN74AHCT1G86DCKR

SN74AHCT1G86 SCLS324N – MARCH 1996 – REVISED AUGUST 2022 SN74AHCT1G86 Single 2-Input Exclusive-OR Gate 1 Features 3 Description • • • • • • The SN74AHCT1G86 is a single 2-input exclusive-OR gate. The device performs the Boolean function Y = A ⊕ B or Y = AB + A B in positive logic. Operating Range of 4.5 V to 5.5 V Max tpd of 8 ns at 5 V Low Power Consumption, 10-A Maximum ICC 8-mA Output Drive at 5 V Inputs Are TTL-Voltage Compatible Latch-Up Performance Exceeds 250 mA Per JESD 17 Device Information(1) PART NUMBER SN74AHCT1G86 2 Applications • • • • • • Industrial PCs Stepper Motors AC Inverter Drives Notebook PCs Smart Meters: Data Concentrators Enterprise Servers (1) PACKAGE BODY SIZE (NOM) DBV (SOT-23, 5) 2.90 mm × 1.60 mm DCK (SC-70, 5) 2.00 mm × 1.25 mm For all available packages, see the orderable addendum at the end of the datasheet. Exclusive-OR Logic An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. SN74AHCT1G86 www.ti.com SCLS324N – MARCH 1996 – REVISED AUGUST 2022 Table of Contents 1 Features............................................................................1 2 Applications..................................................................... 1 3 Description.......................................................................1 4 Revision History.............................................................. 2 5 Pin Configuration and Functions...................................3 6 Specifications.................................................................. 4 6.1 Absolute Maximum Ratings........................................ 4 6.2 ESD Ratings............................................................... 4 6.3 Recommended Operating Conditions.........................4 6.4 Thermal Information....................................................5 6.5 Electrical Characteristics.............................................5 6.6 Switching Characteristics............................................6 6.7 Operating Characteristics........................................... 6 6.8 Typical Characteristics................................................ 6 7 Parameter Measurement Information............................ 7 8 Detailed Description........................................................8 8.1 Overview..................................................................... 8 8.2 Functional Block Diagram........................................... 8 8.3 Feature Description.....................................................8 8.4 Device Functional Modes............................................8 9 Application and Implementation.................................... 9 9.1 Application Information............................................... 9 9.2 Typical Application...................................................... 9 10 Power Supply Recommendations..............................11 11 Layout........................................................................... 11 11.1 Layout Guidelines....................................................11 11.2 Layout Example.......................................................11 12 Device and Documentation Support..........................12 12.1 Receiving Notification of Documentation Updates..12 12.2 Support Resources................................................. 12 12.3 Trademarks............................................................. 12 12.4 Electrostatic Discharge Caution..............................12 12.5 Glossary..................................................................12 13 Mechanical, Packaging, and Orderable Information.................................................................... 12 4 Revision History Changes from Revision M (February 2015) to Revision N (August 2022) Page • Updated the numbering format for tables, figures, and cross-references throughout the document..................1 Changes from Revision L (January 2003) to Revision M (February 2015) Page • Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section ............................................................................................................................................................... 1 2 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74AHCT1G86 SN74AHCT1G86 www.ti.com SCLS324N – MARCH 1996 – REVISED AUGUST 2022 5 Pin Configuration and Functions Figure 5-1. DBV or DCK Package 5-Pin SOT-23 Top View PIN NO. 1 NAME A TYPE(1) DESCRIPTION I A input 2 B I B input 3 GND – Ground pin 4 Y O Output 5 Vcc – Power pin (1) Signal Types: I = Input, O = Output, I/O = Input or Output Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74AHCT1G86 3 SN74AHCT1G86 www.ti.com SCLS324N – MARCH 1996 – REVISED AUGUST 2022 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) VCC MIN MAX UNIT Supply voltage –0.5 7 V voltage(2) –0.5 7 V –0.5 VCC + 0.5 V VI Input VO Output voltage(2) IIK Input clamp current VI < 0 –20 mA IOK Output clamp current VO < 0 or VO > VCC –20 20 mA IO Continuous output current VO = 0 to VCC –25 25 mA Continuous current through VCC or GND –50 50 mA Tstg Storage temperature –65 150 °C TJ Junction Temperature 150 °C (1) (2) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 6.2 ESD Ratings VALUE Human body model (HBM), per ANSI/ESDA/JEDEC V(ESD) (1) (2) Electrostatic discharge JS-001(1) UNIT ±2000 Charged-device model (CDM), per JEDEC specification JESD22C101(2) V ±1000 JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN 4 4.5 NOM MAX 5.5 UNIT VCC Supply voltage VIH High-level input voltage VIL Low-level input voltage VI Input voltage VO Output voltage IOH High-level output current –8 mA IOL Low-level output current 8 mA t/v Input transition rise or fall rate 20 ns/V TA Operating free-air temperature 125 °C 2 V 0.8 V 0 5.5 V 0 VCC V –40 Submit Document Feedback V Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74AHCT1G86 SN74AHCT1G86 www.ti.com SCLS324N – MARCH 1996 – REVISED AUGUST 2022 6.4 Thermal Information SN74AHCT1G86 THERMAL METRIC(1) DBV (SOT-23) DCK (SC-70) 5 PINS 5 PINS RθJA Junction-to-ambient thermal resistance 208.2 287.6 RθJC(top) Junction-to-case (top) thermal resistance 76.1 97.7 RθJB Junction-to-board thermal resistance 52.5 65 ψJT Junction-to-top characterization parameter 4 2 ψJB Junction-to-board characterization parameter 51.8 64.2 (1) UNIT °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report (SPRA953). 6.5 Electrical Characteristics over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VOH High level output voltage IOH = –50 µA VOL Low level output voltage IOL = 50 µA II Input leakage current VI = 5.5 V or GND ICC Supply current VI = VCC or GND, IO = 0 ΔICC (1) Supply-current change One input at 3.4 V, Other inputs at VCC or GND Ci Input capacitance VI = VCC or GND (1) IOH = –8 mA IOL = 8 mA VCC 4.5 V TA = 25°C MIN TYP 4.4 4.5 –40°C to 85°C MAX 3.94 MIN –40°C to 125°C MAX MIN 4.4 4.4 3.8 3.8 MAX UNIT V 0.1 0.1 0.1 0.36 0.44 0.44 ±0.1 ±1 ±1 µA 5.5 V 1 10 10 µA 5.5 V 1.35 1.5 1.5 mA 10 10 10 pF 4.5 V 0 V to 5.5 V 5V 2 V This is the increase in supply current for each input at one of the specified TTL voltage levels, rather than 0 V or VCC. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74AHCT1G86 5 SN74AHCT1G86 www.ti.com SCLS324N – MARCH 1996 – REVISED AUGUST 2022 6.6 Switching Characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see ) PARAMETER FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE A or B Y CL = 15 pF A or B Y CL = 50 pF tPLH tPHL tPLH tPHL TA = 25°C –40°C to 85°C –40°C to 125°C TYP MAX MIN MAX MIN MAX 5 6.2 1 8 1 9 5 6.2 1 8 1 9 5.5 7.9 1 9 1 10 5.5 7.9 1 9 1 10 UNIT ns ns 6.7 Operating Characteristics VCC = 5 V, TA = 25°C PARAMETER Cpd TEST CONDITIONS Power dissipation capacitance No load, f = 1 MHz TYP 18 UNIT pF 6.8 Typical Characteristics 6 5 TPD (ns) 4 3 2 1 0 -100 -50 0 50 Temperature 100 150 D001 Figure 6-1. TPD vs. Temperature 6 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74AHCT1G86 SN74AHCT1G86 www.ti.com SCLS324N – MARCH 1996 – REVISED AUGUST 2022 7 Parameter Measurement Information 7.1 Figure 7-1. Load Circuit and Voltage Waveforms Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74AHCT1G86 7 SN74AHCT1G86 www.ti.com SCLS324N – MARCH 1996 – REVISED AUGUST 2022 8 Detailed Description 8.1 Overview The SN74AHCT1G86 is a single 2-input exclusive-OR gate. The device performs the Boolean function Y = A ⊕ B or Y = AB + A B in positive logic. To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver. 8.2 Functional Block Diagram Figure 8-1. Exclusive-OR Logic 8.3 Feature Description The device is ideal for operating in a 5-V logic system. The low propagation delay allows fast switching and higher speeds of operation. In addition, the low power consumption makes this device a good choice for portable and battery power-sensitive applications. 8.4 Device Functional Modes Table 8-1. Function Table INPUTS(1) (1) (2) 8 OUTPUT(2) A B Y L L L L H H H L H H H L H = High Voltage Level, L = Low Voltage Level, X = Don’t Care H = Driving High, L = Driving Low, Z = High Impedance State Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74AHCT1G86 SN74AHCT1G86 www.ti.com SCLS324N – MARCH 1996 – REVISED AUGUST 2022 9 Application and Implementation Note Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality. 9.1 Application Information The SN74AHCT1G86 is a Low drive CMOS device that can be used for a multitude of bus interface type applications where output ringing is a concern. The low drive and slow edge rates will minimize overshoot and undershoot on the outputs. The input switching levels have been lowered to accommodate TTL inputs of 0.8-V VIL and 2-V VIH. This feature makes it Ideal for translating up from 3.3 V to 5 V. 9.2 Typical Application Figure 9-1. Typical Application Schematic 9.2.1 Design Requirements This device uses CMOS technology and has balanced output drive. Take care to avoid bus contention because it can drive currents that would exceed maximum limits. The high drive will also create fast edges into light loads so consider routing and load conditions to prevent ringing. 9.2.2 Detailed Design Procedure • • Recommended input conditions: – Rise time and fall time specs. See (Δt/ΔV) in Section 6.3. – Specified high and low levels. See (VIH and VIL) in Section 6.3. Recommended output conditions: – Load currents should not exceed 25 mA per output and 50 mA total for the part. – Outputs should not be pulled above VCC. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74AHCT1G86 9 SN74AHCT1G86 www.ti.com SCLS324N – MARCH 1996 – REVISED AUGUST 2022 9.2.3 Application Curves Figure 9-2. Translation From 3.3 V to 5.5 V 10 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74AHCT1G86 SN74AHCT1G86 www.ti.com SCLS324N – MARCH 1996 – REVISED AUGUST 2022 10 Power Supply Recommendations The power supply can be any voltage between the minimum and maximum supply voltage rating located in the Section 6.3. Each VCC terminal should have a good bypass capacitor to prevent power disturbance. For devices with a single supply, TI recommends a 0.1-μF capacitor and if there are multiple Vcc terminals then TI recommends a 0.01-μF or 0.022-μF capacitor for each power terminal. Multiple bypass capacitors can be paralleled to reject different frequencies of noise. Frequencies of 0.1 μF and 1 μF are commonly used in parallel. The bypass capacitor should be installed as close as possible to the power terminal for best results. 11 Layout 11.1 Layout Guidelines When using multiple bit logic devices inputs should not ever float. In many cases, functions or parts of functions of digital logic devices are unused, for example, when only two inputs of a triple-input AND gate are used or only three of the four buffer gates are used. Such input pins should not be left unconnected because the undefined voltages at the outside connections result in undefined operational states. Specified below are the rules that must be observed under all circumstances. All unused inputs of digital logic devices must be connected to a high or low bias to prevent them from floating. The logic level that should be applied to any particular unused input depends on the function of the device. Generally they will be tied to GND or VCC whichever make more sense or is more convenient. Floating outputs is generally acceptable, unless the part is a transceiver. If the transceiver has an output enable pin it will disable the outputs section of the part when asserted. This will not disable the input section of the I.O’s so they also cannot float when disabled. 11.2 Layout Example Figure 11-1. Layout Recommendation Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74AHCT1G86 11 SN74AHCT1G86 www.ti.com SCLS324N – MARCH 1996 – REVISED AUGUST 2022 12 Device and Documentation Support 12.1 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Subscribe to updates to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 12.2 Support Resources TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. 12.3 Trademarks TI E2E™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners. 12.4 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 12.5 Glossary TI Glossary This glossary lists and explains terms, acronyms, and definitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 12 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74AHCT1G86 PACKAGE OPTION ADDENDUM www.ti.com 4-Aug-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) 74AHCT1G86DBVRG4 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 B86G Samples 74AHCT1G86DBVTG4 ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 B86G Samples SN74AHCT1G86DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 125 (B863, B86G, B86J, B86S) Samples SN74AHCT1G86DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 125 (B863, B86G, B86J, B86S) Samples SN74AHCT1G86DCKR ACTIVE SC70 DCK 5 3000 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 125 (BH3, BHG, BHJ, BH L, BHS) Samples SN74AHCT1G86DCKT ACTIVE SC70 DCK 5 250 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 125 (BH3, BHG, BHJ, BH L, BHS) Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of