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SN74ALS156DR

SN74ALS156DR

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    SOIC16_150MIL

  • 描述:

    SN74ALS156 DECODERS/DEMULTIPLEXE

  • 数据手册
  • 价格&库存
SN74ALS156DR 数据手册
            SDAS099C − JUNE 1986 − REVISED MAY 1996 D Applications: D D D OR N PACKAGE (TOP VIEW) − Dual 2-Line to 4-Line Decoder − Dual 1-Line to 4-Line Demultiplexer − 3-Line to 8-Line Decoder − 1-Line to 8-Line Demultiplexer Individual Strobes Simplify Cascading for Decoding or Demultiplexing Larger Words Package Options Include Plastic Small-Outline (D) Packages and Standard Plastic (N) 300-mil DIPs 1C 1G B 1Y3 1Y2 1Y1 1Y0 GND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC 2C 2G A 2Y3 2Y2 2Y1 2Y0 description One of the main applications of the SN74ALS156 is as a dual 1-line to 4-line decoder /demultiplexer with individual strobes (G) and common binary-address inputs in a single 16-pin package. When both sections are enabled, the common binary-address inputs sequentially select and route associated input data to the appropriate output of each section. The individual strobes permit enabling or disabling each of the 4-bit sections, as desired. Data applied to input 1C is inverted at its outputs and data applied at input 2C is not inverted through its outputs. The inverter following the 1C data input permits use of the SN74ALS156 as a 3-line to 8-line demultiplexer without external gating. All inputs are clamped with high-performance Schottky diodes to suppress line ringing and simplify system design. The SN74ALS156 is characterized for operation from 0°C to 70°C. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright  1996, Texas Instruments Incorporated      ! " #$%! "  &$'(#! )!%* )$#!" # ! "&%##!" &% !+% !%"  %," "!$%!" "!)) -!.* )$#! &#%""/ )%" ! %#%""(. #($)% !%"!/  (( &%!%"* • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 1             SDAS099C − JUNE 1986 − REVISED MAY 1996 Function Tables 2-LINE TO 4-LINE DECODER OR 1-LINE TO 4-LINE DEMULTIPLEXER INPUTS OUTPUTS SELECT B A STROBE 1G DATA 1C 1Y0 1Y1 X X H X H H H H L L L H L H H H L H L H H L H H H 1Y2 1Y3 H L L H H H L H H L H H H H L X X X L H H H H 2-LINE TO 4-LINE DECODER OR 1-LINE TO 4-LINE DEMULTIPLEXER INPUTS OUTPUTS SELECT B A STROBE 2G DATA 2C 2Y0 2Y1 2Y2 X X H X H H H H L L L L L H H H 2Y3 L H L L H L H H H L L L H H L H H H L L H H H L X X X H H H H H 3-LINE TO 8-LINE DECODER OR 1-LINE TO 8-LINE DEMULTIPLEXER OUTPUTS INPUTS SELECT STROBE OR DATA G‡ 0 1 2 3 4 5 6 7 2Y0 2Y1 2Y2 2Y3 1Y0 1Y1 1Y2 1Y3 C† B A X X X H H H H H H H H H L L L L L H H H L H H H L L H L H L H H H L H H L H L L H H L H H H H H L H H L H H H L H H H H H L L L H H H H L H H H H L H L H H H H H L H H H H L L H H L H H H L H H H L H H H L H H H L H † C = inputs 1C and 2C connected together ‡ G = inputs 1G and 2G connected together 2 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 •             SDAS099C − JUNE 1986 − REVISED MAY 1996 logic symbols† (alternatives) 1-LINE TO 4-LINE DEMULTIPLEXER 2-LINE TO 4-LINE DECODER X/Y 2 1G 1C A B EN 1 3 6 1 α 5 2 α 4 3 α 1 9 0 β 2 14 2G 0 α & 13 A 7 10 1 β & 15 EN 2C 11 2 β 12 3 β 1Y0 B 13 0 3 G 1 1Y1 0 3 DMUX 0 1Y2 2 1G 1Y3 1C 2Y0 1 G4 1 4 2 3 2Y1 2Y2 B 3 2G 2Y3 15 11 12 1 2 C 1 15 3 4 4 5 2 G 14 6 EN 1Y0 1Y1 1Y2 1Y3 2Y0 2Y1 2Y2 2Y3 1-LINE TO 8-LINE DEMULTIPLEXER DMUX 0 2 4 10 X/Y 1 5 14 3-LINE TO 8-LINE DECODER A 6 9 2C 13 7 7 9 10 11 12 7 6 5 4 2Y0 A 2Y1 B 13 0 0 3 G 2Y2 2Y3 C 1Y0 1 15 0 7 1 2 3 2 4 5 1Y1 1Y2 G 1Y3 2 6 14 7 9 10 11 12 7 6 5 4 2Y0 2Y1 2Y2 2Y3 1Y0 1Y1 1Y2 1Y3 † These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 3             SDAS099C − JUNE 1986 − REVISED MAY 1996 logic diagram (positive logic) 7 Strobe 1G Data 1C 2 1 6 5 B 1Y0 1Y1 1Y2 3 4 1Y3 Select 9 A 13 10 Data 2C Strobe 2G 11 15 2Y0 2Y1 2Y2 14 12 2Y3 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. recommended operating conditions MIN NOM MAX 4.5 5 5.5 VCC VIH Supply voltage VIL VOH Low-level input voltage 0.8 High-level output voltage 5.5 IOL TA Low-level output current 4 High-level input voltage 2 Operating free-air temperature 0 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • UNIT V V V V 8 mA 70 °C             SDAS099C − JUNE 1986 − REVISED MAY 1996 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VIK VCC = 4.5 V, VOL VCC = 4.5 V IOH II VCC = 4.5 V, VCC = 5.5 V, IIH IIL VCC = 5.5 V, VCC = 5.5 V, TYP† MIN II = − 18 mA IOL = 4 mA IOL = 8 mA VOH = 5.5 V MAX UNIT −1.5 V 0.25 0.4 0.35 0.5 VI = 7 V VI = 2.7 V VI = 0.4 V ICCL VCC = 5.5 V † All typical values are at VCC = 5 V, TA = 25°C. V 0.1 mA 0.1 mA 20 µA −0.1 µA 9 mA 5 switching characteristics (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL A, B 1Y, 2Y tPLH tPHL 1C 1Y tPLH tPHL 1G 1Y tPLH tPHL 2C, 2G 2Y VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 500 Ω, TA = MIN to MAX‡ MIN MAX 7 55 6 25 7 50 6 23 7 38 6 22 7 38 6 22 UNIT ns ns ns ns ‡ For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 5             SDAS099C − JUNE 1986 − REVISED MAY 1996 PARAMETER MEASUREMENT INFORMATION SERIES 54ALS/74ALS AND 54AS/74AS DEVICES 7V RL = R1 = R2 VCC S1 RL R1 Test Point From Output Under Test CL (see Note A) From Output Under Test RL Test Point CL (see Note A) CL (see Note A) LOAD CIRCUIT FOR BI-STATE TOTEM-POLE OUTPUTS LOAD CIRCUIT FOR OPEN-COLLECTOR OUTPUTS 3.5 V Timing Input Test Point From Output Under Test LOAD CIRCUIT FOR 3-STATE OUTPUTS 3.5 V High-Level Pulse 1.3 V R2 1.3 V 1.3 V 0.3 V 0.3 V tsu Data Input tw th 3.5 V 1.3 V 3.5 V Low-Level Pulse 1.3 V 0.3 V 1.3 V 0.3 V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATIONS 3.5 V Output Control (low-level enabling) 1.3 V 1.3 V 0.3 V tPZL Waveform 1 S1 Closed (see Note B) tPLZ 3.5 V Input tPHZ 1.3 V 0.3 V tPHL tPLH VOH In-Phase Output VOL 0.3 V 1.3 V 1.3 V VOL tPLH tPHL VOH 1.3 V 1.3 V [3.5 V 1.3 V tPZH Waveform 2 S1 Open (see Note B) 1.3 V VOH Out-of-Phase Output (see Note C) 0.3 V [0 V 1.3 V 1.3 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. When measuring propagation delay items of 3-state outputs, switch S1 is open. D. All input pulses have the following characteristics: PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%. E. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuits and Voltage Waveforms 6 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • PACKAGE OPTION ADDENDUM www.ti.com 13-Aug-2021 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) SN74ALS156D ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 ALS156 SN74ALS156DE4 ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 ALS156 SN74ALS156DR ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 ALS156 SN74ALS156DRE4 ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 ALS156 SN74ALS156N ACTIVE PDIP N 16 25 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 SN74ALS156N (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
SN74ALS156DR 价格&库存

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