SN74ALS37ADR

SN54ALS37A, SN74ALS37A QUADRUPLE 2-INPUT POSITIVE-NAND BUFFERS SDAS195A – APRIL 1982 – REVISED DECEMBER 1994 • SN54ALS37A . . . J PACKAGE SN74ALS37A . . . D OR N PACKAGE (TOP VIEW) Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs 1A 1B 1Y 2A 2B 2Y GND description These devices contain four independent 2-input positive-NAND buffers. They perform the Boolean functions Y = A • B or Y = A + B in positive logic. The SN54ALS37A is characterized for operation over the full military temperature range of – 55°C to 125°C. The SN74ALS37A is characterized for operation from 0°C to 70°C. B H H L L X H X L H 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y 1B 1A NC VCC 4B 1Y NC 2A NC 2B 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 4A NC 4Y NC 3B 2Y GND NC 3Y 3A A OUTPUT Y 14 2 SN54ALS37A . . . FK PACKAGE (TOP VIEW) FUNCTION TABLE (each gate) INPUTS 1 NC – No internal connection logic symbol† 1A 1B 2A 2B 3A 3B 4A 4B 1 logic diagram (positive logic) & 3 2 4 6 5 1A 1Y 2Y 8 3Y 3A 3B 12 13 2A 2B 9 10 1B 11 4Y 4A 4B 1 3 2 4 6 5 1Y 2Y 9 10 8 3Y 12 13 11 4Y † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the D, J, and N packages. Copyright  1994, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54ALS37A, SN74ALS37A QUADRUPLE 2-INPUT POSITIVE-NAND BUFFERS SDAS195A – APRIL 1982 – REVISED DECEMBER 1994 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Operating free-air temperature range, TA: SN54ALS37A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C SN74ALS37A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. recommended operating conditions SN54ALS37A SN74ALS37A MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 UNIT VCC VIH Supply voltage VIL IOH Low-level input voltage 0.7 0.8 High-level output current –1 – 2.6 mA IOL TA Low-level output current 12 24 mA 70 °C High-level input voltage 2 Operating free-air temperature 2 – 55 125 V V 0 V electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V to 5.5 V, II = –18 mA IOH = – 0.4 mA VCC = 4 4.5 5V IOH = –1 mA IOH = – 2.6 mA VOL VCC = 4 4.5 5V IOL = 12 mA IOL = 24 mA II IIH VCC = 5.5 V, VCC = 5.5 V, VI = 7 V VI = 2.7 V IIL IO§ VCC = 5.5 V, VCC = 5.5 V, VI = 0.4 V VO = 2.25 V ICCH ICCL VCC = 5.5 V, VCC = 5.5 V, VI = 0 VI = 4.5 V VOH SN54ALS37A TYP‡ MAX MIN SN74ALS37A TYP‡ MAX MIN –1.5 VCC – 2 3.3 –1.5 V 2.4 – 20 0.4 3.3 0.25 0.4 0.35 0.5 V 0.1 0.1 20 20 µA – 0.1 – 0.1 mA –112 mA 1.6 mA –112 0.86 V VCC – 2 2.4 0.25 UNIT 1.6 – 30 0.86 mA 4.8 7.8 4.8 7.8 mA ‡ All typical values are at VCC = 5 V, TA = 25°C. § The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54ALS37A, SN74ALS37A QUADRUPLE 2-INPUT POSITIVE-NAND BUFFERS SDAS195A – APRIL 1982 – REVISED DECEMBER 1994 switching characteristics (see Figure 1) PARAMETER tPLH tPHL FROM (INPUT) A or B TO (OUTPUT) Y VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 500 Ω, TA = MIN to MAX† SN54ALS37A SN74ALS37A MIN MAX MIN MAX 2 17 2 8 2 9 2 7 UNIT ns † For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN54ALS37A, SN74ALS37A QUADRUPLE 2-INPUT POSITIVE-NAND BUFFERS SDAS195A – APRIL 1982 – REVISED DECEMBER 1994 PARAMETER MEASUREMENT INFORMATION SERIES 54ALS/74ALS AND 54AS/74AS DEVICES 7V RL = R1 = R2 VCC S1 RL R1 Test Point From Output Under Test CL (see Note A) From Output Under Test RL Test Point From Output Under Test CL (see Note A) CL (see Note A) LOAD CIRCUIT FOR BI-STATE TOTEM-POLE OUTPUTS LOAD CIRCUIT FOR OPEN-COLLECTOR OUTPUTS 3.5 V Timing Input Test Point LOAD CIRCUIT FOR 3-STATE OUTPUTS 3.5 V High-Level Pulse 1.3 V R2 1.3 V 1.3 V 0.3 V 0.3 V tsu Data Input tw th 3.5 V 1.3 V 3.5 V Low-Level Pulse 1.3 V 0.3 V 1.3 V 0.3 V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATIONS 3.5 V Output Control (low-level enabling) 1.3 V 1.3 V 0.3 V tPZL Waveform 1 S1 Closed (see Note B) tPLZ [3.5 V 1.3 V tPHZ tPZH Waveform 2 S1 Open (see Note B) 1.3 V VOL 0.3 V VOH 1.3 V 0.3 V [0 V 3.5 V 1.3 V Input 1.3 V 0.3 V tPHL tPLH VOH In-Phase Output 1.3 V 1.3 V VOL tPLH tPHL VOH Out-of-Phase Output (see Note C) 1.3 V 1.3 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. When measuring propagation delay items of 3-state outputs, switch S1 is open. D. All input pulses have the following characteristics: PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%. E. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuits and Voltage Waveforms 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) (3) Device Marking (4/5) (6) SN74ALS37AN ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 SN74ALS37AN (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of