SDAS143C − APRIL 1982 − REVISED AUGUST 1995
•
SN54ALS74A, SN54AS74A . . . J PACKAGE
SN74ALS74A, SN74AS74A . . . D OR N PACKAGE
(TOP VIEW)
Package Options Include Plastic
Small-Outline (D) Packages, Ceramic Chip
Carriers (FK), and Standard Plastic (N) and
Ceramic (J) 300-mil DIPs
TYPE
TYPICAL MAXIMUM
CLOCK FREQUENCY
(CL = 50 pF)
(MHz)
1CLR
1D
1CLK
1PRE
1Q
1Q
GND
TYPICAL POWER
DISSIPATION
PER FLIP-FLOP
(mW)
′ALS74A
50
6
′AS74A
134
26
description
1
14
2
13
3
12
4
11
5
10
6
9
7
8
VCC
2CLR
2D
2CLK
2PRE
2Q
2Q
SN54ALS74A, SN54AS74A . . . FK PACKAGE
(TOP VIEW)
1D
1CLR
NC
VCC
2CLR
These devices contain two independent
positive-edge-triggered D-type flip-flops. A low
level at the preset (PRE) or clear (CLR) inputs sets
or resets the outputs regardless of the levels of the
other inputs. When PRE and CLR are inactive
(high), data at the data (D) input meeting the
setup-time requirements are transferred to the
outputs on the positive-going edge of the clock
(CLK) pulse. Clock triggering occurs at a voltage
level and is not directly related to the rise time of
CLK. Following the hold-time interval, data at the
D input can be changed without affecting the
levels at the outputs.
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
2D
NC
2CLK
NC
2PRE
1Q
GND
NC
2Q
2Q
1CLK
NC
1PRE
NC
1Q
NC − No internal connection
The SN54ALS74A and SN54AS74A are
characterized for operation over the full military
temperature range of − 55°C to 125°C. The
SN74ALS74A and SN74AS74A are characterized
for operation from 0°C to 70°C.
FUNCTION TABLE
INPUTS
OUTPUTS
PRE
CLR
CLK
D
Q
Q
L
H
X
X
H
L
H
L
X
X
L
H
L
L
X
X
H†
H†
H
H
↑
H
H
L
H
H
↑
L
L
H
H
H
L
X
Q0
Q0
† The output levels in this configuration are not
specified to meet the minimum levels for VOH if the
lows at PRE and CLR are near VIL maximum.
Furthermore, this configuration is nonstable; that
is, it does not persist when PRE or CLR returns to
its inactive (high) level.
Copyright 1995, Texas Instruments Incorporated
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""0 !)) '!!&"&#+
• DALLAS, TEXAS 75265
• HOUSTON, TEXAS 77251−1443
POST OFFICE BOX 655303
POST OFFICE BOX 1443
1
SDAS143C − APRIL 1982 − REVISED AUGUST 1995
logic symbol†
1PRE
1CLK
1D
1CLR
2PRE
2CLK
2D
2CLR
4
2
1
5
S
3
1Q
C1
1D
6
R
10
9
11
1Q
2Q
12
8
13
2Q
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
logic diagram (positive logic)
PRE
CLR
Q
Q
CLK
D
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Operating free-air temperature range, TA: SN54ALS74A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 125°C
SN74ALS74A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2
•
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
•
SDAS143C − APRIL 1982 − REVISED AUGUST 1995
recommended operating conditions
SN54ALS74A
SN74ALS74A
MIN
NOM
MAX
MIN
NOM
MAX
4.5
5
5.5
4.5
5
5.5
UNIT
VCC
VIH
Supply voltage
VIL
IOH
Low-level input voltage
0.7
0.8
V
High-level output current
−0.4
−0.4
mA
IOL
fclock
Low-level output current
4
8
mA
34
MHz
High-level input voltage
2
Clock frequency
0
PRE or CLR low
tw
2
Pulse duration
tsu
Setup time before CLK↑
th
TA
Hold time after CLK↑
25
15
CLK high
17.5
14.5
CLK low
17.5
14.5
Data
16
15
PRE or CLR inactive
10
10
Data
2
Operating free-air temperature
V
0
15
ns
ns
0
−55
125
V
ns
0
70
°C
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
SN54ALS74A
MIN TYP†
MAX
TEST CONDITIONS
VIK
VOH
VCC = 4.5 V,
VCC = 4.5 V to 5.5 V,
II = −18 mA
IOH = − 2 mA
VOL
VCC = 4.5 V
IOL = 4 mA
IOL = 8 mA
VCC = 4.5 V,
VI = 7 V
VCC = 4.5 V,
VI = 2.7 V
VCC = 4.5 V,
VI = 0.4 V
−1.5
VCC −2
PRE or CLR
0.25
CLK or D
IIH
PRE or CLR
CLK or D
IIL
PRE or CLR
−1.5
VCC −2
CLK or D
II
SN74ALS74A
MIN TYP†
MAX
0.4
UNIT
V
V
0.25
0.4
0.35
0.5
0.1
0.1
0.2
0.2
20
20
40
40
−0.2
−0.2
−0.4
−0.4
V
mA
µA
A
mA
IO‡
VCC = 5.5 V,
VO = 2.25 V
−20
−112
−30
−112
mA
ICC
VCC = 5.5 V,
See Note 1
2.4
4
2.4
4
mA
† All typical values are at VCC = 5 V, TA = 25°C.
‡ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
NOTE 1: ICC is measured with D, CLK, and PRE grounded, then with D, CLK, and CLR grounded.
•
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
•
3
SDAS143C − APRIL 1982 − REVISED AUGUST 1995
switching characteristics (see Figure 1)
FROM
(INPUT)
PARAMETER
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
RL = 500 Ω,
TA = MIN to MAX†
TO
(OUTPUT)
SN54ALS74A
MIN
fmax
tPLH
tPHL
tPLH
SN74ALS74A
MAX
MIN
25
PRE or CLR
Q or Q
UNIT
MAX
34
MHz
3
18
3
13
5
17
5
15
5
16
5
18
5
23
CLK
Q or Q
tPHL
5
20
† For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
ns
ns
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Operating free-air temperature range, TA: SN54AS74A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 125°C
SN74AS74A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54AS74A
SN74AS74A
MIN
NOM
MAX
MIN
NOM
MAX
4.5
5
5.5
4.5
5
5.5
UNIT
VCC
VIH
Supply voltage
VIL
IOH
Low-level input voltage
0.8
0.8
V
High-level output current
−2
−2
mA
IOL
fclock*
Low-level output current
20
20
mA
105
MHz
tw*
High-level input voltage
2
Clock frequency
Pulse duration
tsu*
Setup time before CLK↑
th*
TA
Hold time after CLK↑
0
2
90
0
PRE or CLR low
4
4
CLK high
4
4
CLK low
5.5
5.5
Data
4.5
4.5
2
2
PRE or CLR inactive
Data
0
Operating free-air temperature
−55
V
0
* On products compliant to MIL-STD-833, Class B, this parameter is based on characterization data but is not production tested.
4
•
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
•
ns
ns
0
125
V
ns
70
°C
SDAS143C − APRIL 1982 − REVISED AUGUST 1995
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
SN54AS74A
TYP†
MAX
TEST CONDITIONS
MIN
VIK
VOH
VCC = 4.5 V,
VCC = 4.5 V to 5.5 V,
II = −18 mA
IOH = − 2 mA
VOL
II
VCC = 4.5 V,
VCC = 5.5 V,
IOL = 20 mA
VI = 7 V
−1.2
VCC −2
PRE or CLR
VCC = 5.5 V,
VI = 2.7 V
0.25
VCC = 5.5 V,
VI = 0.4 V
CLK or D
IIL
PRE or CLR
−1.2
VCC −2
CLK or D
IIH
SN74AS74A
TYP†
MAX
MIN
0.5
UNIT
V
V
0.25
0.5
V
0.1
0.1
mA
20
20
40
40
−0.5
−0.5
−1.8
−1.8
µA
A
mA
IO‡
VCC = 5.5 V,
VO = 2.25 V
−30
−112
−30
−112
mA
ICC
VCC = 5.5 V,
See Note 1
10.5
16
10.5
16
mA
† All typical values are at VCC = 5 V, TA = 25°C.
‡ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
NOTE 1: ICC is measured with D, CLK, and PRE grounded, then with D, CLK, and CLR grounded.
switching characteristics (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
RL = 500 Ω,
TA = MIN to MAX§
SN54AS74A
SN74AS74A
MIN
fmax*
tPLH
tPHL
tPLH
MAX
90
PRE or CLR
Q or Q
CLK
Q or Q
MIN
MAX
105
MHz
2
9
2
7.5
2.5
11.5
2.5
10.5
2.5
10
3
8
tPHL
3.5
10.5
3
9
* On products compliant to MIL-STD-833, Class B, this parameter is based on characterization data but is not production tested.
§ For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
•
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
•
UNIT
ns
ns
5
SDAS143C − APRIL 1982 − REVISED AUGUST 1995
PARAMETER MEASUREMENT INFORMATION
SERIES 54ALS/74ALS AND 54AS/74AS DEVICES
7V
RL = R1 = R2
VCC
S1
RL
R1
Test
Point
From Output
Under Test
CL
(see Note A)
From Output
Under Test
RL
Test
Point
CL
(see Note A)
CL
(see Note A)
LOAD CIRCUIT FOR
BI-STATE
TOTEM-POLE OUTPUTS
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
3.5 V
Timing
Input
Test
Point
From Output
Under Test
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
3.5 V
High-Level
Pulse
1.3 V
R2
1.3 V
1.3 V
0.3 V
0.3 V
tsu
Data
Input
tw
th
3.5 V
1.3 V
3.5 V
Low-Level
Pulse
1.3 V
0.3 V
1.3 V
0.3 V
VOLTAGE WAVEFORMS
PULSE DURATIONS
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3.5 V
Output
Control
(low-level
enabling)
1.3 V
1.3 V
0.3 V
tPZL
Waveform 1
S1 Closed
(see Note B)
tPLZ
3.5 V
Input
tPZH
1.3 V
0.3 V
tPHL
tPLH
VOH
In-Phase
Output
VOL
0.3 V
1.3 V
1.3 V
VOL
tPLH
tPHL
VOH
1.3 V
1.3 V
[3.5 V
1.3 V
tPHZ
Waveform 2
S1 Open
(see Note B)
1.3 V
VOH
Out-of-Phase
Output
(see Note C)
0.3 V
[0 V
1.3 V
1.3 V
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. When measuring propagation delay items of 3-state outputs, switch S1 is open.
D. All input pulses have the following characteristics: PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%.
E. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
6
•
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
•
PACKAGE OPTION ADDENDUM
www.ti.com
14-Oct-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
5962-9862701QCA
ACTIVE
CDIP
J
14
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
5962-9862701QC
A
SNJ54AS74AJ
84011012A
ACTIVE
LCCC
FK
20
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
84011012A
SNJ54ALS
74AFK
8401101CA
ACTIVE
CDIP
J
14
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
8401101CA
SNJ54ALS74AJ
Samples
8401101DA
ACTIVE
CFP
W
14
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
8401101DA
SNJ54ALS74AW
Samples
JM38510/37101B2A
ACTIVE
LCCC
FK
20
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
JM38510/
37101B2A
Samples
JM38510/37101BCA
ACTIVE
CDIP
J
14
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
JM38510/
37101BCA
Samples
M38510/37101B2A
ACTIVE
LCCC
FK
20
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
JM38510/
37101B2A
Samples
M38510/37101BCA
ACTIVE
CDIP
J
14
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
JM38510/
37101BCA
Samples
SN54ALS74AJ
ACTIVE
CDIP
J
14
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
SN54ALS74AJ
Samples
SN54AS74AJ
ACTIVE
CDIP
J
14
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
SN54AS74AJ
Samples
SN74ALS74AD
ACTIVE
SOIC
D
14
50
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
ALS74A
Samples
SN74ALS74ADR
ACTIVE
SOIC
D
14
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
ALS74A
Samples
SN74ALS74AN
ACTIVE
PDIP
N
14
25
RoHS & Green
NIPDAU
N / A for Pkg Type
0 to 70
SN74ALS74AN
Samples
SN74ALS74ANSR
ACTIVE
SO
NS
14
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
ALS74A
Samples
SN74AS74AD
ACTIVE
SOIC
D
14
50
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
AS74A
Samples
SN74AS74ADR
ACTIVE
SOIC
D
14
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
AS74A
Samples
SN74AS74AN
ACTIVE
PDIP
N
14
25
RoHS & Green
NIPDAU
N / A for Pkg Type
0 to 70
SN74AS74AN
Samples
Addendum-Page 1
Samples
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device
14-Oct-2022
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
SN74AS74ANSR
ACTIVE
SO
NS
14
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
74AS74A
SNJ54ALS74AFK
ACTIVE
LCCC
FK
20
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
84011012A
SNJ54ALS
74AFK
SNJ54ALS74AJ
ACTIVE
CDIP
J
14
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
8401101CA
SNJ54ALS74AJ
Samples
SNJ54ALS74AW
ACTIVE
CFP
W
14
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
8401101DA
SNJ54ALS74AW
Samples
SNJ54AS74AJ
ACTIVE
CDIP
J
14
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
5962-9862701QC
A
SNJ54AS74AJ
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of