SN74ALS841DWRE4

SN74ALS841, SN74AS841A, SN74ALS842 10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS SDAS059C – DECEMBER 1983 – REVISED JANUARY 1995 • • • • • • 3-State Buffer-Type Outputs Drive Bus Lines Directly Bus-Structured Pinout Provide Extra Bus-Driving Latches Necessary for Wider Address/Data Paths or Buses With Parity Buffered Control Inputs to Reduce dc Loading Effects Power-Up High-Impedance State Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic (NT) 300-mil DIPs SN74ALS841, SN74AS841A . . . DW OR NT PACKAGE (TOP VIEW) OE 1D 2D 3D 4D 5D 6D 7D 8D 9D 10D GND description These 10-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. 1 24 2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14 12 13 VCC 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q 9Q 10Q LE SN74ALS842 . . . DW OR NT PACKAGE (TOP VIEW) OE 1D 2D 3D 4D 5D 6D 7D 8D 9D 10D GND The ten latches are transparent D-type latches. The SN74ALS841 and SN74AS841A have noninverting data (D) inputs. The SN74ALS842 has inverting D inputs. A buffered output-enable (OE) input places the ten outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. 1 24 2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14 12 13 VCC 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q 9Q 10Q LE OE does not affect the internal operation of the latches. Previously stored data can be retained or new data can be entered while the outputs are off. The SN74ALS841, SN74AS841A, and SN74ALS842 are characterized for operation from 0°C to 70°C. Copyright  1995, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN74ALS841, SN74AS841A, SN74ALS842 10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS SDAS059C – DECEMBER 1983 – REVISED JANUARY 1995 Function Tables SN74ALS841, SN74AS841A INPUTS OE LE D OUTPUT Q L H H H L H L L L L X Q0 H X X Z SN74ALS842 INPUTS OE LE D OUTPUT Q L H H L L H L H L L X Q0 H X X Z logic symbols† SN74ALS841, SN74AS841A OE LE 1D 2D 3D 4D 5D 6D 7D 8D 9D 10D 1 13 2 SN74ALS842 EN OE C1 1D LE 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14 1Q 2Q 3Q 4Q 2 2D 3D 4D 5D 6Q 6D 7D 8Q 8D 9Q 9D 10Q 13 1D 5Q 7Q 1 10D POST OFFICE BOX 655303 C1 1D 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14 † These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. 2 EN • DALLAS, TEXAS 75265 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q 9Q 10Q SN74ALS841, SN74AS841A, SN74ALS842 10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS SDAS059C – DECEMBER 1983 – REVISED JANUARY 1995 logic diagrams (positive logic) SN74ALS841, SN74AS841A OE LE 1 13 C1 1D 2 23 1D 1Q To Nine Other Channels SN74ALS842 OE LE 1 13 C1 1D 2 1D 23 1Q To Nine Other Channels absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Voltage applied to a disabled 3-state output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Operating free-air temperature range, TA: SN74ALS841, SN74ALS842 . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN74ALS841, SN74AS841A, SN74ALS842 10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS SDAS059C – DECEMBER 1983 – REVISED JANUARY 1995 recommended operating conditions SN74ALS841 SN74ALS842 UNIT MIN NOM MAX 4.5 5 5.5 VCC VIH Supply voltage VIL IOH Low-level input voltage High-level output current – 2.6 mA IOL tw Low-level output current 24 mA Pulse duration, LE high 20 ns tsu th Setup time, data before LE↓ 10 ns Hold time, data after LE↓ 5 ns TA Operating free-air temperature 0 High-level input voltage 2 V V 0.8 70 V °C electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS SN74ALS841 SN74ALS842 MIN VIK VOH VCC = 4.5 V, VCC = 4.5 V to 5.5 V, II = – 18 mA IOH = – 0.4 mA VCC = 4.5 V, IOH = – 2.6 mA IOL = 12 mA VOL 5V VCC = 4 4.5 IOZH IOZL VCC = 5.5 V, VCC = 5.5 V, II IIH VCC = 5.5 V, VCC = 5.5 V, IIL IO‡ VCC = 5.5 V, VCC = 5.5 V, SN74ALS841 VCC = 5.5 V ICC SN74ALS842 VCC = 5.5 V TYP† – 1.2 VCC – 2 2.4 IOL = 24 mA VO = 2.7 V 0.25 0.4 0.35 0.5 20 VI = 2.7 V VI = 0.4 V – 30 V V 3.2 VO = 0.4 V VI = 7 V VO = 2.25 V Outputs high UNIT MAX V µA – 20 µA 0.1 mA 20 µA – 0.1 mA – 112 mA 19 30 Outputs low 38 62 Outputs disabled 23 40 Outputs high 20 35 Outputs low 48 74 mA Outputs disabled 27 44 † All typical values are at VCC = 5 V, TA = 25°C. ‡ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN74ALS841, SN74AS841A, SN74ALS842 10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS SDAS059C – DECEMBER 1983 – REVISED JANUARY 1995 switching characteristics (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = 500 Ω, R2 = 500 Ω, TA = MIN to MAX† UNIT SN74ALS841 tPLH tPHL D Q tPLH tPHL LE Q tPZH tPZL OE Q tPHZ tPLZ OE Q MIN MAX 2 13 2 13 7 21 8 26 2 12 2 12 2 10 2 12 ns ns ns ns † For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. switching characteristics (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL D Q tPLH tPHL LE Q tPZH tPZL OE Q tPHZ tPLZ OE Q VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = 500 Ω, R2 = 500 Ω, TA = MIN to MAX† SN74ALS842 MIN MAX 4 18 3 13 8 27 6 20 2 12 2 12 1 10 2 12 UNIT ns ns ns ns † For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡ Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Voltage applied to a disabled 3-state output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Operating free-air temperature range, TA: SN74AS841A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C ‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SN74ALS841, SN74AS841A, SN74ALS842 10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS SDAS059C – DECEMBER 1983 – REVISED JANUARY 1995 recommended operating conditions SN74AS841A MIN NOM MAX 4.5 5 5.5 UNIT VCC VIH Supply voltage VIL IOH Low-level input voltage 0.8 V High-level output current – 24 mA IOL tw Low-level output current 48 mA 4 ns tsu th Setup time, data before LE↓ 2.5 ns Hold time, data after LE↓ 2.5 ns TA Operating free-air temperature High-level input voltage 2 Pulse duration, LE high V V 0 70 °C electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK TEST CONDITIONS SN74AS841A TYP† MAX MIN VCC = 4.5 V, VCC = 4.5 V to 5.5 V, II = – 18 mA IOH = – 2 mA 5V VCC = 4 4.5 IOH = – 15 mA IOH = – 24 mA VOL IOZH VCC = 4.5 V, VCC = 5.5 V, IOL = 48 mA VO = 2.7 V IOZL II VCC = 5.5 V, VCC = 5.5 V, VO = 0.4 V VI = 7 V IIH IIL IO‡ VCC = 5.5 V, VCC = 5.5 V, VI = 2.7 V VI = 0.4 V VCC = 5.5 V, VO = 2.25 V Outputs high 36 60 ICC VCC = 5.5 V Outputs low 58 94 Outputs disabled 56 93 VOH – 1.2 VCC – 2 2.4 UNIT V V 3.2 2 0.35 – 30 0.5 V 50 µA – 50 µA 0.1 mA 20 µA – 0.5 mA – 112 mA mA † All typical values are at VCC = 5 V, TA = 25°C. ‡ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN74ALS841, SN74AS841A, SN74ALS842 10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS SDAS059C – DECEMBER 1983 – REVISED JANUARY 1995 switching characteristics (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = 500 Ω, R2 = 500 Ω, TA = MIN to MAX† UNIT SN74AS841A tPLH tPHL D Q tPLH tPHL LE Q tPZH tPZL OE Q tPHZ tPLZ OE Q MIN MAX 1 6.5 1 10.5 2 12 2 12 2 14 2 16 1 8 1 8 ns ns ns ns † For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 SN74ALS841, SN74AS841A, SN74ALS842 10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS SDAS059C – DECEMBER 1983 – REVISED JANUARY 1995 PARAMETER MEASUREMENT INFORMATION SERIES 54ALS/74ALS AND 54AS/74AS DEVICES 7V RL = R1 = R2 VCC S1 RL R1 Test Point From Output Under Test CL (see Note A) From Output Under Test RL Test Point From Output Under Test CL (see Note A) CL (see Note A) LOAD CIRCUIT FOR BI-STATE TOTEM-POLE OUTPUTS LOAD CIRCUIT FOR OPEN-COLLECTOR OUTPUTS 3.5 V Timing Input Test Point LOAD CIRCUIT FOR 3-STATE OUTPUTS 3.5 V High-Level Pulse 1.3 V R2 1.3 V 1.3 V 0.3 V 0.3 V Data Input tw th tsu 3.5 V 1.3 V 3.5 V Low-Level Pulse 1.3 V 0.3 V 1.3 V 0.3 V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATIONS 3.5 V Output Control (low-level enabling) 1.3 V 1.3 V 0.3 V tPZL Waveform 1 S1 Closed (see Note B) tPLZ [3.5 V 1.3 V tPHZ tPZH Waveform 2 S1 Open (see Note B) 1.3 V VOL 0.3 V VOH 1.3 V 0.3 V [0 V 3.5 V 1.3 V Input 1.3 V 0.3 V tPHL tPLH VOH In-Phase Output 1.3 V 1.3 V VOL tPLH tPHL VOH Out-of-Phase Output (see Note C) 1.3 V 1.3 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. When measuring propagation delay items of 3-state outputs, switch S1 is open. D. All input pulses have the following characteristics: PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%. E. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuits and Voltage Waveforms 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) SN74ALS841DW ACTIVE SOIC DW 24 25 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 ALS841 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of