SN54ALS857, SN74ALS857
HEX 2-TO-1 UNIVERSAL MULTIPLEXERS
WITH 3-STATE OUTPUTS
SDAS170A – DECEMBER 1982 – REVISED JANUARY 1995
•
•
•
description
The ′ALS857 are hextuple 2-line to 1-line
multiplexers with 3-state outputs. The devices can
provide either true (COMP low) or inverted
(COMP high) data at the Y outputs. In addition, the
′ALS857 perform the logical AND function (A • B)
and the clear function as well. The four modes of
operation are:
•
•
•
•
Select A-data inputs
Select B-data inputs
AND A inputs with B inputs
Clear
In either of the first two modes, OPER = 0 is high
if all the selected A or B inputs are low. The six Y
outputs and the OPER = 0 output are all 3-state
and rated at 12-mA and 24-mA IOL for the
SN54ALS857 and SN74ALS857, respectively. All
outputs can be placed in the high-impedance state
by applying a high level to the COMP, S0, and S1
inputs simultaneously.
SN54ALS857 . . . JT PACKAGE
SN74ALS857 . . . DW OR NT PACKAGE
(TOP VIEW)
S0
1A
1B
1Y
2A
2B
2Y
3A
3B
3Y
OPER = 0
GND
1
24
2
23
3
22
4
21
5
20
6
19
7
18
8
17
9
16
10
15
11
14
12
13
VCC
S1
6A
6B
6Y
5A
5B
5Y
4A
4B
4Y
COMP
SN54ALS857 . . . FK PACKAGE
(TOP VIEW)
1B
1A
S0
NC
VCC
S1
6A
•
Select True or Complementary Data
Perform AND/NAND (Masking) of
A or B Operand
Cascadable to Expand Number of
Operands
Detect Zeros on A or B Operands
3-State Outputs Interface Directly With
System Bus
Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK), and Standard Plastic
(NT) and Ceramic (JT) 300-mil DIPs
4
1Y
2A
2B
NC
2Y
3A
3B
5
3 2 1 28 27 26
25
6
24
7
23
8
22
9
21
10
20
19
11
12 13 14 15 16 17 18
6B
6Y
5A
NC
5B
5Y
4A
3Y
OPER = 0
GND
NC
COMP
4Y
4B
•
•
NC – No internal connection
The SN54ALS857 is characterized for operation over the full military temperature range of – 55°C to 125°C. The
SN74ALS857 is characterized for operation from 0°C to 70°C.
Copyright 1995, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
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1
SN54ALS857, SN74ALS857
HEX 2-TO-1 UNIVERSAL MULTIPLEXERS
WITH 3-STATE OUTPUTS
SDAS170A – DECEMBER 1982 – REVISED JANUARY 1995
FUNCTION TABLE
INPUTS
COMP
S1
L
L
L
L
H
OUTPUTS
S0
Y
OPER = 0
L
L
A
H = all A inputs L
L
H
B
H = all B inputs L
H
L
A•B
Z
H
H
L
L
L
L
A
H = all A inputs L
H
L
H
B
H = all B inputs L
H
H
L
A•B
Z
H
H
H
Z
Z
logic symbol†
S0
S1
COMP
1
23
13
0
G
1
0
3
N4
3
1
3
≥1
EN6
2
1A
2
0
MUX
&
1B
2A
2B
3A
3B
4A
4B
5A
5B
6A
6B
3
5
EN5
4
2
4,5
1
7
6
2Y
8
10
9
3Y
16
14
15
4Y
19
17
18
5Y
22
20
21
≥1
11
3
6
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the DW, JT, and NT packages.
2
1Y
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
6Y
OPER = 0
SN54ALS857, SN74ALS857
HEX 2-TO-1 UNIVERSAL MULTIPLEXERS
WITH 3-STATE OUTPUTS
SDAS170A – DECEMBER 1982 – REVISED JANUARY 1995
logic diagram (positive logic)
S0
S1
COMP
1A
1
23
13
2
4
1B
2A
2B
3A
3B
4A
4B
5A
5B
6A
5
7
6
8
10
9
16
Details of
Four Identical Channels
Not Shown
15
19
18
14
17
2Y
3Y
4Y
5Y
22
20
6B
1Y
3
6Y
21
11
OPER = 0
Pin numbers shown are for the DW, JT, and NT packages.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
SN54ALS857, SN74ALS857
HEX 2-TO-1 UNIVERSAL MULTIPLEXERS
WITH 3-STATE OUTPUTS
SDAS170A – DECEMBER 1982 – REVISED JANUARY 1995
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Voltage applied to a disabled 3-state output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Operating free-air temperature range, TA: SN54ALS857 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C
SN74ALS857 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54ALS857
SN74ALS857
MIN
NOM
MAX
MIN
NOM
MAX
4.5
5
5.5
4.5
5
5.5
UNIT
VCC
VIH
Supply voltage
VIL
IOH
Low-level input voltage
0.7
0.8
High-level output current
–1
– 2.6
mA
IOL
TA
Low-level output current
12
24
mA
70
°C
High-level input voltage
2
Operating free-air temperature
2
– 55
125
V
V
0
V
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
TEST CONDITIONS
VCC = 4.5 V,
VCC = 4.5 V to 5.5 V,
II = – 18 mA
IOH = – 0.4 mA
VCC = 4
4.5
5V
IOH = – 1 mA
IOH = – 2.6 mA
VOL
5V
VCC = 4
4.5
IOL = 12 mA
IOL = 24 mA
IOZH
IOZL
VCC = 5.5 V,
VCC = 5.5 V,
VO = 2.7 V
VO = 0.4 V
II
IIH
VCC = 5.5 V,
VCC = 5.5 V,
VI = 7 V
VI = 2.7 V
IIL
IO§
VCC = 5.5 V,
VCC = 5.5 V,
VI = 0.4 V
VO = 2.25 V
VOH
ICC
VCC = 5.5
55V
V,
See Note 1
SN54ALS857
TYP‡
MAX
MIN
SN74ALS857
TYP‡
MAX
MIN
– 1.5
VCC – 2
2.4
– 1.5
UNIT
V
VCC – 2
V
3.3
2.4
0.25
– 15
0.4
3.2
0.25
0.4
0.35
0.5
V
µA
20
20
– 20
– 20
µA
0.1
0.1
mA
20
20
µA
– 0.2
– 0.2
mA
– 70
mA
– 70
– 15
Outputs high
11
24
11
24
Outputs low
16
33
16
33
mA
Outputs disabled
18
36
18
36
‡ All typical values are at VCC = 5 V, TA = 25°C.
§ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
NOTE 1: ICC is measured with all possible inputs grounded while achieving the stated output conditions.
4
POST OFFICE BOX 655303
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SN54ALS857, SN74ALS857
HEX 2-TO-1 UNIVERSAL MULTIPLEXERS
WITH 3-STATE OUTPUTS
SDAS170A – DECEMBER 1982 – REVISED JANUARY 1995
switching characteristics (see Figure 1)
PARAMETER†
FROM
(INPUT)
TO
(OUTPUT)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
R1 = 500 Ω,
R2 = 500 Ω,
TA = MIN to MAX‡
SN54ALS857
tpd
UNIT
SN74ALS857
MIN
MAX
MIN
MAX
A or B (COMP high)
Y (inverting)
2
35
4
25
A or B (COMP low)
Y (noninverting)
2
27
4
18
2
37
7
33
2
26
6
18
2
45
5
37
2
30
5
23
2
38
7
35
2
43
2
23
2
37
8
24
2
45
6
21
2
29
6
20
2
42
11
27
2
28
6
25
2
37
3
19
2
43
9
25
2
36
6
20
S0 or S1
COMP
Y
A or B
S0 to S1
OPER = 0
ten
tdis
S0 to S1
Y
ten
tdis
COMP
Y
ten
tdis
S0
OPER = 0
ten
tdis
S1
OPER = 0
ten
tdis
COMP
OPER = 0
ns
ns
ns
ns
ns
ns
† tpd = tPLH or tPHL, ten = tPZH or tPZL, tdis = tPHZ or tPLZ
‡ For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
SN54ALS857, SN74ALS857
HEX 2-TO-1 UNIVERSAL MULTIPLEXERS
WITH 3-STATE OUTPUTS
SDAS170A – DECEMBER 1982 – REVISED JANUARY 1995
PARAMETER MEASUREMENT INFORMATION
SERIES 54ALS/74ALS AND 54AS/74AS DEVICES
7V
RL = R1 = R2
VCC
S1
RL
R1
Test
Point
From Output
Under Test
CL
(see Note A)
From Output
Under Test
RL
Test
Point
From Output
Under Test
CL
(see Note A)
CL
(see Note A)
LOAD CIRCUIT FOR
BI-STATE
TOTEM-POLE OUTPUTS
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
3.5 V
Timing
Input
Test
Point
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
3.5 V
High-Level
Pulse
1.3 V
R2
1.3 V
1.3 V
0.3 V
0.3 V
tsu
Data
Input
tw
th
3.5 V
1.3 V
3.5 V
Low-Level
Pulse
1.3 V
0.3 V
1.3 V
0.3 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATIONS
3.5 V
Output
Control
(low-level
enabling)
1.3 V
1.3 V
0.3 V
tPZL
Waveform 1
S1 Closed
(see Note B)
tPLZ
[3.5 V
1.3 V
tPHZ
tPZH
Waveform 2
S1 Open
(see Note B)
1.3 V
VOL
0.3 V
VOH
1.3 V
0.3 V
[0 V
3.5 V
1.3 V
Input
1.3 V
0.3 V
tPHL
tPLH
VOH
In-Phase
Output
1.3 V
1.3 V
VOL
tPLH
tPHL
VOH
Out-of-Phase
Output
(see Note C)
1.3 V
1.3 V
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. When measuring propagation delay items of 3-state outputs, switch S1 is open.
D. All input pulses have the following characteristics: PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%.
E. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
6
POST OFFICE BOX 655303
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PACKAGE OPTION ADDENDUM
www.ti.com
24-Jan-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package Qty
Drawing
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
(3)
Top-Side Markings
(4)
5962-87533013A
OBSOLETE
LCCC
FK
24
TBD
Call TI
Call TI
-55 to 125
5962-8753301LA
ACTIVE
CDIP
JT
24
1
TBD
Call TI
Call TI
-55 to 125
5962-8753301LA
SNJ54ALS857JT
SN74ALS857NT
ACTIVE
PDIP
NT
24
15
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
0 to 70
SN74ALS857NT
SN74ALS857NTE4
ACTIVE
PDIP
NT
24
15
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
0 to 70
SN74ALS857NT
SNJ54ALS857FK
OBSOLETE
LCCC
FK
24
TBD
Call TI
Call TI
-55 to 125
SNJ54ALS857JT
ACTIVE
CDIP
JT
24
TBD
A42
N / A for Pkg Type
-55 to 125
1
5962-8753301LA
SNJ54ALS857JT
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Only one of markings shown within the brackets will appear on the physical device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
24-Jan-2013
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN54ALS857, SN74ALS857 :
• Catalog: SN74ALS857
• Military: SN54ALS857
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
• Military - QML certified for Military and Defense Applications
Addendum-Page 2
MECHANICAL DATA
MCER004A – JANUARY 1995 – REVISED JANUARY 1997
JT (R-GDIP-T**)
CERAMIC DUAL-IN-LINE
24 LEADS SHOWN
PINS **
A
13
24
B
1
24
28
A MAX
1.280
(32,51)
1.460
(37,08)
A MIN
1.240
(31,50)
1.440
(36,58)
B MAX
0.300
(7,62)
0.291
(7,39)
B MIN
0.245
(6,22)
0.285
(7,24)
DIM
12
0.070 (1,78)
0.030 (0,76)
0.100 (2,54) MAX
0.320 (8,13)
0.290 (7,37)
0.015 (0,38) MIN
0.200 (5,08) MAX
Seating Plane
0.130 (3,30) MIN
0.023 (0,58)
0.015 (0,38)
0°–15°
0.014 (0,36)
0.008 (0,20)
0.100 (2,54)
4040110/C 08/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a ceramic lid using glass frit.
Index point is provided on cap for terminal identification.
Falls within MIL STD 1835 GDIP3-T24, GDIP4-T28, and JEDEC MO-058 AA, MO-058 AB
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SN74ALS857DW SN74ALS857DWR SN74ALS857DWRE4 SN74ALS857DWG4 SN74ALS857DWRG4
