SN74ALVC162836DL

SN74ALVC162836 20-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS www.ti.com SCES129E – MARCH 1998 – REVISED OCTOBER 2004 FEATURES • • • • • • • • DGG, DGV, OR DL PACKAGE (TOP VIEW) Member of the Texas Instruments Widebus™ Family Operates From 1.65 V to 3.6 V Max tpd of 4 ns at 3.3 V ±12-mA Output Drive at 3.3 V Output Port Has Equivalent 26-Ω Series Resistors, So No External Resistors Are Required Designed to Comply With JEDEC 168-Pin and 200-Pin SDRAM Buffered DIMM Specification Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) OE Y1 Y2 GND Y3 Y4 VCC Y5 Y6 Y7 GND Y8 Y9 Y10 Y11 Y12 Y13 GND Y14 Y15 Y16 VCC Y17 Y18 GND Y19 Y20 NC DESCRIPTION/ORDERING INFORMATION This 20-bit universal bus driver is designed for 1.65-V to 3.6-V VCC operation. Data flow from A to Y is controlled by the output-enable (OE) input. The device operates in the transparent mode when the latch-enable (LE) input is low. When LE is high, the A data is latched if the clock (CLK) input is held at a high or low logic level. If LE is high, the A data is stored in the latch/flip-flop on the low-to-high transition of CLK. When OE is high, the outputs are in the high-impedance state. The output port includes equivalent 26-Ω series resistors to reduce overshoot and undershoot. 1 56 2 55 3 54 4 53 5 52 6 51 7 50 8 49 9 48 10 47 11 46 12 45 13 44 14 43 15 42 16 41 17 40 18 39 19 38 20 37 21 36 22 35 23 34 24 33 25 32 26 31 27 30 28 29 CLK A1 A2 GND A3 A4 VCC A5 A6 A7 GND A8 A9 A10 A11 A12 A13 GND A14 A15 A16 VCC A17 A18 GND A19 A20 LE NC − No internal connection To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. ORDERING INFORMATION PACKAGE (1) TA (1) TOP-SIDE MARKING SN74ALVC162836DL Tape and reel SN74ALVC162836DLR TSSOP - DGG Tape and reel SN74ALVC162836DGGR ALVC162836 TVSOP - DGV Tape and reel SN74ALVC162836DGVR VC2836 SSOP - DL -40°C to 85°C ORDERABLE PART NUMBER Tube ALVC162836 Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1998–2004, Texas Instruments Incorporated SN74ALVC162836 20-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS www.ti.com SCES129E – MARCH 1998 – REVISED OCTOBER 2004 FUNCTION TABLE INPUTS (1) OE LE CLK A OUTPUT Y H X X X Z L L X L L L L X H H L H ↑ L L L H ↑ H H L H L or H X Y0 (1) Output level before the indicated steady-state input conditions were established, provided that CLK is high before LE goes high LOGIC DIAGRAM (POSITIVE LOGIC) 1 OE 56 CLK LE 29 55 1D A1 C1 2 Y1 CLK To 19 Other Channels ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) MIN MAX VCC Supply voltage range -0.5 4.6 V VI Input voltage range (2) -0.5 4.6 V -0.5 VCC + 0.5 range (2) (3) UNIT VO Output voltage IIK Input clamp current VI < 0 -50 mA IOK Output clamp current VO < 0 -50 mA IO Continuous output current ±50 mA ±100 mA Continuous current through each VCC or GND θJA Package thermal impedance (4) Tstg Storage temperature range DGG package 64 DGV package 48 DL package (1) (2) (3) (4) 2 V °C/W 56 -65 150 °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. This value is limited to 4.6 V maximum. The package thermal impedance is calculated in accordance with JESD 51-7. SN74ALVC162836 20-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS www.ti.com SCES129E – MARCH 1998 – REVISED OCTOBER 2004 RECOMMENDED OPERATING CONDITIONS (1) VCC Supply voltage VCC = 1.65 V to 1.95 V VIH High-level input voltage MIN MAX 1.65 3.6 Low-level input voltage VI Input voltage VO Output voltage IOH High-level output current VCC = 2.3 V to 2.7 V 1.7 VCC = 2.7 V to 3.6 V 2 V 0.35 × VCC VCC = 2.3 V to 2.7 V 0.7 VCC = 2.7 V to 3.6 V 0.8 Low-level output current ∆t/∆v Input transition rise or fall rate TA Operating free-air temperature 3.6 V 0 VCC V VCC = 1.65 V -2 VCC = 2.3 V -6 VCC = 2.7 V -8 mA -12 VCC = 1.65 V 2 VCC = 2.3 V 6 VCC = 2.7 V 8 VCC = 3 V (1) V 0 VCC = 3 V IOL V 0.65 × VCC VCC = 1.65 V to 1.95 V VIL UNIT mA 12 -40 10 ns/V 85 °C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. ELECTRICAL CHARACTERISTICS over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = -100 µA VOH 1.65 V to 3.6 V MIN 1.65 V 1.2 IOH = -4 mA 2.3 V 1.9 2.3 V 1.7 3V 2.4 IOH = -8 mA TYP (1) MAX V 2.7 V 2 IOH = -12 mA 3V 2 IOL = 100 µA 1.65 V to 3.6 V 0.2 IOL = 2 mA 1.65 V 0.45 IOL = 4 mA 2.3 V 0.4 2.3 V 0.55 3V 0.55 2.7 V 0.6 3V 0.8 IOL = 6 mA IOL = 8 mA IOL = 12 mA UNIT VCC - 0.2 IOH = -2 mA IOH = -6 mA VOL VCC V II VI = VCC or GND 3.6 V ±5 µA IOZ VO = VCC or GND 3.6 V ±10 µA ICC VI = VCC or GND, IO = 0 3.6 V 40 µA ∆ICC One input at VCC - 0.6 V, Other inputs at VCC or GND 3 V to 3.6 V 750 µA Ci Co (1) Control inputs Data inputs Outputs VI = VCC or GND 3.3 V VO = VCC or GND 3.3 V 5 5.5 7.5 pF pF All typical values are at VCC = 3.3 V, TA = 25°C. 3 SN74ALVC162836 20-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS www.ti.com SCES129E – MARCH 1998 – REVISED OCTOBER 2004 TIMING REQUIREMENTS over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) VCC = 1.8 V MIN MAX fclock tw tsu th (1) Setup time Hold time MIN (1) Clock frequency Pulse duration VCC = 2.5 V ± 0.2 V VCC = 3.3 V ± 0.3 V VCC = 2.7 V MAX MIN MAX 150 MIN 150 150 LE low (1) 3.3 3.3 3.3 CLK high or low (1) 3.3 3.3 3.3 Data before CLK↑ (1) 1.4 1.7 1.5 CLK high (1) 1.2 1.6 1.3 CLK low (1) 1.4 1.5 1.2 (1) 0.9 0.9 0.9 (1) 1.1 1.1 1.1 Data before LE↑ Data after CLK↑ Data after LE↑ CLK high or low UNIT MAX MHz ns ns ns This information was not available at the time of publication. SWITCHING CHARACTERISTICS over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) MIN TYP (1) fmax A tpd LE Y CLK (1) VCC = 1.8 V VCC = 2.5 V ± 0.2 V VCC = 2.7 V VCC = 3.3 V ± 0.3 V MIN MIN MIN MAX 150 MAX 150 150 MHz (1) 1 4.4 4.6 1.2 4 (1) 5.1 1.1 5.8 6.1 1.4 (1) UNIT MAX ns 1 5.2 5.5 1.1 5 ten OE Y (1) 1.1 6.4 6.5 1.2 5.5 ns tdis OE Y (1) 1 4.7 5.2 1.7 5.1 ns This information was not available at the time of publication. SWITCHING CHARACTERISTICS from 0°C to 65°C, CL = 50 pF FROM (INPUT) PARAMETER A tpd VCC = 3.3 V ± 0.15 V TO (OUTPUT) MIN Y CLK UNIT MAX 1 4 1.7 4.5 ns OPERATING CHARACTERISTICS TA = 25°C PARAMETER Cpd Power dissipation capacitance (1) 4 TEST CONDITIONS Outputs enabled Outputs disabled CL = 0, This information was not available at the time of publication. f = 10 MHz VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V TYP TYP TYP (1) 31 36 (1) 7 11 UNIT pF SN74ALVC162836 20-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS www.ti.com SCES129E – MARCH 1998 – REVISED OCTOBER 2004 PARAMETER MEASUREMENT INFORMATION VLOAD S1 RL From Output Under Test Open GND CL (see Note A) RL TEST S1 tpd tPLZ/tPZL tPHZ/tPZH Open VLOAD GND LOAD CIRCUIT INPUT VCC 1.8 V 2.5 V ± 0.2 V 2.7 V 3.3 V ± 0.3 V VI tr/tf VCC VCC 2.7 V 2.7 V ≤2 ns ≤2 ns ≤2.5 ns ≤2.5 ns VM VLOAD CL RL V∆ VCC/2 VCC/2 1.5 V 1.5 V 2 × VCC 2 × VCC 6V 6V 30 pF 30 pF 50 pF 50 pF 1 kΩ 500 Ω 500 Ω 500 Ω 0.15 V 0.15 V 0.3 V 0.3 V tw VI Timing Input VM VM VM 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VM VM 0V tPLH Output Control (low-level enabling) tPLZ VLOAD/2 VM tPZH VOH VM VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VM 0V Output Waveform 1 S1 at VLOAD (see Note B) tPHL VM VI VM tPZL VI Input VOLTAGE WAVEFORMS PULSE DURATION th VI Data Input VM 0V 0V tsu Output VI VM Input Output Waveform 2 S1 at GND (see Note B) VOL + V∆ VOL tPHZ VOH VM VOH − V∆ 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms 5 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) SN74ALVC162836DGGR ACTIVE TSSOP DGG 56 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 ALVC162836 SN74ALVC162836DGVR ACTIVE TVSOP DGV 56 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 VC2836 SN74ALVC162836DL ACTIVE SSOP DL 56 20 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 ALVC162836 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of