SN54ALS646, SN54ALS648, SN54AS646
SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS039F – DECEMBER 1983 – REVISED JANUARY 1995
•
•
•
•
•
Independent Registers for A and B Buses
Multiplexed Real-Time and Stored Data
Choice of True or Inverting Data Paths
Choice of 3-State or Open-Collector
Outputs
Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK), and Standard Plastic
(NT) and Ceramic (JT) 300-mil DIPs
DEVICE
OUTPUT
LOGIC
SN54ALS646, SN74ALS646A, ′AS646
3 state
True
SN54ALS648, SN74ALS648A, SN74AS648
3 state
Inverting
SN54ALS646, SN54ALS648, SN54AS646 . . . JT PACKAGE
SN74ALS646A, SN74ALS648A, SN74AS646,
SN74AS648 . . . DW OR NT PACKAGE
(TOP VIEW)
CLKAB
SAB
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
description
Output-enable (OE) and direction-control (DIR)
inputs control the transceiver functions. In the
transceiver mode, data present at the highimpedance port may be stored in either or both
registers.
24
2
23
3
22
4
21
5
20
6
19
7
18
8
17
9
16
10
15
11
14
12
13
VCC
CLKBA
SBA
OE
B1
B2
B3
B4
B5
B6
B7
B8
DIR
SAB
CLKAB
NC
VCC
CLKBA
SBA
SN54ALS646, SN54ALS648, SN54AS646 . . . FK PACKAGE
(TOP VIEW)
A1
A2
A3
NC
A4
A5
A6
5
2 1 28 27 26
25
6
24
7
23
8
22
9
21
10
20
4
3
19
11
12 13 14 15 16 17 18
OE
B1
B2
NC
B3
B4
B5
A7
A8
GND
NC
B8
B7
B6
These devices consist of bus-transceiver circuits
with 3-state or open-collector outputs, D-type
flip-flops, and control circuitry arranged for
multiplexed transmission of data directly from the
data bus or from the internal storage registers.
Data on the A or B bus is clocked into the registers
on the low-to-high transition of the appropriate
clock (CLKAB or CLKBA) input. Figure 1
illustrates the four fundamental bus-management
functions that can be performed with the octal bus
transceivers and registers.
1
The select-control (SAB and SBA) inputs can
NC – No internal connection
multiplex stored and real-time (transparent mode)
data. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during
the transition between stored and real-time data. DIR determines which bus receives data when OE is low. In
the isolation mode (OE high), A data may be stored in one register and /or B data may be stored in the other
register.
When an output function is disabled, the input function is still enabled and can be used to store and transmit
data. Only one of the two buses, A or B, may be driven at a time.
The -1 version of the SN74ALS646A is identical to the standard version, except that the recommended
maximum IOL in the -1 version is increased to 48 mA. There are no -1 versions of the SN54ALS646,
SN54ALS648, or SN74ALS648A.
The SN54ALS646, SN54ALS648, and SN54AS646 are characterized for operation over the full military
temperature range of – 55°C to 125°C. The SN74ALS646A, SN74ALS648A, SN74AS646, and SN74AS648 are
characterized for operation from 0°C to 70°C.
Copyright 1995, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SN54ALS646, SN54ALS648, SN54AS646
SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
21
OE
L
3
DIR
L
1
23
CLKAB CLKBA
X
X
2
SAB
X
BUS B
BUS A
BUS A
BUS B
SDAS039F – DECEMBER 1983 – REVISED JANUARY 1995
22
SBA
L
21
OE
L
3
DIR
H
3
DIR
X
X
X
1
23
CLKAB CLKBA
X
↑
X
↑
↑
↑
2
SAB
X
X
X
22
SBA
X
X
X
STORAGE FROM
A, B, OR A AND B
21
OE
L
L
22
SBA
X
BUS B
3
DIR
L
H
1
CLKAB
X
H or L
23
CLKBA
H or L
X
2
SAB
X
H
TRANSFER STORED DATA
TO A AND/OR B
Figure 1. Bus-Management Functions
Pin numbers shown are for the DW, JT, and NT packages.
2
2
SAB
L
BUS A
BUS A
21
OE
X
X
H
23
CLKBA
X
REAL-TIME TRANSFER
BUS A TO BUS B
BUS B
REAL-TIME TRANSFER
BUS B TO BUS A
1
CLKAB
X
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
22
SBA
H
X
SN54ALS646, SN54ALS648, SN54AS646
SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS039F – DECEMBER 1983 – REVISED JANUARY 1995
Function Tables
SN54ALS646, SN54AS646, SN74ALS646A, SN74AS646
INPUTS
DATA I/O
OE
DIR
CLKAB
CLKBA
SAB
SBA
A1– A8
B1– B8
X
X
↑
X
X
X
Input
Unspecified†
OPERATION OR FUNCTION
X
X
X
↑
X
X
Unspecified†
Input
Store A, B unspecified†
Store B, A unspecified†
H
X
↑
↑
X
X
Input
Input
Store A and B data
H
X
H or L
H or L
X
X
Input disabled
Input disabled
Isolation, hold storage
L
L
X
X
X
L
Output
Input
Real-time B data to A bus
L
L
X
H or L
X
H
Output
Input
Stored B data to A bus
L
H
X
X
L
X
Input
Output
Real-time A data to B bus
L
H
H or L
X
H
X
Input
Output
Stored A data to B bus
† The data output functions can be enabled or disabled by various signals at OE and DIR. Data input functions are always enabled; i.e., data at
the bus terminals is stored on every low-to-high transition of the clock inputs.
SN54ALS648, SN74ALS648A, SN74AS648
INPUTS
DATA I/O
OPERATION OR FUNCTION
OE
DIR
CLKAB
CLKBA
SAB
SBA
A1– A8
B1– B8
X
X
↑
X
X
X
Input
Unspecified†
X
X
X
↑
X
X
Unspecified†
Input
H
X
↑
↑
X
X
Input
Input
Store A and B data
H
X
H or L
H or L
X
X
Input disabled
Input disabled
Isolation, hold storage
L
L
X
X
X
L
Output
Input
Real-time B data to A bus
L
L
X
H or L
X
H
Output
Input
Stored B data to A bus
L
H
X
X
L
X
Input
Output
Real-time A data to B bus
Store A, B unspecified†
Store B, A unspecified†
L
H
H or L
X
H
X
Input
Output
Stored A data to B bus
† The data output functions can be enabled or disabled by various signals at OE and DIR. Data input functions are always enabled; i.e., data at
the bus terminals is stored on every low-to-high transition of the clock inputs.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
SN54ALS646, SN54ALS648, SN54AS646
SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS039F – DECEMBER 1983 – REVISED JANUARY 1995
logic symbols†
SN54ALS648,
SN74ALS648A, SN74AS648
SN54ALS646, SN54AS646,
SN74ALS646A, SN74AS646
OE
DIR
CLKBA
SBA
CLKAB
SAB
A1
21
3
23
22
1
2
G3
OE
3 EN1 [BA]
3 EN2 [AB]
DIR
G5
SBA
G7
SAB
≥1
4
A4
A5
A6
A7
A8
4D
5
1
20
B1
A1
5 1
7
1
A3
CLKAB
C6
6D
A2
CLKBA
C4
≥1
21
3
23
22
1
2
3 EN1 [BA]
3 EN2 [AB]
C4
G5
C6
G7
≥1
4
7
7
1
5
19
6
18
7
17
8
16
9
15
10
14
11
13
B2
B3
A2
A3
B4
A4
B5
A5
B6
A6
B7
A7
B8
A8
POST OFFICE BOX 655303
20
≥1
2
7
5
19
6
18
7
17
8
16
9
15
10
14
11
13
• DALLAS, TEXAS 75265
B1
5 1
6D
2
4D
5
1
† These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the DW, JT, and NT packages.
4
G3
B2
B3
B4
B5
B6
B7
B8
SN54ALS646, SN54ALS648, SN54AS646
SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS039F – DECEMBER 1983 – REVISED JANUARY 1995
logic diagrams (positive logic)
OE
DIR
21
SN54ALS646, SN54AS646,
SN74ALS646A, SN74AS646
3
23
CLKBA
SBA 22
CLKAB 1
SAB
2
One of Eight Channels
1D
C1
A1
4
20
1D
C1
B1
To Seven Other Channels
SN54ALS648,
SN74ALS648A, SN74AS648
OE
DIR
21
3
23
CLKBA
SBA 22
CLKAB 1
SAB
2
One of Eight Channels
1D
C1
A1
4
20
1D
C1
B1
To Seven Other Channels
Pin numbers shown are for the DW, JT, and NT packages.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
SN54ALS646, SN54ALS648, SN54AS646
SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS039F – DECEMBER 1983 – REVISED JANUARY 1995
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage, VI: Control inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
I / O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Operating free-air temperature range, TA: SN54ALS646 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C
SN74ALS646A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54ALS646
VCC
VIH
Supply voltage
VIL
IOH
Low-level input voltage
IOL
Low level output current
Low-level
fclock
tw
Clock frequency
tsu
th
Setup time, A before CLKAB↑ or B before CLKBA↑
High-level input voltage
SN74ALS646A
MIN
NOM
MAX
MIN
NOM
MAX
4.5
5
5.5
4.5
5
5.5
2
High-level output current
2
V
– 12
– 15
mA
24
Hold time, A after CLKAB↑ or B after CLKBA↑
POST OFFICE BOX 655303
35
0
40
mA
MHz
14.5
12.5
ns
15
10
ns
0
TA
Operating free-air temperature
– 55
‡ Applies only to the -1 version and only if VCC is maintained between 4.75 V and 5.25
6
V
0.8
48‡
0
V
0.7
12
Pulse duration, CLKBA or CLKAB high or low
UNIT
• DALLAS, TEXAS 75265
0
125
0
ns
70
°C
SN54ALS646, SN54ALS648, SN54AS646
SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS039F – DECEMBER 1983 – REVISED JANUARY 1995
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VOH
SN54ALS646
TYP†
MAX
TEST CONDITIONS
MIN
VCC = 4.5 V,
VCC = 4.5 V to 5.5 V,
II = – 18 mA
IOH = – 0.4 mA
VCC = 4.5 V
IOH = – 3 mA
IOH = – 12 mA
– 1.2
VCC – 2
2.4
VCC = 4.5 V
Control inputs
VI = 7 V
VI = 5.5 V
VCC = 5.5
5 5 V,
V
VI = 2
2.7
7V
5 5 V,
V
VCC = 5.5
4V
VI = 0
0.4
IO¶
VCC = 5.5 V,
VO = 2.25 V
ICC
VCC = 5.5 V
A or B ports
3.2
Control inputs
IIH
A or B ports§
Control inputs
IIL
A or B ports§
3.2
UNIT
V
V
2
0.25
0.4
IOL = 24 mA
IOL = 48 mA‡
VCC = 5
5.5
5V
II
– 1.2
VCC – 2
2.4
2
IOH = – 15 mA
IOL = 12 mA
VOL
SN74ALS646A
TYP†
MAX
MIN
– 20
0.25
0.4
0.35
0.5
0.35
0.5
0.1
0.1
0.1
0.1
20
20
20
20
– 0.2
– 0.2
– 0.2
– 0.2
– 112
– 30
– 112
Outputs high
47
76
47
76
Outputs low
55
88
55
88
Outputs disabled
55
88
55
88
V
mA
µA
A
mA
mA
mA
† All typical values are at VCC = 5 V, TA = 25°C.
‡ Applies only to the -1 version and only if VCC is maintained between 4.75 V and 5.25
§ For I/O ports, the parameters IIH and IIL include the off-state output current.
¶ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
7
SN54ALS646, SN54ALS648, SN54AS646
SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS039F – DECEMBER 1983 – REVISED JANUARY 1995
switching characteristics (see Figure 2)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
R1 = 500 Ω,
R2 = 500 Ω,
TA = MIN to MAX†
SN54ALS646
MIN
fmax
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tPZH
tPZL
tPHZ
SN74ALS646A
MAX
35
CLKBA or CLKAB
A or B
A or B
B or A
SBA or SAB‡
(stored data low)
A or B
SBA or SAB‡
(stored data high)
A or B
OE
A or B
OE
A or B
DIR
A or B
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MIN
MAX
40
MHz
10
35
7
30
5
20
5
17
5
22
3
20
3
15
3
12
10
40
7
35
5
23
5
20
8
30
6
25
5
24
5
20
3
20
2
17
5
22
4
20
1
12
1
10
1
20
2
16
5
38
3
30
5
30
4
25
1
10
2
16
1
12
DIR
A or B
tPLZ
2
21
† For conditions shown MIN or MAX, use the appropriate value specified under recommended operating conditions.
‡ These parameters are measured with the internal output state of the storage register opposite that of the bus input.
8
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
SN54ALS646, SN54ALS648, SN54AS646
SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS039F – DECEMBER 1983 – REVISED JANUARY 1995
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage, VI: Control inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
I / O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Operating free-air temperature range, TA: SN54ALS648 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C
SN74ALS648A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54ALS648
VCC
VIH
Supply voltage
VIL
IOH
Low-level input voltage
IOL
fclock
Low-level output current
tw
tsu
Pulse duration, CLKBA or CLKAB high or low
th
TA
Hold time, A after CLKAB↑ or B after CLKBA↑
High-level input voltage
SN74ALS648A
MIN
NOM
MAX
MIN
NOM
MAX
4.5
5
5.5
4.5
5
5.5
2
High-level output current
2
0
Setup time, A before CLKAB↑ or B before CLKBA↑
Operating free-air temperature
V
0.8
V
– 12
– 15
mA
35
0
24
mA
40
MHz
14.5
12.5
ns
15
10
ns
0
0
ns
– 55
POST OFFICE BOX 655303
V
0.7
12
Clock frequency
UNIT
• DALLAS, TEXAS 75265
125
0
70
°C
9
SN54ALS646, SN54ALS648, SN54AS646
SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS039F – DECEMBER 1983 – REVISED JANUARY 1995
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VOH
VOL
II
A or B ports
MIN
VCC = 4.5 V,
VCC = 4.5 V to 5.5 V,
II = – 18 mA
IOH = – 0.4 mA
VCC = 4.5 V
IOH = – 3 mA
IOH = – 12 mA
VCC = 4
4.5
5V
Control inputs
SN54ALS648
TYP†
MAX
TEST CONDITIONS
5V
VCC = 5
5.5
– 1.2
VCC – 2
2.4
A or B ports‡
IO§
ICC
A or B ports‡
IOH = – 15 mA
IOL = 12 mA
0.4
0.25
0.4
0.35
0.5
0.1
0.1
0.1
0.1
20
20
20
20
– 0.2
– 0.2
– 0.2
– 0.2
VCC = 5.5
5 5 V,
V
VI = 0
0.4
4V
VCC = 5.5 V,
VO = 2.25 V
V
2
0.25
VI = 5.5 V
VI = 2
2.7
7V
UNIT
V
IOL = 24 mA
VI = 7 V
VCC = 5.5
5 5 V,
V
VCC = 5.5 V
3.2
2
Control inputs
IIL
– 1.2
VCC – 2
2.4
3.2
Control inputs
IIH
SN74ALS648A
TYP†
MAX
MIN
– 20
– 112
– 30
– 112
Outputs high
47
76
47
76
Outputs low
57
88
57
88
Outputs disabled
57
88
57
88
V
mA
µA
A
mA
mA
mA
† All typical values are at VCC = 5 V, TA = 25°C.
‡ For I/O ports, the parameters IIH and IIL include the off-state output current.
§ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
10
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SN54ALS646, SN54ALS648, SN54AS646
SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS039F – DECEMBER 1983 – REVISED JANUARY 1995
switching characteristics (see Figure 2)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
R1 = 500 Ω,
R2 = 500 Ω,
TA = MIN to MAX†
SN54ALS648
MIN
fmax
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tPZH
tPZL
tPHZ
SN74ALS648A
MAX
35
CLKBA or CLKAB
A or B
A or B
B or A
SBA or SAB‡
(stored data low)
A or B
SBA or SAB‡
(stored data high)
A or B
OE
A or B
OE
A or B
DIR
A or B
• DALLAS, TEXAS 75265
MIN
MAX
40
MHz
8
39
7
33
5
23
5
20
3
20
2
17
2
12
2
10
5
44
5
39
4
26
4
22
6
30
6
25
6
25
6
21
4
25
2
22
4
25
4
22
1
12
1
10
2
21
2
15
4
35
2
27
3
25
3
19
1
14
2
15
1
17
DIR
A or B
tPLZ
2
22
† For conditions shown MIN or MAX, use the appropriate value specified under recommended operating conditions.
‡ These parameters are measured with the internal output state of the storage register opposite that of the bus input.
POST OFFICE BOX 655303
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
11
SN54ALS646, SN54ALS648, SN54AS646
SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS039F – DECEMBER 1983 – REVISED JANUARY 1995
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage, VI: Control inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
I / O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Operating free-air temperature range, TA: SN54AS646 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C
SN74AS646 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54AS646
SN74AS646
MIN
NOM
MAX
MIN
NOM
MAX
4.5
5
5.5
4.5
5
5.5
UNIT
VCC
VIH
Supply voltage
VIL
IOH
Low-level input voltage
0.8
0.8
V
High-level output current
–12
–15
mA
IOL
fclock*
Low-level output current
tw*
Pulse duration
tsu*
th*
High-level input voltage
2
2
32
Clock frequency
0
75
0
CLKBA or CLKAB high
6
5
CLKBA or CLKAB low
7
6
Setup time, A before CLKAB↑ or B before CLKBA↑
7
6
Hold time, A after CLKAB↑ or B before CLKBA
0
0
V
48
mA
90
MHz
TA
Operating free-air temperature
– 55
125
0
70
* On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested.
12
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
V
ns
ns
ns
°C
SN54ALS646, SN54ALS648, SN54AS646
SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS039F – DECEMBER 1983 – REVISED JANUARY 1995
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VOH
VOL
II
VCC = 4.5 V,
VCC = 4.5 V to 5.5 V,
II = – 18 mA
IOH = – 2 mA
VCC = 4.5 V
IOH = – 3 mA
IOH = – 12 mA
VCC = 4
4.5
5V
Control inputs
A or B ports
SN54AS646
TYP†
MAX
TEST CONDITIONS
VCC = 5.5 V,
VCC = 5.5 V,
MIN
– 1.2
VCC – 2
2.4
A or B ports‡
IO§
ICC
A or B ports‡
IOH = – 15 mA
IOL = 32 mA
0.5
0.1
0.1
0.1
0.1
20
20
70
70
VCC = 5.5
55V
V,
VI = 0
0.4
4V
VCC = 5.5 V,
VO = 2.25 V
V
2
0.25
VI = 5.5 V
VI = 2
2.7
7V
UNIT
V
IOL = 48 mA
VI = 7 V
VCC = 5.5
55V
V,
VCC = 5.5 V
3.2
2
0.35
Control input
IIL
– 1.2
VCC – 2
2.4
3.2
Control inputs
IIH
SN74AS646
TYP†
MAX
MIN
– 30
0.5
– 0.5
– 0.5
– 0.75
– 0.75
– 112
– 30
– 112
Outputs high
120
195
120
195
Outputs low
130
211
130
211
Outputs disabled
130
211
130
211
V
mA
µA
A
mA
mA
mA
† All typical values are at VCC = 5 V, TA = 25 °C.
‡ For I/O ports, the parameters IIH and IIL include the off-state output current.
§ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
13
SN54ALS646, SN54ALS648, SN54AS646
SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS039F – DECEMBER 1983 – REVISED JANUARY 1995
switching characteristics (see Figure 2)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
R1 = 500 Ω,
R2 = 500 Ω,
TA = MIN to MAX†
SN54AS646
MIN
fmax*
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tPZH
tPZL
tPHZ
MAX
75
CLKBA or CLKAB
A or B
A or B
B or A
SBA or SAB‡
A or B
OE
A or B
OE
A or B
DIR
A or B
UNIT
SN74AS646
MIN
MAX
90
MHz
2
9.5
2
8.5
2
10
2
9
2
11.5
2
9
1
8
1
7
2
13.5
2
11
2
11
2
9
2
11
2
9
3
15
3
14
2
11
2
9
2
11
2
9
3
21
3
16
3
24
3
18
2
12
2
10
DIR
A or B
tPLZ
2
12
2
10
* On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested.
† For conditions shown MIN or MAX, use the appropriate value specified under recommended operating conditions.
‡ These parameters are measured with the internal output state of the storage register opposite that of the bus input.
14
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
ns
ns
ns
ns
ns
ns
ns
SN54ALS646, SN54ALS648, SN54AS646
SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS039F – DECEMBER 1983 – REVISED JANUARY 1995
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage, VI: Control inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
I / O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Operating free-air temperature range, TA: SN74AS648 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN74AS648
MIN
NOM
MAX
4.5
5
5.5
UNIT
VCC
VIH
Supply voltage
VIL
IOH
Low-level input voltage
0.8
V
High-level output current
–15
mA
IOL
fclock
Low-level output current
tw
Pulse duration
tsu
th
Setup time, A before CLKAB↑ or B before CLKBA↑
6
Hold time, A after CLKAB↑ or B before CLKBA
0
TA
Operating free-air temperature
0
High-level input voltage
2
Clock frequency
V
0
CLKBA or CLKAB high
5
CLKBA or CLKAB low
6
V
48
mA
90
MHz
ns
ns
ns
70
°C
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VOH
VOL
II
TEST CONDITIONS
VCC = 4.5 V,
VCC = 4.5 V to 5.5 V,
II = – 18 mA
IOH = – 2 mA
VCC = 4
4.5
5V
IOH = – 3 mA
IOH = – 15 mA
VCC = 4.5 V,
Control inputs
A or B ports
VCC = 5
5.5
5V
SN74AS648
TYP‡
MAX
MIN
– 1.2
VCC – 2
2.4
2
IOL = 48 mA
VI = 7 V
0.35
0.1
20
VI = 2
2.7
7V
55V
VCC = 5.5
V,
4V
VI = 0
0.4
IO¶
VCC = 5.5 V,
VO = 2.25 V
ICC
VCC = 5.5 V
70
Control input
IIL
A or B ports§
0.5
0.1
VI = 5.5 V
VCC = 5.5
55V
V,
A or B ports§
V
V
3.2
Control inputs
IIH
UNIT
V
mA
µA
A
– 0.5
– 0.75
– 30
– 112
Outputs high
110
185
Outputs low
120
195
Outputs disabled
120
195
mA
mA
mA
‡ All typical values are at VCC = 5 V, TA = 25 °C.
§ For I/O ports, the parameters IIH and IIL include the off-state output current.
¶ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
15
SN54ALS646, SN54ALS648, SN54AS646
SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS039F – DECEMBER 1983 – REVISED JANUARY 1995
switching characteristics (see Figure 2)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
R1 = 500 Ω,
R2 = 500 Ω,
TA = MIN to MAX†
UNIT
SN74AS648
MIN
fmax
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPZH
MAX
90
CLKBA or CLKAB
A or B
A or B
B or A
SBA or SAB‡
A or B
OE
A or B
OE
A or B
DIR
A or B
MHz
2
8.5
2
9
2
8
1
7
2
11
2
9
2
9
3
15
2
9
2
9
3
16
3
18
2
DIR
A or B
tPLZ
2
† For conditions shown MIN or MAX, use the appropriate value specified under recommended operating conditions.
‡ These parameters are measured with the internal output state of the storage register opposite that of the bus input.
10
tPZL
tPHZ
tPLZ
tPZH
tPZL
tPHZ
16
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
10
ns
ns
ns
ns
ns
ns
ns
SN54ALS646, SN54ALS648, SN54AS646
SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS039F – DECEMBER 1983 – REVISED JANUARY 1995
PARAMETER MEASUREMENT INFORMATION
7V
VCC
SWITCH POSITION TABLE
Open
S1
R1 = 500 Ω
From Output
Under Test
CL = 50 pF
(see Note A)
Test Point
R2 = 500 Ω
TEST
S1
tPLH
tPHL
Open
Open
tPZH
tPZL
Open
Closed
tPHZ
tPLZ
Open
RL
From Output
Under Test
Test Point
CL = 50 pF
(see Note A)
Closed
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
3.5 V
3.5 V
Timing
Input
1.3 V
High-Level
Pulse
0.3 V
tw
0.3 V
th
tsu
Data
Input
1.3 V
1.3 V
3.5 V
1.3 V
1.3 V
3.5 V
Low-Level
Pulse
1.3 V
1.3 V
0.3 V
0.3 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3.5 V
Output
Control
1.3 V
1.3 V
0.3 V
3.5 V
Input
1.3 V
tPZL
1.3 V
tPLZ
0.3 V
In-Phase
Output
VOH
1.3 V
VOL
1.3 V
Waveform 1
S1 Closed
(see Note B)
VOH
1.3 V
1.3 V
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
1.3 V
tPHZ
tPLH
tPHL
Out-of-Phase
Output
3.5 V
tPHL
tPLH
tPZH
Waveform 2
S1 Open
(see Note B)
VOL
0.3 V
VOH
1.3 V
0.3 V
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 2 ns, tf ≤ 2 ns.
D. The outputs are measured one at a time with one transition per measurement.
Figure 2. Load Circuits and Voltage Waveforms
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
17
PACKAGE OPTION ADDENDUM
www.ti.com
24-Jan-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package Qty
Drawing
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
(4)
5962-87595013A
ACTIVE
LCCC
FK
28
1
TBD
Call TI
Call TI
-55 to 125
596287595013A
SNJ54AS
646FK
5962-8759501KA
ACTIVE
CFP
W
24
1
TBD
Call TI
Call TI
-55 to 125
5962-8759501KA
SNJ54AS646W
5962-8759501LA
ACTIVE
CDIP
JT
24
1
TBD
Call TI
Call TI
-55 to 125
5962-8759501LA
SNJ54AS646JT
5962-89956013A
ACTIVE
LCCC
FK
28
1
TBD
Call TI
Call TI
-55 to 125
596289956013A
SNJ54ALS
646FK
5962-8995601LA
ACTIVE
CDIP
JT
24
1
TBD
Call TI
Call TI
-55 to 125
5962-8995601LA
SNJ54ALS646JT
5962-9052301LA
ACTIVE
CDIP
JT
24
1
TBD
Call TI
Call TI
-55 to 125
5962-9052301LA
SNJ54ALS648JT
SN54AS646JT
ACTIVE
CDIP
JT
24
1
TBD
A42
N / A for Pkg Type
-55 to 125
SN54AS646JT
SN74ALS646A-1DW
ACTIVE
SOIC
DW
24
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
ALS646A-1
SN74ALS646A-1DWE4
ACTIVE
SOIC
DW
24
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
ALS646A-1
SN74ALS646A-1DWG4
ACTIVE
SOIC
DW
24
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
ALS646A-1
SN74ALS646A-1DWR
OBSOLETE
SOIC
DW
24
TBD
Call TI
Call TI
0 to 70
ALS646A-1
SN74ALS646A-1DWRE4
OBSOLETE
SOIC
DW
24
TBD
Call TI
Call TI
0 to 70
ALS646A-1
SN74ALS646A-1DWRG4
OBSOLETE
SOIC
DW
24
TBD
Call TI
Call TI
0 to 70
ALS646A-1
SN74ALS646A-1NT
ACTIVE
PDIP
NT
24
15
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
0 to 70
74ALS646A-1NT
SN74ALS646A-1NTE4
ACTIVE
PDIP
NT
24
15
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
0 to 70
74ALS646A-1NT
SN74ALS646ADW
ACTIVE
SOIC
DW
24
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
ALS646A
SN74ALS646ADWE4
ACTIVE
SOIC
DW
24
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
ALS646A
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device
24-Jan-2013
Status
(1)
Package Type Package Pins Package Qty
Drawing
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
(4)
SN74ALS646ADWG4
ACTIVE
SOIC
DW
24
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
ALS646A
SN74ALS646ADWR
ACTIVE
SOIC
DW
24
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
ALS646A
SN74ALS646ADWRE4
ACTIVE
SOIC
DW
24
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
ALS646A
SN74ALS646ADWRG4
ACTIVE
SOIC
DW
24
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
ALS646A
SN74ALS646ANT
ACTIVE
PDIP
NT
24
15
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
0 to 70
SN74ALS646ANT
SN74ALS646ANTE4
ACTIVE
PDIP
NT
24
15
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
0 to 70
SN74ALS646ANT
SN74ALS648ADW
ACTIVE
SOIC
DW
24
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
ALS648A
SN74ALS648ADWE4
ACTIVE
SOIC
DW
24
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
ALS648A
SN74ALS648ADWG4
ACTIVE
SOIC
DW
24
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
ALS648A
SN74ALS648ANT
ACTIVE
PDIP
NT
24
15
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
0 to 70
SN74ALS648ANT
SN74ALS648ANTE4
ACTIVE
PDIP
NT
24
15
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
0 to 70
SN74ALS648ANT
SN74AS646DW
ACTIVE
SOIC
DW
24
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
AS646
SN74AS646DWE4
ACTIVE
SOIC
DW
24
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
AS646
SN74AS646DWG4
ACTIVE
SOIC
DW
24
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
AS646
SN74AS646NT
ACTIVE
PDIP
NT
24
15
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
0 to 70
SN74AS646NT
SN74AS646NTE4
ACTIVE
PDIP
NT
24
15
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
0 to 70
SN74AS646NT
SN74AS648DW
ACTIVE
SOIC
DW
24
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
AS648
SN74AS648DWE4
ACTIVE
SOIC
DW
24
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
AS648
Addendum-Page 2
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device
24-Jan-2013
Status
(1)
Package Type Package Pins Package Qty
Drawing
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
(4)
SN74AS648DWG4
ACTIVE
SOIC
DW
24
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
AS648
SN74AS648NT
ACTIVE
PDIP
NT
24
15
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
0 to 70
SN74AS648NT
SN74AS648NT3
OBSOLETE
PDIP
NT
24
TBD
Call TI
Call TI
0 to 70
SN74AS648NTE4
ACTIVE
PDIP
NT
24
15
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
0 to 70
SNJ54ALS646FK
ACTIVE
LCCC
FK
28
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
596289956013A
SNJ54ALS
646FK
SNJ54ALS646JT
ACTIVE
CDIP
JT
24
1
TBD
A42
N / A for Pkg Type
-55 to 125
5962-8995601LA
SNJ54ALS646JT
SNJ54ALS646W
OBSOLETE
CFP
W
24
TBD
Call TI
Call TI
-55 to 125
SNJ54ALS648FK
OBSOLETE
LCCC
FK
24
TBD
Call TI
Call TI
-55 to 125
SNJ54ALS648JT
ACTIVE
CDIP
JT
24
TBD
A42
N / A for Pkg Type
-55 to 125
SNJ54ALS648W
OBSOLETE
CFP
W
24
TBD
Call TI
Call TI
-55 to 125
SNJ54AS646FK
ACTIVE
LCCC
FK
28
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
596287595013A
SNJ54AS
646FK
SNJ54AS646JT
ACTIVE
CDIP
JT
24
1
TBD
A42
N / A for Pkg Type
-55 to 125
5962-8759501LA
SNJ54AS646JT
SNJ54AS646W
ACTIVE
CFP
W
24
1
TBD
A42
N / A for Pkg Type
-55 to 125
5962-8759501KA
SNJ54AS646W
1
SN74AS648NT
5962-9052301LA
SNJ54ALS648JT
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Addendum-Page 3
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
24-Jan-2013
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Only one of markings shown within the brackets will appear on the physical device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN54ALS646, SN54ALS648, SN54AS646, SN74AS646 :
• Catalog: SN74ALS646, SN74ALS648, SN74AS646
• Military: SN54AS646
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
• Military - QML certified for Military and Defense Applications
Addendum-Page 4
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Jan-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
SN74ALS646ADWR
Package Package Pins
Type Drawing
SOIC
DW
24
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
2000
330.0
24.4
Pack Materials-Page 1
10.75
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
15.7
2.7
12.0
24.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Jan-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
SN74ALS646ADWR
SOIC
DW
24
2000
367.0
367.0
45.0
Pack Materials-Page 2
MECHANICAL DATA
MCER004A – JANUARY 1995 – REVISED JANUARY 1997
JT (R-GDIP-T**)
CERAMIC DUAL-IN-LINE
24 LEADS SHOWN
PINS **
A
13
24
B
1
24
28
A MAX
1.280
(32,51)
1.460
(37,08)
A MIN
1.240
(31,50)
1.440
(36,58)
B MAX
0.300
(7,62)
0.291
(7,39)
B MIN
0.245
(6,22)
0.285
(7,24)
DIM
12
0.070 (1,78)
0.030 (0,76)
0.100 (2,54) MAX
0.320 (8,13)
0.290 (7,37)
0.015 (0,38) MIN
0.200 (5,08) MAX
Seating Plane
0.130 (3,30) MIN
0.023 (0,58)
0.015 (0,38)
0°–15°
0.014 (0,36)
0.008 (0,20)
0.100 (2,54)
4040110/C 08/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a ceramic lid using glass frit.
Index point is provided on cap for terminal identification.
Falls within MIL STD 1835 GDIP3-T24, GDIP4-T28, and JEDEC MO-058 AA, MO-058 AB
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MCFP007 – OCTOBER 1994
W (R-GDFP-F24)
CERAMIC DUAL FLATPACK
0.375 (9,53)
0.340 (8,64)
Base and Seating Plane
0.006 (0,15)
0.004 (0,10)
0.090 (2,29)
0.045 (1,14)
0.045 (1,14)
0.026 (0,66)
0.395 (10,03)
0.360 (9,14)
0.360 (9,14)
0.240 (6,10)
1
0.360 (9,14)
0.240 (6,10)
24
0.019 (0,48)
0.015 (0,38)
0.050 (1,27)
0.640 (16,26)
0.490 (12,45)
0.030 (0,76)
0.015 (0,38)
12
13
30° TYP
1.115 (28,32)
0.840 (21,34)
4040180-5 / B 03/95
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a ceramic lid using glass frit.
Falls within MIL-STD-1835 GDFP2-F24 and JEDEC MO-070AD
Index point is provided on cap for terminal identification only.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
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Click to View Pricing, Inventory, Delivery & Lifecycle Information:
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SN74AS648DWR SN74AS648DWRE4 SN74AS648DWRG4
