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SN74AUP1G08
SCES502P – NOVEMBER 2003 – REVISED JUNE 2016
SN74AUP1G08 Low-Power Single 2-Input Positive-AND Gate
1 Features
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2 Applications
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Available in the Ultra Small 0.64 mm Package
(DPW) With 0.5-mm Pitch
Low Static-Power Consumption:
ICC = 0.9 μA Maximum
Low Dynamic-Power Consumption:
Cpd = 4.3 pF Typical at 3.3 V
Low Input Capacitance: Ci = 1.5 pF Typical
Low Noise: Overshoot and Undershoot
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