SN74AUP1G126YFPR

Product Folder Order Now Support & Community Tools & Software Technical Documents SN74AUP1G126 SCES596G – JULY 2004 – REVISED AUGUST 2017 SN74AUP1G126 Low-Power Single Bus Buffer Gate With Tri-State Output 1 Features 3 Description • The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable applications. This family assures a very low static and dynamic power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (see AUP – The LowestPower Family and Excellent Signal Integrity ). 1 • • • • • • • • • • • • • • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Performance Tested Per JESD 22− – 2000-V Human-Body Model (A114-B, Class II) – 1000-V Charged-Device Model (C101) Available in the Texas Instruments NanoStar™ Package Low Static-Power Consumption (ICC = 0.9 µA Maximum) Low Dynamic-Power Consumption (Cpd = 4 pF Typical at 3.3 V) Low Input Capacitance (Ci = 1.5 pF Typical) Low Noise – Overshoot and Undershoot