SN74AUP1T17DCKR

Product Folder Sample & Buy Technical Documents Support & Community Tools & Software Reference Design SN74AUP1T17 SCES803A – APRIL 2010 – REVISED JUNE 2015 SN74AUP1T17 Low Power, 1.8/2.5/3.3-V Input, 3.3-V CMOS Output, Single Schmitt-Trigger Buffer Gate 1 Features 3 Description • • The SN74AUP1T17 performs the Boolean function Y = A with designation for logic-level translation applications with output referenced to supply VCC. 1 • • • • • • • • Single-Supply Voltage Translator Output Level Up to Supply VCC CMOS Level – 1.8 V to 3.3 V (at VCC = 3.3 V) – 2.5 V to 3.3 V (at VCC = 3.3 V) – 1.8 V to 2.5 V (at VCC = 2.5 V) – 3.3 V to 2.5 V (at VCC = 2.5 V Schmitt-Trigger Inputs Reject Input Noise and Provide Better Output Signal Integrity Ioff Supports Partial Power Down (VCC = 0 V) Very Low Static Power Consumption: 0.1 µA Very Low Dynamic Power Consumption: 0.9 µA Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II Pb-Free Packages Available: SC-70 (DCK) 2 x 2.1 x 0.65 mm (Height 1.1 mm) More Gate Options Available at www.ti.com/littlelogic ESD Performance Tested Per JESD 22 – 2000-V Human Body Model (A114-B, Class II) – 1000-V Charged-Device Model (C101) 2 Applications • • • • • • • • • • • AV Receivers Audio Dock: Portable Blu-ray Players and Home Theaters MP3 Players and Recorders Personal Digital Assistant (PDA) Power: Telecom/Server AC/DC Supply: Single Controller: Analog and Digital Solid State Drive (SSD): Client and Enterprise TV: LCD/Digital and High-Definition (HDTV) Tablet: Enterprise Video Analytics: Servers Wireless Headsets, Keyboards, and Mice AUP technology is the industry's lowest-power logic technology designed for use in extending battery-life in operating. All input levels that accept 1.8-V LVCMOS signals, while operating from either a single 3.3-V or 2.5-V VCC supply. This product also maintains excellent signal integrity (see Figure 4 and Figure 1). The wide VCC range of 2.3 V to 3.6 V allows the possibility of switching output level to connect to external controllers or processors. Schmitt-trigger inputs (ΔVT = 210 mV between positive and negative input transitions) offer improved noise immunity during switching transitions, which is especially useful on analog mixed-mode designs. Schmitt-trigger inputs reject input noise, ensure integrity of output signals, and allow for slow input signal transition. Ioff is a feature that allows for powered-down conditions (VCC = 0 V) and is important in portable and mobile applications. When VCC = 0 V, signals in the range from 0 V to 3.6 V can be applied to the inputs and outputs of the device. No damage occurs to the device under these conditions. The SN74AUP1T17 is designed with optimized current-drive capability of 4 mA to reduce line reflections, overshoot, and undershoot caused by high-drive outputs. Device Information(1) PART NUMBER SN74AUP1T17DCK PACKAGE SC70 (5) BODY SIZE (NOM) 2.00 mm x 1.25 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Simplified Schematic 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. SN74AUP1T17 SCES803A – APRIL 2010 – REVISED JUNE 2015 www.ti.com Table of Contents 1 2 3 4 5 6 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 6.1 6.2 6.3 6.4 6.5 6.6 1 1 1 2 3 3 Absolute Maximum Ratings ...................................... 3 ESD Ratings.............................................................. 3 Recommended Operating Conditions....................... 4 Thermal Information .................................................. 4 Electrical Characteristics........................................... 4 Switching Characteristics, VCC = 2.5 V and VI = 1.8 V................................................................................. 5 6.7 Switching Characteristics, VCC = 2.5 V and VI = 2.5 V................................................................................. 5 6.8 Switching Characteristics, VCC = 2.5 V and VI = 3.3 V................................................................................. 5 6.9 Switching Characteristics, VCC = 3.3 V and VI = 1.8 V................................................................................. 6 6.10 Switching Characteristics, VCC = 3.3 V and VI = 2.5 V................................................................................. 6 6.11 Switching Characteristics, VCC = 3.3 V and VI = 3.3 V................................................................................. 6 6.12 Operating Characteristics........................................ 6 6.13 Typical Characteristics ............................................ 7 7 8 Parameter Measurement Information .................. 7 Detailed Description .............................................. 8 8.1 8.2 8.3 8.4 9 Overview ................................................................... Functional Block Diagram ......................................... Feature Description................................................... Device Functional Modes.......................................... 8 8 8 8 Application and Implementation .......................... 9 9.1 Application Information.............................................. 9 9.2 Typical Application ................................................... 9 10 Power Supply Recommendations ..................... 10 11 Layout................................................................... 10 11.1 Layout Guidelines ................................................. 10 11.2 Layout Example .................................................... 10 12 Device and Documentation Support ................. 11 12.1 12.2 12.3 12.4 Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 11 11 11 11 13 Mechanical, Packaging, and Orderable Information ........................................................... 11 4 Revision History Changes from Original (April 2010) to Revision A • 2 Page Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1 Submit Documentation Feedback Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: SN74AUP1T17 SN74AUP1T17 www.ti.com SCES803A – APRIL 2010 – REVISED JUNE 2015 5 Pin Configuration and Functions DCK Package 5-Pin SC70 Top View NC 1 A 2 GND 3 5 VCC 4 Y Pin Functions PIN NAME NO. I/O DESCRIPTION NC 1 — A 2 I Not connected GND 3 — Ground Y 4 O Output VCC 5 — Power terminal Input 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT VCC Supply voltage –0.5 4.6 V VI Input voltage (2) –0.5 4.6 V VO Voltage applied to any output in the high-impedance or power-off state (2) –0.5 4.6 V –0.5 (2) VO Output voltage in the high or low state VCC + 0.5 V IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current ±20 mA ±50 mA 150 °C Continuous current through VCC or GND Tstg (1) (2) Storage temperature –65 Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. 6.2 ESD Ratings VALUE V(ESD) (1) (2) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) 2000 Charged-device model (CDM), per JEDEC specification JESD22-C101 (2) 1000 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Submit Documentation Feedback Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: SN74AUP1T17 3 SN74AUP1T17 SCES803A – APRIL 2010 – REVISED JUNE 2015 www.ti.com 6.3 Recommended Operating Conditions (1) MIN MAX 2.3 3.6 V Input voltage 0 3.6 V VO Output voltage 0 VCC V IOH High-level output current IOL Low-level output current TA Operating free-air temperature VCC Supply voltage VI (1) VCC = 2.3 V UNIT –3.1 VCC = 3 V –4 VCC = 2.3 V 3.1 VCC = 3 V mA mA 4 –40 85 °C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. See the TI application report Implications of Slow or Floating CMOS Inputs, SCBA004. 6.4 Thermal Information SN74AUP1T17 THERMAL METRIC (1) DCK (SC70) UNIT 5 PINS RθJA (1) Junction-to-ambient thermal resistance 280 °C/W For more information about traditional and new thermal metrics, see the Semconductor and IC Package Thermal Metrics application report, SPRA953. 6.5 Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS TA = –40°C to 85°C TA = 25°C VCC MIN TYP MAX UNIT MIN MAX VT+ Positive-going input threshold voltage 2.3 V to 2.7 V 0.6 1.1 0.6 1.1 3 V to 3.6 V 0.75 1.16 0.75 1.19 VT– Negative-going input threshold voltage 2.3 V to 2.7 V 0.35 0.6 0.35 0.6 3 V to 3.6 V 0.5 0.85 0.5 0.85 ΔVT Hysteresis (VT+ – VT–) 2.3 V to 2.7 V 0.23 0.6 0.1 0.6 3 V to 3.6 V 0.25 0.56 0.15 0.56 IOH = –20 μA IOH = –2.3 mA VOH IOH = –3.1 mA IOH = –2.7 mA IOH = –4 mA IOL = 20 μA IOL = 2.3 mA VOL IOL = 3.1 mA IOL = 2.7 mA IOL = 4 mA II All inputs VI = 3.6 V or GND Ioff VI or VO = 0 V to 3.6 V ΔIoff VI or VO = 3.6 V ICC VI = 3.6 V or GND, IO = 0 4 2.3 V to 3.6 V VCC – 0.1 VCC – 0.1 2.05 1.97 1.9 1.85 2.72 2.67 2.3 V 3V 2.3 V to 3.6 V 2.3 V 3V 2.6 V V V V 2.55 0.1 0.1 0.31 0.33 0.44 0.45 0.31 0.33 V 0.44 0.45 0 V to 3.6 V 0.1 0.5 μA 0V 0.1 0.5 μA 0 V to 0.2 V 0.2 0.5 μA 2.3 V to 3.6 V 0.5 0.9 μA Submit Documentation Feedback Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: SN74AUP1T17 SN74AUP1T17 www.ti.com SCES803A – APRIL 2010 – REVISED JUNE 2015 Electrical Characteristics (continued) over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN ΔICC TA = –40°C to 85°C TA = 25°C VCC TYP MAX UNIT MIN MAX One input at 0.3 V or 1.1 V, Other inputs at 0 or VCC, IO = 0 2.3 V to 2.7 V 4 One input at 0.45 V or 1.2 V, Other inputs at 0 or VCC, IO = 0 3 V to 3.6 V 12 μA Ci VI = VCC or GND 3.3 V 1.5 pF Co VO = VCC or GND 3.3 V 3 pF 6.6 Switching Characteristics, VCC = 2.5 V and VI = 1.8 V over recommended operating free-air temperature range, VCC = 2.5 V ± 0.2 V, VI = 1.8 V ± 0.15 V (unless otherwise noted) (see Figure 2) PARAMETER FROM (INPUT) tpd TO (OUTPUT) A MIN Y TA = –40°C to 85°C TA = 25°C CL TYP MAX UNIT MIN MAX 5 pF 1.8 2.3 2.9 0.5 6.8 10 pF 2.3 2.8 3.4 1 7.9 15 pF 2.6 3.1 3.8 1 8.7 30 pF 3.8 4.4 5.1 1.5 10.8 ns 6.7 Switching Characteristics, VCC = 2.5 V and VI = 2.5 V over recommended operating free-air temperature range, VCC = 2.5 V ± 0.2 V, VI = 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 2) PARAMETER tpd FROM (INPUT) A TO (OUTPUT) Y TA = –40°C to 85°C TA = 25°C CL UNIT MIN TYP MAX MIN MAX 5 pF 1.8 2.3 3.1 0.5 6 10 pF 2.2 2.8 3.5 1 7.1 15 pF 2.6 3.2 5.2 1 7.9 30 pF 3.7 4.4 5.2 1.5 10 ns 6.8 Switching Characteristics, VCC = 2.5 V and VI = 3.3 V over recommended operating free-air temperature range, VCC = 2.5 V ± 0.2 V, VI = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 2) PARAMETER tpd FROM (INPUT) A TO (OUTPUT) Y TA = –40°C to 85°C TA = 25°C CL MIN TYP MAX MIN MAX 5 pF 2 2.7 3.5 0.5 5.5 10 pF 2.4 3.1 3.9 1 6.5 15 pF 2.8 3.5 4.3 1 7.4 30 pF 4 4.7 5.5 1.5 9.5 Submit Documentation Feedback Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: SN74AUP1T17 UNIT ns 5 SN74AUP1T17 SCES803A – APRIL 2010 – REVISED JUNE 2015 www.ti.com 6.9 Switching Characteristics, VCC = 3.3 V and VI = 1.8 V over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V, VI = 1.8 V ± 0.15 V (unless otherwise noted) (see Figure 2) PARAMETER tpd FROM (INPUT) A TO (OUTPUT) Y TA = –40°C to 85°C TA = 25°C CL MIN TYP MAX MIN UNIT MAX 5 pF 1.6 2 2.5 0.5 8 10 pF 2 2.4 2.9 1 8.5 15 pF 2.3 2.8 3.3 1 9.1 30 pF 3.4 3.9 4.4 1.5 9.8 ns 6.10 Switching Characteristics, VCC = 3.3 V and VI = 2.5 V over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V, VI = 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 2) PARAMETER FROM (INPUT) TO (OUTPUT) A Y UNIT MIN TYP MAX MIN MAX 1.6 1.9 2.4 0.5 5.3 10 pF 2 2.3 2.7 1 6.1 15 pF 2.3 2.7 3.1 1 6.8 30 pF 3.4 3.8 4.2 1.5 8.5 5 pF tpd TA = –40°C to 85°C TA = 25°C CL ns 6.11 Switching Characteristics, VCC = 3.3 V and VI = 3.3 V over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V, VI = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 2) PARAMETER tpd FROM (INPUT) A TO (OUTPUT) Y TA = –40°C to 85°C TA = 25°C CL UNIT MIN TYP MAX MIN MAX 5 pF 1.6 2.1 2.7 0.5 4.7 10 pF 2 2.4 3 1 5.7 15 pF 2.3 2.7 3.3 1 6.2 30 pF 3.4 3.8 4.4 1.5 7.8 ns 6.12 Operating Characteristics TA = 25°C PARAMETER Cpd 6 Power dissipation capacitance TEST CONDITIONS f = 10 MHz Submit Documentation Feedback VCC = 2.5 V VCC = 3.3 V TYP TYP 4 5 UNIT pF Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: SN74AUP1T17 SN74AUP1T17 www.ti.com SCES803A – APRIL 2010 – REVISED JUNE 2015 6.13 Typical Characteristics 3.5 3 Voltage − V 2.5 2 1.5 1 Input Output 0.5 0 −0.5 0 10 5 15 20 25 30 Time − ns 35 40 45 AUP1G08 data at CL = 15 pF Figure 1. Switching Characteristics at 25 MHz 7 Parameter Measurement Information From Output Under Test CL (see Note A) VCC = 2.5 V ± 0.2 V VCC = 3.3 V ± 0.3 V 5, 10, 15, 30 pF VI/2 VCC/2 5, 10, 15, 30 pF VI/2 VCC/2 1 MΩ CL VMI VMO LOAD CIRCUIT VI VMI Input VMI 0V tPHL tPLH VOH VMO Output VMo VOL tPHL tPLH VOH VMo Output VMo VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS NOTES: A. B. C. D. CL includes probe and jig capacitance. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, slew rate ≥ 1 V/ns. The outputs are measured one at a time, with one transition per measurement. tPLH and tPHL are the same as tpd. Figure 2. Load Circuit and Voltage Waveforms Submit Documentation Feedback Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: SN74AUP1T17 7 SN74AUP1T17 SCES803A – APRIL 2010 – REVISED JUNE 2015 www.ti.com 8 Detailed Description 8.1 Overview The SN74AUP1T17 device contains one Schmitt trigger buffer and performs the Boolean function Y = A. The device functions as an independent buffer, but because of Schmitt action, it will have different input threshold levels for a positive-going (VT+) and negative-going signals. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. 8.2 Functional Block Diagram 8.3 Feature Description The distinguishing feature of the SN74AUP1T17 versus its standard-logic counterpart, the SN74AUP1G17, is the lowered switching input threshold. The SN74AUP1T17 will switch to a high output at a lower voltage threshold, which allows up-translation from signals that may not reach VCC levels. The IOFF feature prevents the outputs from sinking current when VCC = 0 V, providing extra isolation in systems where not all modules are powered simultaneously. 8.4 Device Functional Modes Table 1 lists the functional modes for SN74AUP1T17. Table 1. Function Table 8 INPUT A OUTPUT Y H H L L Submit Documentation Feedback Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: SN74AUP1T17 SN74AUP1T17 www.ti.com SCES803A – APRIL 2010 – REVISED JUNE 2015 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information The SN74AUP1T17 is a low-power CMOS device that can be used for a multitude of buffer type functions where the input is slow or noisy. The inputs are 5.5-V tolerant allowing it to translate down to VCC. In addition, the device can translate a signal up to VCC when the input is at least VT+ (max). 9.2 Typical Application This application is for a low-cost oscillator. The SN74AUP1T17 at the output cleans up the noise from the clock generator so that it can be used in the system. SN74AUP1T17 Figure 3. Low-Cost Oscillator 9.2.1 Design Requirements This device uses CMOS technology and has balanced output drive. Take care to avoid bus contention because it can drive currents that would exceed maximum limits. The high drive will also create fast edges into light loads so routing and load conditions should be considered to prevent ringing. 9.2.2 Detailed Design Procedure 1. Recommended Input Conditions – Specified high and low levels. See (VT+ and VT-) in the Recommended Operating Conditions table. – Inputs are overvoltage tolerant allowing them to go as high as (VI max) in the Recommended Operating Conditions table at any valid VCC . 2. Recommend Output Conditions – Load currents should not exceed (IO max) per output and should not exceed (continuous current through VCC or GND) total current for the part. These limits are located in the Absolute Maximum Ratings table. – Outputs should not be pulled above VCC. Submit Documentation Feedback Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: SN74AUP1T17 9 SN74AUP1T17 SCES803A – APRIL 2010 – REVISED JUNE 2015 www.ti.com Typical Application (continued) 9.2.3 Application Curves Figure 4 and Figure 5 show the power consumption with the AUP family. 100% 100% 80% 80% 60% 60% 3.3-V Logic (1) 40% 40% 20% 3.3-V LVC Logic(1) 20% AUP 0% 0% (1) Single, dual, and triple gates AUP (1) Single, dual, and triple gates Figure 4. Static-Power Consumption (µA) Figure 5. Dynamic-Power Consumption (pF) 10 Power Supply Recommendations The power supply can be any voltage between the min and max supply voltage rating located in the Recommended Operating Conditions table. Each VCC pin should have a good bypass capacitor to prevent power disturbance. For devices with a single supply a 0.1-μF capacitor is recommended and if there are multiple Vcc pins then a 0.01-μF or 0.022-μF capacitor is recommended for each power pin. It is ok to parallel multiple bypass caps to reject different frequencies of noise. 0.1-μF and 1-μF capacitors are commonly used in parallel. The bypass capacitor should be installed as close to the power pin as possible for best results. 11 Layout 11.1 Layout Guidelines When using multiple bit logic devices inputs should not ever float. In many cases, functions or parts of functions of digital logic devices are unused, for example, when only two inputs of a triple-input AND gate are used or only 3 of the 4 buffer gates are used. Such input terminals should not be left unconnected because the undefined voltages at the outside connections result in undefined operational states. Specified below are the rules that must be observed under all circumstances. All unused inputs of digital logic devices must be connected to a high or low bias to prevent them from floating. The logic level that should be applied to any particular unused input depends on the function of the device. Generally they will be tied to Gnd or Vcc whichever make more sense or is more convenient. 11.2 Layout Example VCC Unused Input Input Output Output Unused Input Input Figure 6. Layout Example Schematic 10 Submit Documentation Feedback Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: SN74AUP1T17 SN74AUP1T17 www.ti.com SCES803A – APRIL 2010 – REVISED JUNE 2015 12 Device and Documentation Support 12.1 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 12.2 Trademarks E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 12.3 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 12.4 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical packaging and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Submit Documentation Feedback Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: SN74AUP1T17 11 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) SN74AUP1T17DCKR ACTIVE SC70 DCK 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 (675, 67F) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of